DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claim 1 is objected to because of the following informalities: “the mesa” in line 9 lacks antecedent basis and should be changed to “a mesa” in order to avoid a potential 112 indefiniteness rejection. Appropriate correction is required.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-3, 7, 8, 10-15, and 17-19 are rejected under 35 U.S.C. 103 as being unpatentable over Futagawa et al. (US PG Pub 2015/0044795 A1, 01/04/24 IDS) in view of ILLEK et al. (US PG Pub 2022/0393438 A1).
Regarding claim 1, Futagawa discloses a surface-emitting semiconductor laser (a VCSEL, FIG. 44, [0098]) comprising:
a first semiconductor layer of a first conductivity type (22, FIG. 44, where 22 is p-type, [0103]), an active zone (23, FIG. 44, [0103]) for generating electromagnetic radiation,
a second semiconductor layer of a second conductivity type (21, FIG. 44, where 21 is n-type, [0103]), wherein said first semiconductor layer, said active region, and said second semiconductor layer are stacked on top of each other to form a semiconductor layer stack (20, FIG. 44, [0106]), and
a cladding layer (12, FIG. 44, where 12 covers sidewalls of a mesa formed by the semiconductor layer stack, [0105]) adjacent to a sidewall of the mesa, and
an aperture (24A, FIG. 44, [0106]) for guiding a current, wherein an opening diameter of the aperture is smaller than a diameter of the mesa (FIG. 44).
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Futagawa does not explicitly disclose the semiconductor layer stack is patterned into a mesa and a diameter of the mesa is less than 10 μm.
ILLEK discloses a VCSEL (FIG. 1) comprising a mesa (103, FIG. 1, [0050]) with a width of less than 5 μm ([0065]).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the mesa of Futagawa with a width of less than 10 μm as taught by ILLEK in order to maximize current/optical confinement to facilitate stable single-mode operation.
Regarding claim 2, Futagawa discloses the first and second semiconductor layers are GaN layers ([0103]).
Regarding claim 3, Futagawa discloses a material of the cladding layer is selected such that a refractive index of the material of the cladding layer is smaller than the refractive index of the first semiconductor layer (12 is formed from SiO2 having a smaller refractive index smaller than that of the first semiconductor layer comprising GaN, [0105]).
Regarding claim 7, Futagawa discloses a material of the cladding layer is selected such that an absorption coefficient of the material of the cladding layer is smaller than the absorption coefficient of the first semiconductor layer (12 is formed from SiO2 having an absorption coefficient smaller than that of the first semiconductor layer comprising GaN, [0105]).
Regarding claim 8, Futagawa discloses first and second resonator mirrors (41/42, FIG. 44, [0103]), wherein the first resonator mirror is disposed on a side of the first semiconductor layer and the second resonator mirror is disposed on a side of the second semiconductor layer (FIG. 44), and the first and second resonator mirrors are insulating (“the first light reflecting layer 41 and the second light reflecting layer 42 are formed from a layer structure of an SiN layer and an SiO.sub.2 layer (total number of layers of dielectric film: 20 layers),” [0103]).
Regarding claim 10, Futagawa discloses the semiconductor layer stack is disposed over a growth substrate (26, FIG. 44, where 26 is a support substrate which is functionally equivalent to a growth substrate, [0101]) for growing the first and second semiconductor layers.
Regarding claim 11, Futagawa discloses the semiconductor layer stack is disposed over a metallic carrier (25, FIG. 44, where “a bonding layer 25 formed from a solder layer including a gold (Au) layer or a tin (Sn) layer,” [0101]).
Regarding claim 12, Futagawa discloses the mesa has a hexagonal shape in a horizontal plane ([0093]).
Regarding claim 13, Futagawa discloses a sidewall of the mesa corresponds to a crystal face of the material of the first semiconductor layer (it’s implicitly taught by a sidewall of the mesa comprising a surface of the first semiconductor layer, FIG. 44).
Regarding claim 14, same rejection as applied to claim 1 is maintained since the method claim 14 contains substantially the same limitations as the product claim 1.
Regarding claim 15, Futagawa discloses the cladding layer is applied by sputtering over the sidewall of the mesa ([0093]).
Regarding claim 17, Futagawa discloses patterning the first semiconductor layer comprises a wet etch process ([0057]).
Regarding claim 18, Futagawa discloses an optoelectronic semiconductor device (it’s considered intended use and not given patentable weight, see MPEP 2111.02 II.) comprising the surface-emitting semiconductor laser according to claim 1.
Regarding claim 19, the combination has disclosed the optoelectronic semiconductor device outlined in the rejection to claim 18 above except the optoelectronic semiconductor device is selected from an illumination device, a projection device, or a display device. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the optoelectronic semiconductor device of the combination with an illumination device, a projection device, or a display device in order to obtain desired optical application.
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Futagawa et al. and ILLEK et al. as applied to claim 1 above, and further in view of PARK (US PG Pub 2020/0303904 A1).
Regarding claim 4, the combination has disclosed the cladding layer outlined in the rejection to claim 1 above except a material of the cladding layer comprises AlN. PARK discloses a VCSEL (FIG. 2) comprising a mesa (M, FIG. 2, [0066]) and a cladding layer (43, FIG. 2, [0070]) covering sidewalls of the mesa, wherein the cladding layer comprises AlN ([0070]). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the cladding layer of the combination with comprising AlN as taught by PARK in order to improve lateral heat dissipation of the mesa.
Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Futagawa et al. and ILLEK et al. as applied to claim 1 above, and further in view of YEH et al. (US PG Pub 2017/0104315 A1, 01/04/24 IDS).
Regarding claim 9, the combination has disclosed the cladding layer outlined in the rejection to claim 1 above and further discloses first and second resonator mirrors (41/42, FIG. 44, [0103]), wherein the first resonator mirror is disposed on a side of the first semiconductor layer and the second resonator mirror is disposed on a side of the second semiconductor layer (FIG. 44), and one of the two resonator mirrors is insulating (41 is insulating, [0103]) except the other one of the two resonator mirrors is electrically conductive. YEH discloses a VCSEL (FIG. 2) comprising an electrically conductive bottom DBR (211, FIG. 2, [0022]) and a dielectric top DBR (212, FIG. 2, [0022]). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the bottom DBR of the combination with being electrically conductive as taught by YEH in order to maximize reflectivity.
Allowable Subject Matter
Claim 16 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Chen et al. (US PG Pub 2020/0076162 A1) discloses a VCSEL comprising a cladding covering sidewalls of a mesa similar to the claimed invention (see FIG. 1).
Tanaka et al. (US PG Pub 2009/0103583 A1, 03/30/26 IDS) discloses a mesa that has a hexagon shape similar to the claimed invention (see FIG. 7).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to YUANDA ZHANG whose telephone number is (571)270-1439. The examiner can normally be reached M-F 10:30 AM - 6:30 PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, MINSUN HARVEY can be reached at (571)272-1835. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/YUANDA ZHANG/Primary Examiner, Art Unit 2828
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