DETAILED ACTION
Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
2. The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
3. Claim 9 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 9, “the second signaling bit” has no antecedent basis. Examiner assumed, for examining purposes, that the claim depends on claim 8.
Claim Rejections - 35 USC § 102
4. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
5. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
6. Claims 1-3, 5, 10-12, 14, 16-18 and 20 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Harada et al. (US 2021/0385800 A1, hereinafter “Harada”).
Regarding claim 1, Harada teaches a user equipment (UE) for wireless communication, comprising: at least one memory; and at least one processor coupled with at least one memory (fig. 7) and configured to cause the UE to: receive a signaling indicating that one or two Transmission Configuration Indication (TCI) states are activated for a Control Resource Set (CORESET) with index zero for transmission of Physical Downlink Control Channel (PDCCH) with common control information on PDCCH candidates (figs. 1-4, ¶ [0025]-¶ [0031], ¶ [0048], ¶ [0056], ¶ [0211], configuration information indicating a downlink reference signal that is quasi-co-location (for example, TCI-state for PDCCH, list of TCI-states for PDCCH, or MAC CE) for a control resource set (CORESET, for example, CORESET #0 or common CORESET) including the physical downlink control channel. ¶ [0048], ¶ [0100], ¶ [0114], ¶ [0137], When CORESET associated with a search space for OSI or paging is CORESET #0, UE may be notified of a TCI-state for PDCCH or a parameter corresponding thereto); determine a monitoring occasion and a Quasi Co-Location (QCL) based on at least one of the activated TCI states and a predefined association relationship between Synchronization Signal Block (SSB) indexes and PDCCH monitor occasions (figs. 1-4, ¶ [0048], Information regarding QCL may be referred to as transmission configuration indication (TCI) or a transmission configuration indicator state (TCI-state). ¶ [0064], mapping between the PDCCH monitoring occasion and SSB may be defined by specifications. ¶ [0083] When CORESET associated with a search space for OSI or paging is CORESET #0, UE may recognize a QCL source based on an association rule. ¶ [0100], NW may notify UE of the QCL source using MAC CE or DCI. ¶ [0101], ¶ [0102], ¶ [0084], ¶ [0114] In the example of FIG. 3, for UE, PDCCH monitoring occasions #0 and #1 are configured. When SSB #0 is activated as a TCI-state for PDCCH, UE recognizes SSB #0 as a QCL source of PDCCH. UE performs monitoring using SSB #0 which is a QCL source in all the configured PDCCH monitoring occasions #0 and #1. ¶ [0124], ¶ [0139]); and perform a blind detection for the PDCCH with common control information on the determined monitoring occasion based on the determined QCL (figs. 1-4, ¶ [0024], The user terminal monitors (blind-decodes) a search space (SS) in CORESET and detects DCI for the user terminal. ¶ [0114]).
Regarding claim 10, Harada teaches a network equipment (NE) for wireless communication, comprising: at least one memory; and at least one processor coupled with the at least one memory (fig. 6) and configured to cause the NE to:
transmit a signaling indicating that one or more Transmission
Configuration Indication (TCI) states are activated for a Control Resource Set
(CORESET) with index zero for transmission of Physical Downlink Control
Channel (PDCCH) with common control information on PDCCH candidates (figs. 1-4, ¶ [0025]-¶ [0031], ¶ [0048], ¶ [0056], ¶ [0211], configuration information indicating a downlink reference signal that is quasi-co-location (for example, TCI-state for PDCCH, list of TCI-states for PDCCH, or MAC CE) for a control resource set (CORESET, for example, CORESET #0 or common CORESET) including the physical downlink control channel. ¶ [0048], ¶ [0100], ¶ [0114], ¶ [0137], When CORESET associated with a search space for OSI or paging is CORESET #0, UE may be notified of a TCI-state for PDCCH or a parameter corresponding thereto. ¶ [139]); determine a monitoring occasion and a Quasi Co-Location (QCL) based on at least one of the activated TCI states and a predefined association relationship between Synchronization Signal Block (SSB) indexes and PDCCH monitor occasions (figs. 1-4, ¶ [0048], Information regarding QCL may be referred to as transmission configuration indication (TCI) or a transmission configuration indicator state (TCI-state). ¶ [0064], mapping between the PDCCH monitoring occasion and SSB may be defined by specifications. ¶ [0083] When CORESET associated with a search space for OSI or paging is CORESET #0, UE may recognize a QCL source based on an association rule. ¶ [0100], NW may notify UE of the QCL source using MAC CE or DCI. ¶ [0101], ¶ [0102], ¶ [0084], ¶ [0114] In the example of FIG. 3, for UE, PDCCH monitoring occasions #0 and #1 are configured. When SSB #0 is activated as a TCI-state for PDCCH, UE recognizes SSB #0 as a QCL source of PDCCH. UE performs monitoring using SSB #0 which is a QCL source in all the configured PDCCH monitoring occasions #0 and #1. ¶ [0124], ¶ [0139]); and transmit the PDCCH with common control information on the determined monitoring occasion based on the determined QCL (figs. 1-4, 6, ¶ [0024], The user terminal monitors (blind-decodes) a search space (SS) in CORESET and detects DCI for the user terminal. ¶ [0025]- ¶ [0031], ¶ [0114], ¶ [0182], The transmitting/receiving section 120 may transmit the above-described downlink channel, synchronization signal, downlink reference signal, and the like.¶ [0192]).
Regarding claim 16, Harada teaches a processor for wireless communication, comprising: at least one controller coupled with at least one memory (fig. 7) and configured to cause the processor to: receive a signaling indicating that one or two Transmission Configuration Indication (TCI) states are activated for a Control Resource Set (CORESET) with index zero for transmission of Physical Downlink Control
Channel (PDCCH) with common control information on PDCCH candidates (figs. 1-4, ¶ [0025]-¶ [0031], ¶ [0048], ¶ [0056], ¶ [0211], configuration information indicating a downlink reference signal that is quasi-co-location (for example, TCI-state for PDCCH, list of TCI-states for PDCCH, or MAC CE) for a control resource set (CORESET, for example, CORESET #0 or common CORESET) including the physical downlink control channel. ¶ [0048], ¶ [0100], ¶ [0114], ¶ [0137], When CORESET associated with a search space for OSI or paging is CORESET #0, UE may be notified of a TCI-state for PDCCH or a parameter corresponding thereto.); determine a monitoring occasion and a Quasi Co-Location (QCL) based on at least one of the activated TCI states and a predefined association relationship between Synchronization Signal Block (SSB) indexes and PDCCH monitor occasions (figs. 1-4, ¶ [0048], Information regarding QCL may be referred to as transmission configuration indication (TCI) or a transmission configuration indicator state (TCI-state). ¶ [0064], mapping between the PDCCH monitoring occasion and SSB may be defined by specifications. ¶ [0083] When CORESET associated with a search space for OSI or paging is CORESET #0, UE may recognize a QCL source based on an association rule. ¶ [0100], NW may notify UE of the QCL source using MAC CE or DCI. ¶ [0101], ¶ [0102], ¶ [0084], ¶ [0114] In the example of FIG. 3, for UE, PDCCH monitoring occasions #0 and #1 are configured. When SSB #0 is activated as a TCI-state for PDCCH, UE recognizes SSB #0 as a QCL source of PDCCH. UE performs monitoring using SSB #0 which is a QCL source in all the configured PDCCH monitoring occasions #0 and #1. ¶ [0124], ¶ [0139]); and perform a blind detection for the PDCCH with common control information on the determined monitoring occasion based on the determined QCL (figs. 1-4, ¶ [0024], The user terminal monitors (blind-decodes) a search space (SS) in CORESET and detects DCI for the user terminal. ¶ [0114]).
Regarding claims 2 and 17, Harada teaches the UE of claim 1, wherein the at least one processor is configured to cause the UE to determine the monitoring occasion based on a first one of the activated TCI states (fig. 3, ¶ [0113], ¶ [0114], ¶ [0116], ¶ [0122] and ¶ [0211]).
Regarding claims 3 and 18, Harada teaches the UE of claim 1 wherein the at least one processor is configured to cause the UE to determine the QCL based on the first indicated TCI state (fig. 3, ¶ [0113], ¶ [0114], ¶ [0116], ¶ [0122], and ¶ [0211]).
Regarding claim 5 and 20, Harada teaches the UE of claim 1, wherein two TCI states are not activated for the CORESET with index zero (¶ [0048], ¶ [0054], ¶ [0056], UE may receive a MAC CE (MAC CE for activation) that indicates one TCI-state for PDCCH (tci-StatesPDCCH) in the list. ¶ [0121], UE may activate one of the TCI-states for PDCCH in the list by MAC CE.).
Regarding claim 11, Harada teaches the NE of claim 10, wherein at least one processor is configured to cause the NE to determine the monitoring occasion based on a first one of the activated TCI states (fig. 3, ¶ [0113], ¶ [0114], ¶ [0116], ¶ [0122], and ¶ [0211]).
Regarding claim 12, Harada teaches the NE of claim 10, at least one processor is configured to cause the NE to determine the QCL based on the first indicated TCI state (fig. 3, ¶ [0113], ¶ [0114], ¶ [0116], ¶ [0122], and ¶ [0211]).
Regarding claim 14, Harada teaches the NE of claim 10, wherein two TCI states are not to be activated for the CORESET with index zero (¶ [0048], ¶ [0054], ¶ [0056], UE may receive a MAC CE (MAC CE for activation) that indicates one TCI-state for PDCCH (tci-StatesPDCCH) in the list. ¶ [0121], UE may activate one of the TCI-states for PDCCH in the list by MAC CE.).
Claim Rejections - 35 USC § 103
7. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
8. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
9. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
10. Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Harada.
Regarding claim 7, Harada teaches the UE of claim 1, wherein the at least one processor is configured to cause the UE to receive a first signaling for indicating that, where one or more TCI states are activated for the CORESET with index zero, one or more of the activated TCI states are used for determining the monitoring occasion and the QCL for the blind detection of the PDCCH with common control information (fig. 3, ¶ [0056], UE may receive a MAC CE (MAC CE for activation) that indicates one TCI-state for PDCCH, [0113], ¶ [0114], ¶ [0116], ¶ [0122], ¶ [0124], since a plurality of PDCCH monitoring occasions configured by configuration information of a search space is limited by the active TCI-state for PDCCH. ¶ [0137], When CORESET associated with a search space for OSI or paging is CORESET #0, UE may be notified of a TCI-state for PDCCH or a parameter corresponding thereto).
Harada does not explicitly teach a first signaling bit.
However, Harada teaches determining/judging may be performed in values represented by one bit (0 or 1)) (¶ [0260]).
Thus, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the invention, to include a signaling bit for indicating that, where one or more TCI states are activated for the CORESET with index zero, one or more of the activated TCI states are used for determining the monitoring occasion and the QCL for the blind detection of the PDCCH with common control information in the system of Harada to utilize conventional techniques in the art.
11. Claims 4, 6, 8, 13, 15 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Harada in view of Zhang et al. (US 2023/0180307 A1, hereinafter “Zhang”).
Regarding claims 4 and 19, Harada teaches the UE of claim 1, wherein the at least one processor is configured to cause the UE to determine the QCL based on the indicated TCI state (figs. 1-4, ¶ [0122]-¶ [0124]).
Harada does not explicitly teach wherein the at least one processor is configured to cause the UE to determine the QCL based on the two indicated TCI states .
Zhang teaches indicating two TCI states (¶ [0137], it may be possible for one CORESET to be configured with two TCI states. ¶ [0144], a gNB may be able to indicate 2 TCI states for CORESET 0. Different TCI states can be QCLed with different SSBs. It may be the case that a UE monitors the PDCCH in SS/CORESET 0 instances associated with SSBs from the 2 TCI states. ¶ [0140]).
Thus, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the invention, to indicate two TCI states and configured the UE to determine the QCL based on the two indicated TCI states in the system of Harada to further improve industrial applicability.
Regarding claim 6, Harada teaches the UE of claim 1.
Harada does not explicitly teach wherein the at least one processor is configured to cause the UE to determine, based at least in part on the signaling indicating that two TCI states are activated for the CORESET with index zero, the monitoring occasion
and the QCL according to previously determined monitoring occasion and QCL.
Zhang teaches wherein the at least one processor is configured to cause the UE to determine, based at least in part on the signaling indicating that two TCI states are activated for the CORESET with index zero, the monitoring occasion
and the QCL according to previously determined monitoring occasion and QCL (figs. 7-10, ¶ [0135], It may be the case that a UE does not need to monitor all instances for the SS/CORESET 0; instead, the UE may only need to monitor the SS/CORESET 0 instance associated with one SSB from the most recent of a SSB associated with a random access channel (RACH) procedure or a SSB quasi-co-located (QCL) with the CSI-RS in the TCI state for the CORESET 0, at least according to some embodiments. ¶ [0140], ¶ [0141], ¶ [0144]).
Thus, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the invention, to indicate two TCI states and configure the UE to determine, based at least in part on the signaling indicating that two TCI states are activated for the CORESET with index zero, the monitoring occasion and the QCL according to previously determined monitoring occasion and QCL in the system of Harada to further improve industrial applicability.
Regarding claim 8, Harada teaches the UE of claim 7.
Harada does not explicitly teach wherein the at least one processor is configured to cause the UE to receive a second signaling bit for indicating a selected one of the two TCI states for determining the monitoring occasion.
Zhang teaches wherein the at least one processor is configured to cause the UE to receive a second signaling for indicating a selected one of the two TCI states for determining the monitoring occasion (¶ [0137], it may be possible for one CORESET to be configured with two TCI states. ¶ [0141], which TCI state is to be selected can be configured by higher layer signaling (e.g., via RRC or MAC CE signaling), ¶ [0108]).
Thus, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the invention, to receive a second signaling bit for indicating a selected one of the two TCI states for determining the monitoring occasion in the system of Harada to further improve industrial applicability.
Regarding claim 13, Harada teaches the NE of claim 10.
Harada does not explicitly teach wherein at least one processor is configured to cause the NE to determine the QCL based on the two indicated TCI states.
Zhang teaches wherein the at least one processor is configured to cause the UE to indicate two TCI states (¶ [0137], it may be possible for one CORESET to be configured with two TCI states. ¶ [0144], a gNB may be able to indicate 2 TCI states for CORESET 0. Different TCI states can be QCLed with different SSBs. It may be the case that a UE monitors the PDCCH in SS/CORESET 0 instances associated with SSBs from the 2 TCI states. ¶ [0140]).
Thus, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the invention, to indicate two TCI states and to configure the UE to determine the QCL based on the two indicated TCI states in the system of Harada to further improve industrial applicability.
Regarding claim 15, Harada teaches the NE of claim 10.
Harada does not explicitly teach wherein, at least one processor is configured to cause the NE to determine transmit signaling indicating that one or more TCI states are activated for the CORESET with index zero, and determines the monitoring occasion and the QCL are determined according to previously determined monitoring occasion and QCL.
Zhang teaches wherein the at least one processor is configured to cause the UE to determine, based at least in part on the signaling indicating that two TCI states are activated for the CORESET with index zero, the monitoring occasion
and the QCL according to previously determined monitoring occasion and QCL (figs. 7-10, ¶ [0135], It may be the case that a UE does not need to monitor all instances for the SS/CORESET 0; instead, the UE may only need to monitor the SS/CORESET 0 instance associated with one SSB from the most recent of a SSB associated with a random access channel (RACH) procedure or a SSB quasi-co-located (QCL) with the CSI-RS in the TCI state for the CORESET 0, at least according to some embodiments. ¶ [0140], ¶ [0141], ¶ [0144]).
Thus, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the invention, to indicate two TCI states and to configure the NE to determine, based at least in part on the signaling indicating that two TCI states are activated for the CORESET with index zero, the monitoring occasion and the QCL according to previously determined monitoring occasion and QCL in the system of Harada to further improve industrial applicability.
Allowable Subject Matter
12. Claim 9 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 9, prior art of record fails to teach or fairly suggest the combination of limitations specified in the base claim and intervening claim(s) and “wherein two TCI states are activated for the CORESET with index zero; and the at least one processor is configured to cause the UE to receive a Media Access Control – Control Element (MAC CE) that comprises a first TCI state indication and a second TCI state indication; the second TCI state indication uses one bit less than the first TCI state indication; and the one bit not used by the second TCI state indication is reused as the one or more of the first signaling bit or second signaling bit.”
Conclusion
13. Any inquiry concerning this communication or earlier communications from the examiner should be directed to MANDISH RANDHAWA whose telephone number is (571)270-5650. The examiner can normally be reached Monday-Thursday (9 AM-7 PM).
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/MANDISH K RANDHAWA/Primary Examiner, Art Unit 2477