Prosecution Insights
Last updated: October 23, 2026
Application No. 18/579,335

SEMICONDUCTOR OPTICAL DEVICE

Non-Final OA §103§112
Filed
Jan 13, 2024
Priority
Dec 27, 2021 — nonprovisional of PCTJP2021048613
Examiner
CAMACHO ALANIS, FERNANDA ADRIANA
Art Unit
2828
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Mitsubishi Electric Corporation
OA Round
1 (Non-Final)
56%
Grant Probability
Moderate
1-2
OA Rounds
1y 1m
Est. Remaining
98%
With Interview

Examiner Intelligence

Grants 56% of resolved cases
56%
Career Allowance Rate
26 granted / 46 resolved
-11.5% vs TC avg
Strong +42% interview lift
Without
With
+41.5%
Interview Lift
resolved cases with interview
Typical timeline
3y 11m
Avg Prosecution
16 currently pending
Career history
67
Total Applications
across all art units

Statute-Specific Performance

§103
51.1%
+11.1% vs TC avg
§102
17.8%
-22.2% vs TC avg
§112
31.1%
-8.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 46 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statement (IDS) submitted on 01/13/2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Claim Objections Claim 8 objected to because of the following informalities: Claim 8 states “the tip of the lead-out electrode is linear”. It should read “the tip of the lead-out electrode is a rectangular shape”. Appropriate correction is required. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 1-11 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 1 and 3-6 recites the limitation "the electrode pad" in page 2. There is insufficient antecedent basis for this limitation in the claim. Claim 1, 3, 5, 8-9 recites the limitation "the electrode-out electrode" in page 2. There is insufficient antecedent basis for this limitation in the claim. Claims 2, and 10-11 are rejected due to their dependency of claim 1. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-2, 5, 8 is/are rejected under 35 U.S.C. 103 as being unpatentable by Sano (Foreign Patent JP-3254053-B2). Regarding claim 1, Sano teaches a semiconductor optical device (Fig. 3a-b is a modulation unit 14) comprising: a semiconductor substrate (Fig. 1 substrate 1); a laser diode provided on the semiconductor substrate (Fig. 1 shows laser LD 13 on substrate 1; see also Fig. 5); a modulator (Fig. 3 modulation unit 14) provided on the semiconductor substrate (Fig. 3 modulation unit 14 is on substrate 1), having a modulator electrode (Fig. 3 electrode 6-2 & 6-3), and modulating laser light emitted from the laser diode (Fig. 5 shows modulator 14 modulates the light of LD 13); a plurality of lead-out electrodes led out from the modulator electrode (Fig. 3 lead out electrodes lead out from 6-2/6-3 respectively, see annotated figure below); and a plurality of electrode pads (Fig. 3 electrodes 6-1) respectively facing the plurality of lead-out electrode (Fig. 3 electrodes 6-1 respectively facing the plurality of “lead out electrodes”); and wherein a gap (Fig. 8 separation groove 8) is provided between the lead-out electrode and the electrode pad facing each other (Fig. 8 separation groove 8 is between “lead-out electrodes” and 6-1 facing each other). PNG media_image1.png 571 1043 media_image1.png Greyscale Sano fails to teach a tip of the lead-out electrode enters a cutout of the electrode pad. However, Sono in a different embodiment teaches a tip of the lead-out electrode enters a cutout of the electrode pad (Fig. 4 tip electrode 6-2 enters a cut out of electrode 6-1). It would have been obvious to a person of ordinary skill in the art prior to the effective filling date of the claimed invention to modify Sono’s device with a tip of the lead-out electrode enters a cutout of the electrode pad (e.g. having electrodes 6-1 in Fig. 3a surrounding the tip of “lead out electrodes” coming out of 6-2 & 6-3 ) as further taught by Sono because it would reduce crosstalk due to leakage current and electromagnetic interaction (from Sono page 4 paragraph 6 from the translated document). Regarding claim 2, Sano’s modified device teaches the semiconductor optical device according to claim 1, wherein a width of the gap (Fig. 3 separation groove) is 3 um or more and 10 um or less (from Sono Fig. 3 separation groove 8 is 10um, see page 3 paragraph 8). Regarding claim 5, Sano’s modified device teaches the semiconductor optical device according to claim 1, wherein widths of portions facing each other of the lead-out electrode and the electrode pad are the same (annotated figure 3a below shows widths of portions facing each other of the lead-out electrode and electrode 6-1 are the same). PNG media_image2.png 613 1191 media_image2.png Greyscale Regarding claim 8, Sano’s modified device teaches the semiconductor optical device according to claim 1, wherein the tip of the lead-out electrode is linear (Fig. 3 tip of the “lead out electrode” is linear, see annotated figure in claim 1). Regarding claim 9, Sano’s modified device teaches the semiconductor optical device according to claim 1, wherein the tip of the lead-out electrode is T-shaped (from Sano annotated Fig. 3a in claim 1 shows the tip of the “lead out electrode” being in a T-shaped). Regarding claim 11, Sano’s modified device teaches the semiconductor optical device according to claim 1, wherein the plurality of electrode pads are located on both sides of the modulator electrode (from Sano Fig. 3a electrodes 6-1 are located on both sides of electrodes 6-1 & 6-3). Claim(s) 6 is/are rejected under 35 U.S.C. 103 as being unpatentable by Sano (Foreign Patent JP-3254053-B2), as per claim 1, in further view of Kosugi (Foreign Patent JP-2014145973-A), hereinafter Kasugi. Regarding claim 6, Sano’s modified device teaches the semiconductor optical device according to claim 1. Sano’s modified device fails to teach wherein the electrode pad is a partially cut circle. However, Kasugi teaches an electrode pad is a partially cut circle (Fig. 2 electrode 12 is a partial cut circle). It would have been obvious to a person of ordinary skill in the art prior to the effective filling date of the claimed invention to modify Sono’s device in the view of Sano’s further embodiment in Fig. 4 with an electrode pad is a partially cut circle (e.g. modified electrode 6-1 in the view of Fig. 4 being partially cut circle) as taught by Kasugi because it would prevent removal and cracks of an of an electrode to which an electric signal for driving a semiconductor optical modulator is applied (from Nakajima abstract). Allowable Subject Matter Claim 3-4 and 10 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims. Regarding claim 3, Sono’s modified device teaches the semiconductor optical device according to claim 1. Sono’s modified device fails to teach a wire bonded to one of the plurality of electrode pads, wherein the wire is bonded to the lead-out electrode and the electrode pad facing each other across the gap. Inoue (Foreign Patent JP-2007266575-A) teaches a wire (Fig. 2 bond wire 23) bonded to one of the plurality of electrode pads (Fig. 2 bond wire 23 bonded to few electrodes 22b); however, it would not be obvious to a person of ordinary skill in the art to modified Sono’s device with a wire as taught by Inoue because Sono intends to keep the gap between lead-out electrode and electrode 6-1 without any wire to connect the gap. Regarding claim 10, Sono’s modified device teaches the semiconductor optical device according to claim 1 comprises plurality of electrode pad (from Sono Fig. 3a electrodes 6-1). Sono’s modified device fails to teach wherein the plurality of electrode pads are located only on one side of the modulator electrode. Nakayima (Foreign Patent JP-H10229245-A cited in the IDS) does not overcome the deficiencies of Sono’s modified device. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Yamada (Foreign Patent JP-2012208413-A) and Taguchi (US Patent US-20150349490-A1) teach modulators with electrodes/pads with a gap. Any inquiry concerning this communication or earlier communications from the examiner should be directed to FERNANDA ADRIANA CAMACHO ALANIS whose telephone number is (703)756-1545. The examiner can normally be reached Monday-Friday 7:30am-5:30pm Friday off. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, MinSun Harvey can be reached at (571) 272-1835. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /FERNANDA ADRIANA CAMACHO ALANIS/Examiner, Art Unit 2828 /MINSUN O HARVEY/Supervisory Patent Examiner, Art Unit 2828
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Prosecution Timeline

Jan 13, 2024
Application Filed
Oct 01, 2026
Non-Final Rejection mailed — §103, §112 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
56%
Grant Probability
98%
With Interview (+41.5%)
3y 11m (~1y 1m remaining)
Median Time to Grant
Low
PTA Risk
Based on 46 resolved cases by this examiner. Grant probability derived from career allowance rate.

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