DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-8,10,11,13-18 and 20 is/are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Casey (2008/0094766A1).
Casey discloses a surge protection circuit 10 for an electronic circuit having a common power bus 68, a first power bus R having a first voltage potential with respect to the common power bus 68, and a plurality of power lines 12, 14 providing power from the first power bus R to a plurality of load devices (not shown) coupled between the plurality of power lines 14 and the common power bus 68, the surge protection circuit comprising: a first surge protection device (SPD) 60 comprising: a first terminal 50 coupled to a second voltage potential 64 distinct from the first voltage potential; and a second terminal 69; a second SPD 62 comprising: a first terminal 69 coupled to the second voltage potential 66; and a second terminal 69 of a diode array comprising: a first plurality of diodes 52,56, each diode of the first plurality of diodes comprising: an anode coupled to a respective power line R of the plurality of power lines; and a cathode coupled to the second terminal 68 of the first SPD 60; and a second plurality of diodes 54,58, each diode of the second plurality of diodes comprising: a cathode coupled to a respective power line R of the plurality of power lines; and an anode coupled to the second terminal 69 of the second SPD; wherein the second terminal of the first SPD is further coupled to the common power bus 50.
Independent claims 8 and 16 fail to recite the anode and cathode diode limitations but dependent claims 10 and 17 recite the diode limitations addressed in the rejection of claim 1.
Dependent claims 3-7,13-15 and 20 recite current flow directions and polarities that would be addressed by the function and connection of diodes 52,54,56 and 58 of Casey.
Dependent claims 2, 11 and 18 are addressed by the presence of ground connection 50 between diodes 60 and 62.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 9, 12 and 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Casey (2008/0094766A1) in view of Little (4,740,859).
Casey discloses a surge protection circuit 10 for an electronic circuit having a common power bus 68, a first power bus R having a first voltage potential with respect to the common power bus 68, and a plurality of power lines 12, 14 providing power from the first power bus R to a plurality of load devices (not shown) coupled between the plurality of power lines 14 and the common power bus 68, the surge protection circuit comprising: a first surge protection device (SPD) 60 comprising: a first terminal 50 coupled to a second voltage potential 64 distinct from the first voltage potential; and a second terminal 69; a second SPD 62 comprising: a first terminal 69 coupled to the second voltage potential 66; and a second terminal 69 of a diode array comprising: a first plurality of diodes 52,56, each diode of the first plurality of diodes comprising: an anode coupled to a respective power line R of the plurality of power lines; and a cathode coupled to the second terminal 68 of the first SPD 60; and a second plurality of diodes 54,58, each diode of the second plurality of diodes comprising: a cathode coupled to a respective power line R of the plurality of power lines; and an anode coupled to the second terminal 69 of the second SPD; wherein the second terminal of the first SPD is further coupled to the common power bus 50.
The device taught by Casey fails to enclose the surge protector in a grounded housing.
Little discloses a surge protector device enclosed in housing 10 which is electrically connected to ground point 44.
It would have been obvious to one of ordinary skill in the art to combine the teachings of Casey and Little to meet the claims because the grounding of conductive enclosures and housing of electrical devices is a common practice in the art to prevent harmful voltages from forming on the housing and surrounding structures.
With regard to claim 9, the addition or removal of SPD units is a matter of design choice based on the needs of the overall circuit with respect to cost and performance considerations, with such a choice well within the abilities of persons of ordinary skill.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to STEPHEN W JACKSON whose telephone number is (571)272-2051. The examiner can normally be reached M-F 6:30-3:00.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Monica Lewis can be reached at 571-272-1838. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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SWJackson
February 5, 2026
/STEPHEN W JACKSON/Primary Examiner, Art Unit 2838