DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Claim Objections
Examiner notes claim 8 is written in improper dependent form. Claim 8 reads dependent on claim 8. For the purposes of examination of the instant application, claim 8 will be assumed to be dependent on claim 7.
Examiner also notes the rejections of claim 8 under 35 U.S.C. 112(d) below.
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 11/21/2025, 03/06/2026 and 07/29/2026 were filed after the filing date of the claimed application on 01/16/2024. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(d):
(d) REFERENCE IN DEPENDENT FORMS.—Subject to subsection (e), a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers.
The following is a quotation of pre-AIA 35 U.S.C. 112, fourth paragraph:
Subject to the following paragraph [i.e., the fifth paragraph of pre-AIA 35 U.S.C. 112], a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers.
Claim 8 is rejected under 35 U.S.C. 112(d) or pre-AIA 35 U.S.C. 112, 4th paragraph, as being of improper dependent form for failing to further limit the subject matter of the claim upon which it depends, or for failing to include all the limitations of the claim upon which it depends.
Claim 8 is rejected under 35 U.S.C. 112(d) or pre-AIA 35 U.S.C. 112, 4th paragraph, as being of improper dependent form for failing to further limit the subject matter of the claim upon which it depends, or for failing to include all the limitations of the claim upon which it depends.
Claim 8 is written in dependent form where the claim lists itself as the claim in which claim 8 is dependent on. Claim 8 reads “The method of claim 8” Examiner notes the quotation of 35 U.S.C. 112(d) which reads:
(d) REFERENCE IN DEPENDENT FORMS.—Subject to subsection (e), a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed.
In the case of the instant application, claim 8 fails to contain a reference to a claim previously set forth.
Applicant may cancel the claim(s), amend the claim(s) to place the claim(s) in proper dependent form, rewrite the claim(s) in independent form, or present a sufficient showing that the dependent claim(s) complies with the statutory requirements.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-9 and 12 are rejected under 35 U.S.C. 103 as being unpatentable over Ayari et al. (hereinafter Ayari) (WO 2020234847 A1) in view of Avramescu et al. (hereinafter Avramescu) (US 20110051771 A1).
Regarding claim 1, Ayari discloses,
A method [1000 Fig. 10] (Para. [0094]) for producing a plurality of semiconductor LED [108] (Para. [0094]), comprising:
- providing a growth substrate [102] (Para. [0095]),
- applying a mask layer [202 Fig. 2A] (Para. [0075]) having a plurality of openings [204 Fig. 2A] (Para. [0075]) onto the growth substrate [102 Fig. 2A] (Para. [0075]), such that that regions of the growth substrate [102] are exposed through the openings [204 Fig. 2A] (Para. [0075]),
- applying a first intermediate layer [104 Fig. 1] (Paras. [0078,0079]) at least onto the exposed regions of the growth substrate [102 Fig. 1] (Para. [0078]), wherein the first intermediate layer [104 Fig. 1] comprises a quasi-two- dimensional material (Para. [0078]), and
- epitaxially growing an epitaxial semiconductor layer
sequence [108 Fig. 1] on the first intermediate layer [104 Fig. 1] (Paras. [0074,0097]) wherein the epitaxial semiconductor layer sequence [108 Fig. 1] comprises an active layer [112 Fig. 1] for generating electromagnetic radiation (Para. [0074]).
Ayari fails to disclose,
The method producing surface-emitting semiconductor laser diodes
Avramescu discloses in Fig. 8,
Surface-emitting semiconductor laser optoelectric components (Paras. [0025,0077])
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement the surface-emission as disclosed in Avramescu in the device of Ayari for the purpose of allowing light emission in a vertical direction from the device. (Avramescu Paras. [0024,0025])
Regarding claim 2, Ayari in view of Avramescu discloses the method outlined in the rejection of claim 1 above and further discloses,
wherein an area of the opening [Ayari 204 Fig. 2A] (Ayari Para. [0076]) corresponds to an area of an aperture of the semiconductor laser diode [Ayari 108] (Ayari Paras. [0076,0092] and Avramescu Para. [0060]).
Para. [0076] of Ayari discloses that the area [204] can be based on a desired area of LED device [108]. Para. [0092] of Ayari discloses that the LED [108] is played with the p-layer facing upwards. When the surface emitting structure of Avramescu is implemented into the structure of Ayari, the P-side surface of Ayari will be the emission aperture as shown with the structure of Avramescu Fig. 8.
Regarding claim 3, Ayari in view of Avramescu discloses the method outlined in the rejection of claim 1 above but fails to disclose,
wherein at least one opening has an area larger than an
aperture of the semiconductor laser diode.
Avramescu discloses in Fig. 8,
an aperture [emission area of 13 between 14] with a smaller area than an area of the laser diode (Fig. 8)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement the smaller aperture size as shown in Avramescu Fig. 8 in the modified method of Ayari for the purpose of ensuring emission in a central region of the active layer. (Avramescu Para. [0070])
Regarding claim 4, Ayari in view of Avramescu discloses the method outlined in the rejection of claim 1 above and further discloses in Ayari,
wherein the mask layer [202 Fig. 2A] comprises a dielectric (Para. [0075]).
Regarding claim 5, Ayari in view of Avramescu discloses the method outlined in the rejection of claim 1 above and further discloses in Ayari,
wherein the quasi-two-dimensional material [104] is selected from the group of: hexagonal boron nitride (h-BN) (Para. [0078]), graphene, molybdenum disulfide, tungsten diselenide, fluorographene.
Regarding claim 6, Ayari in view of Avramescu discloses the method outlined in the rejection of claim 1 above and further discloses in Ayari,
wherein the first intermediate layer [104] has a thickness between 0.5 nanometers and 100 nanometers, inclusive (Para. [0079]).
Regarding claim 7, Ayari in view of Avramescu discloses the method outlined in the rejection of claim 1 above and further discloses in Ayari,
wherein semiconductor layer stacks are epitaxially grown (Paras. [0076,0077]) in the openings [204] during epitaxial growth of the epitaxial semiconductor layer sequence 108] (Para. [0076]).
Regarding claim 8, Ayari in view of Avramescu discloses the method outlined in the rejection of claim 1 above and further discloses in Ayari,
wherein the semiconductor layer stacks have vertical side surfaces (see Fig. 1 and Fig. 4A) (Para. [0083]).
Regarding claim 9, Ayari in view of Avramescu discloses the method outlined in the rejection of claim 1 above and further discloses in Ayari,
wherein the epitaxial semiconductor layer sequence [108] comprises a nitride compound semiconductor material (Para. [0073]).
Regarding claim 12, Ayari in view of Avramescu discloses the method outlined in the rejection of claim 1 above and further discloses in Ayari,
wherein the epitaxial semiconductor layer sequence [108] is mechanically detached (Para. [0092]) from at least one intermediate layer [104] (Para. [0078]) and transferred to a carrier [802] (Para. [00100]).
Claims 10 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Ayari in view of Avramescu as applied to claim 1 above, and further in view of Marx et al. (hereinafter Marx) (US 5880485 A).
Regarding claim 10, Ayari in view of Avramescu discloses the method outlined in the rejection of claim 1 above but fails to disclose,
wherein the epitaxial semiconductor layer sequence comprises at least a second intermediate layer which is arranged between a main surface of the epitaxial semiconductor layer sequence facing the first intermediate layer and the active layer, wherein the
second intermediate layer comprises a quasi-two- dimensional material.
Marx discloses in Fig. 7,
an epitaxial semiconductor layer sequence [layers above 1] (Col. 8, lines 38-42) comprises at least a second intermediate layer [5”] (Col. 7, lines 57-63) which is arranged between a main surface of an epitaxial semiconductor layer sequence [top surface of 1] (Col. 8, lines 38-42) facing a first intermediate layer [7] (Col. 8, lines 38-42) and the active layer [active layer 9 above 5” see fig. 8] (Col. 9, lines 1-5), wherein the
second intermediate layer [5”] comprises a quasi-two- dimensional material (Col. 7, lines 57-63).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement a second intermediate layer as shown in Marx in the modified device of Ayari for the purpose of improved crystalline growth. (Marx Col. 7, lines 57-63)
Regarding claim 16, Ayari in view of Avramescu and Marx discloses the method outlined in the rejection of claim 10 above and further discloses,
wherein between the first intermediate layer [Ayari 104 Fig. 1] and the second intermediate layer [Marx 5” Fig. 7] a semiconductor layer [Marx 6 Fig. 7] (Marx Col. 8, line 40) is arranged that is free of a quasi-two-dimensional material (Marx Col. 8, line 40).
Claims 11,13 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Ayari in view of Avramescu as applied to claim 1 above, and further in view of Holder et al. (hereinafter Holder) (US 20140023102 A1).
Regarding claim 11, Ayari in view of Avramescu discloses the method outlined in the rejection of claim 1 above but fails to disclose,
wherein - the epitaxial semiconductor layer sequence comprises
an etch stop layer, and
- the etch stop layer is arranged between the active layer and the intermediate layer closest to the active layer.
Holder discloses in Fig. 1(a),
an epitaxial semiconductor layer sequence [Fig. 1(a)] (Paras. [0062,0066]) comprising
an etch stop layer [104] (Para. [0066]), and
- the etch stop layer [104] is arranged between an active layer [110a] (Para. [0066]) and a growth substrate [100] (Para. [0062]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement the etch stop layer as shown in holder below the active layer of the modified method of Ayari for the purpose of allowing selectable etching after removal from the growth substrate. (Holder Para. [0080])
Regarding claim 13, Ayari in view of Avramescu and Holder discloses the method outlined in the rejection of claim 11 above and further discloses,
wherein the epitaxial semiconductor layer sequence is removed up to the etch stop layer [Holder 104 Fig. 1(m)] (Holder Para. [0080]).
Regarding claim 14, Ayari in view of Avramescu and Holder discloses the method outlined in the rejection of claim 13 but fails to disclose,
wherein a contact layer of a light-transmitting material is deposited on a main surface of the epitaxial semiconductor layer sequence facing away from the carrier.
Avramescu discloses in Fig. 1,
a contact layer [11] (Para. [0061]) of a light-transmitting material [13 through 11] (Para. [0060,0061]) deposited on a main surface of a semiconductor layer sequence on a p-side of the device [tope side of 5 Fig. 1] (Para. [0061])
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement the transparent contact layer as shown in Avramescu in the modified method of Ayari for the purpose of electrical contact that allows surface emission. (Avramescu Paras. [0061,0065])
Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Ayari in view of Avramescu as applied to claim 12 above, and further in view of Kim (US 20180197736 A1).
Regarding claim 15, Ayari in view of Avramescu discloses the device outlined in the rejection of claim 12 above but fails to disclose,
wherein the carrier is configured for heat dissipation.
Kim discloses,
a transferred carrier configured for heat dissipation (Paras. [0007,0090])
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement the heat dissipating carrier as disclosed in Kim in the modified method of Ayari for the purpose of addressing the problem of heat accumulation. (Kim Para. [0007])
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Examiner notes (US 20100147370 A1) which discloses the use of a plurality of 2D layers for the purpose of multiple lift offs. See PTO-892 form.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HUNTER J NELSON whose telephone number is (571)270-5318. The examiner can normally be reached Mon-Fri. 8:30am-5:00 ET.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, MinSun Harvey can be reached at (571) 272-1835. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/H.J.N./Examiner, Art Unit 2828 /TOD T VAN ROY/Primary Examiner, Art Unit 2828
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