DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1, 2, 4, 6, 8, 11, 13, 16, 17 is/are rejected under 35 U.S.C. 102a1/2 as being anticipated by Hashimoto (US 2009/0323749).
With respect to claim 1, Hashimoto discloses An optical semiconductor element (fig.4) comprising: a substrate (fig.4 #2n); a mesa (fig.4 #20a) in which a part of a first cladding layer (fig.4 #3n) at least, an active layer (fig.4 #5), and a second cladding layer (fig.4 #7p) that are formed on the substrate and stacked in this order from below; an electron barrier layer (fig.4 #10b, [0034], p-InP) formed on both side surfaces of the mesa so as to cover at least side surfaces of the active layer and the second cladding layer (fig.4 #10b on either side), the electron barrier layer serving as an electron barrier with respect to the active layer ([0011,34] due to formation adjacent active); a semi-insulating high resistance buried layer (fig.4 #9, [0029]) formed on both sides of the mesa so as to bury the mesa and the electron barrier layer (fig.4 buries both sides; and a contact layer (fig.4 #8p) formed on the second cladding layer, wherein the high resistance buried layer formed on both the sides of the mesa is a continuous member (fig.4 no discontinuities in #9), and an entire lower surface of the high resistance buried layer is in contact with the substrate or the first cladding layer (fig.4 entire bottommost surface of #9 in direct contact with substrate).
With respect to claim 2, Hashimoto discloses the high resistance buried layer is made of InP ([0028]) doped with Fe or Ru ([0029]), and the electron barrier layer is made of p-type InP doped with Zn ([0032-33]).
With respect to claim 4, Hashimoto discloses the electron barrier layer is made of AlInAs ([0031]).
With respect to claim 6, Hashimoto discloses the contact layer spreads (fig.4 #8p is non-zero in left/right direction) above the high resistance buried layer (fig.4 #8p is at least above portions of #9), and a hole barrier layer (fig.4 #11b) is formed between the high resistance buried layer and the contact layer to serve as a hole barrier with respect to the contact layer ([0034] as it is alongside the contact).
With respect to claim 8, Hashimoto discloses a method for manufacturing an optical semiconductor element (fig.4-5), the method comprising steps of: stacking a first cladding layer (fig.5a #3n), an active layer (fig.5a #5), and a second cladding layer (fig.5a #7p) on a substrate (fig.5a #2n) in this order; forming a mesa by etching both sides of a location where the mesa is to be formed from a top surface of the second cladding layer to the substrate is exposed or to a middle of the first cladding layer (fig.5b, [0039, 51] etching used for removal); forming a semi-insulating first high resistance buried layer on a top surface of the substrate or a top surface of the first cladding layer exposed by the etching on both sides of the mesa such that an upper end of the first high resistance buried layer on a side surface of the mesa does not extend beyond a lower end of the active layer (fig.5d lower portion of #9 up to lower portion of active); forming an electron barrier layer (fig.5b #10a) serving as an electron barrier with respect to the active layer ([0011,34] due to formation adjacent active) on both side surfaces of the mesa that are exposed; forming a second high resistance buried layer having the same material and composition as those of the first high resistance buried layer on the first high resistance buried layer so as to bury the mesa and the electron barrier layer (fig.5d upper remaining portion of #9); and forming a contact layer (fig.5a #8p) on the second cladding layer.
The Examiner notes no ordering of steps is required in the claimed method. Also, the layer #9 of Hashimoto is formed of a single material but is designated as being in two parts in the interpretation above.
With respect to claim 11, Hashimoto discloses the high resistance buried layer is made of InP ([0028]) doped with Fe or Ru ([0029]), and the electron barrier layer is made of p-type InP doped with Zn ([0032-33]).
With respect to claim 13, Hashimoto discloses the electron barrier layer is made of AlInAs ([0031]).
With respect to claim 16, Hashimoto discloses forming a hole barrier layer (fig.5b #11a) serving as a hole barrier with respect to the contact layer ([0034] as it is alongside the contact) on the second high resistance buried layer (fig.5d #9 touching #11a) between the step of forming the second high resistance buried layer and the step of forming the contact layer (contact layer formed in fig.5a, hole barrier in fig.5b, buried layer in fig.5d), wherein, in the step of forming the contact layer, the contact layer is formed so as to spread (fig.5d #8p is non-zero in left/right direction) over the high resistance buried layer (fig.4 #8p is at least over portions of #9).
With respect to claim 17, Hashimoto discloses the contact layer spreads (fig.4 #8p extends in left/right direction) above the high resistance buried layer (fig.4 #8p is at least above portions of #9), and a hole barrier layer (fig.4 #11b) is formed between the high resistance buried layer and the contact layer (fig.4 #11b between #8p and #9) to serve as a hole barrier with respect to the contact layer ([0034] as it is alongside the contact).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 3, 5, 12, 15, 18, 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hashimoto in view of Takeuchi (US 8455281).
With respect to claims 3 and 12, Hashimoto teaches the device and method outlined above, but does not teach a carrier concentration of the electron barrier layer is 2 x 10 17 cm-3 or more. Takeuchi teaches a related laser device (fig.3, col.2 lines 15-16) which includes a p-type layer for blocking electrons leaking from the active region (col.4 lines 29-34) which can be of InP or AlInAs (fig.3 #63, col.3 line 41-44) alongside a central mesa and adjacent burying layers (fig.3 #61) and further that the doping of the blocking layer is more than 2 x 10 17cm-3 (4 x 10 17-cm3, col.3 lines 41-44). It would have been obvious to one of ordinary skill in the art before the filing of the instant application to adapt the device of Hashimoto to make use of the doping level of Takeuchi in the electron blocking layer in order to utilize a material shown to effectively block electrons and leakage current (Takeuchi, col.4 lines 29-34)
With respect to claim 5, Hashimoto teaches the device outlined in the rejection of claim 1 above, including the mesa to extend completely through the lower clad, but does not teach, on the side surfaces of the mesa, a lower end of the electron barrier layer is in a range from a lower end of the active layer to a position 0.5 um lower than the lower end of the active layer. Takeuchi further teaches the mesa to be formed completely through the lower clad (fig.3) and that the thickness of the lower clad is 0.5um (col.3 lines 13-15). It would have been obvious to one of ordinary skill in the art before the filing of the instant application to adapt the device of Hashimoto by making use of the 0.5um thickness for the lower clad as taught by Takeuchi in order to control the optical mode to a desired position and shape.
Note that when the lower clad of Hashimoto is made 0.5um that the lower end of the electron barrier would be in a range from the lower end of the active layer toa position 0.5um lower than the lower end of the active as the electron barrier continues to extend completely through the modified lower clad thickness to the substrate.
With respect to claim 15, Hashimoto teaches the method outlined above, including the mesa to extend completely through the lower clad, but does not teach, on the side surfaces of the mesa, a lower end of the electron barrier layer is in a range from a lower end of the active layer to a position 0.5 um lower than the lower end of the active layer. Takeuchi further teaches the mesa to be formed completely through the lower clad (fig.3) and that the thickness of the lower clad is 0.5um (col.3 lines 13-15). It would have been obvious to one of ordinary skill in the art before the filing of the instant application to adapt the device of Hashimoto by making use of the 0.5um thickness for the lower clad as taught by Takeuchi in order to control the optical mode to a desired position and shape.
Note that when the lower clad of Hashimoto is made 0.5um that the lower end of the electron barrier would be in a range from the lower end of the active layer toa position 0.5um lower than the lower end of the active as the electron barrier continues to extend completely through the modified lower clad thickness to the substrate.
With respect to claims 18 and 19, Hashimoto, as modified, teaches the device and method outlined above, including the contact layer spreads (fig.4 #8p extends in left/right direction) above the high resistance buried layer (fig.4 #8p is at least above portions of #9), and a hole barrier layer (fig.4 #11b) is formed between the high resistance buried layer and the contact layer (fig.4 #11b between #8p and #9) to serve as a hole barrier with respect to the contact layer ([0034] as it is alongside the contact).
Claim(s) 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hashimoto in view of Shirasaki et al. (US 2017/0227722).
With respect to claim 7, Hashimoto teaches the device outlined in the rejection of claim 1 above, but does not teach an optical module comprising: a stem; a lead pin passing through the stem; a carrier fixed to the stem; the optical semiconductor element according to 1 that is fixed to the carrier and is electrically connected to the lead pin; and a lens cap that includes a lens that condenses laser light emitted from the optical semiconductor element to emit the laser light outside and a cylindrical cap to fix the lens and in which the cap is fixed to the stem so as to enclose the carrier and the optical semiconductor element. Shirasaki teaches an optical module (fig.1a) comprising: a stem (fig.1a #7); a lead pin passing through the stem (fig.1a #8); a carrier (fig.1a #3) fixed to the stem ([0023]); a semiconductor laser (fig.1a #1, [0023]) that is fixed to the carrier ([0023]) and is electrically connected to the lead pin ([0023] provides electrical signal and ground for laser); and a lens cap that includes a lens (fig.1a #6 and area immediately adjacent) that condenses laser light emitted from the optical semiconductor element to emit the laser light outside (fig.1a as seen at collection point) and a cylindrical cap (fig.1a #5, [0023]) to fix the lens and in which the cap is fixed to the stem so as to enclose the carrier and the optical semiconductor element ([0023]). It would have been obvious to one of ordinary skill in the art to make use of the optical module of Shirasaki to house the laser of Hashimoto in order to protect the laser and direct the output light in a desired manner.
Claim(s) 9, 10, 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hashimoto in view of Mori et al. (US 2015/0357793).
With respect to claim 9, Hashimoto teaches the method outlined above, including the first high resistance buried layer to be made of a group III-V compound (InP, [0032]), but does not teach a step of removing a deposition deposited on the first high resistance buried layer when the electron barrier layer is formed, by simultaneously supplying a halogen-based etching gas and a group V gas being the same as that supplied as a raw material gas for the first high resistance buried layer in the step of forming the first high resistance buried layer, between the step of forming the electron barrier layer and the step of forming the second high resistance buried layer. Mori teaches a method of forming a related buried laser device (fig.1a/b) which includes forming an InP region by simultaneously supplying a halogen-based etching gas ([0047], HCl) and a group V gas ([0047], P) being the same as that supplied as a raw material gas for the InP layer in the step of forming the InP layer, which is done simultaneously ([0047] and continuously ([0048]). It would have been obvious to one of ordinary skill in the art before the filing of the instant application to adapt the forming of the InP electron barrier to include flowing both a halogen based etching gas and a group V gas continuously and simultaneously as demonstrated by Mori in order to control the growth direction of the InP material (Mori, [0049]).
Note that by following the steps above the modified Hashimoto teaches removing a deposition deposited on the first high resistance buried layer when the electron barrier layer is formed (as Mori teaches the InP material is etched during the forming, [0049]), by simultaneously supplying a halogen-based etching gas and a group V gas being the same as that supplied as a raw material gas for the first high resistance buried layer in the step of forming the first high resistance buried layer (outlined above), between the step of forming the electron barrier layer and the step of forming the second high resistance buried layer (as the process is occurring the entire time the buried layer is formed and which includes the first part of the buried layer which is grown between the forming of the electron barrier and second part of the buried layer).
With respect to claim 10, Hashimoto teaches the method outlined above, including the electron barrier layer is made of InP ([0032]), but does not teach in the step of forming the electron barrier layer, a growth temperature of the electron barrier layer is 500 to 600 degrees C, and a flow rate of TMIn supplied as a raw material gas for the electron barrier layer is 2 x 10-4 mol/min or more. Mori further teaches that when forming an InP layer a growth temperature of the layer is 500 to 600 degrees C ([0048]), and a flow rate of In supplied as a raw material gas for the layer is 2 x 10-4 mol/min or more ([0049] 6.63 sccm converts to ~2.96 x 10-4 mol/min). It would have been obvious to one of ordinary skill in the art before the filing of the instant application to follow the temperature and flow rates of the InP formation of Hashimoto as taught by Mori in order to control the growth direction of the InP material (Mori, [0049]).
Mori further teaches growth by metal organic processes MOVPE ([0016]) and flowing In ([0048]) but does not specify TMIn. The Examiner takes Official notice that Trimethylindium is well-known in the art to be a reliable source for providing In material for III-V growth in organo-metallic processes. Therefore, it would have been obvious to one of ordinary skill in the art before the filing of the instant application to adapt the method of Hashimoto and Mori to further make use of TMIn in order to make use of a reliable In raw material source in the organo-metallic growth process.
With respect to claim 14, Hashimoto teaches the method outlined above, but does not teach in the step of forming the electron barrier layer, a halogen-based etching gas is supplied in addition to a raw material gas for the electron barrier layer. Mori teaches a method of forming a related buried laser device (fig.1a/b) which includes forming an InP region by simultaneously supplying a halogen-based etching gas ([0047], HCl) and a group V gas ([0047], P) being the same as that supplied as a raw material gas for the InP layer in the step of forming the InP layer, which is done simultaneously ([0047] and continuously ([0048]). It would have been obvious to one of ordinary skill in the art before the filing of the instant application to adapt the forming of the InP electron barrier to include flowing both a halogen based etching gas and a group V gas continuously and simultaneously as demonstrated by Mori in order to control the growth direction of the InP material (Mori, [0049]).
Claim(s) 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hashimoto and Takeuchi in view of Shirasaki.
With respect to claim 20, Hashimoto, as modified, teaches the device outlined in the rejection of claim 5 above, but does not teach an optical module comprising: a stem; a lead pin passing through the stem; a carrier fixed to the stem; the optical semiconductor element according to 5 that is fixed to the carrier and is electrically connected to the lead pin; and a lens cap that includes a lens that condenses laser light emitted from the optical semiconductor element to emit the laser light outside and a cylindrical cap to fix the lens and in which the cap is fixed to the stem so as to enclose the carrier and the optical semiconductor element. Shirasaki teaches an optical module (fig.1a) comprising: a stem (fig.1a #7); a lead pin passing through the stem (fig.1a #8); a carrier (fig.1a #3) fixed to the stem ([0023]); a semiconductor laser (fig.1a #1, [0023]) that is fixed to the carrier ([0023]) and is electrically connected to the lead pin ([0023] provides electrical signal and ground for laser); and a lens cap that includes a lens (fig.1a #6 and area immediately adjacent) that condenses laser light emitted from the optical semiconductor element to emit the laser light outside (fig.1a as seen at collection point) and a cylindrical cap (fig.1a #5, [0023]) to fix the lens and in which the cap is fixed to the stem so as to enclose the carrier and the optical semiconductor element ([0023]). It would have been obvious to one of ordinary skill in the art to make use of the optical module of Shirasaki to house the laser of Hashimoto in order to protect the laser and direct the output light in a desired manner.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Please see the included pto892 form for a list of related art.
JP 2017-17282, 11-204881 (Applicant submitted prior art) and US 6829275 are each noted as teaching devices very similar to claims 1 and 5.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TOD THOMAS VAN ROY whose telephone number is (571)272-8447. The examiner can normally be reached M-F: 8AM-430PM.
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/TOD T VAN ROY/ Primary Examiner, Art Unit 2828
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