DETAILED ACTION
Notice to Applicant
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claims 1-9, 11-16, 18-20, 26, and 36 are pending.
Claim Objections
Claims 1-4, 14, 16, 19-20, 26, and 36 are objected to because of the following informalities:
The following changes should be made to improve claim language clarity within the claims:
On the third to last line of claims 1 and 36; and line 10 of claim 26: change each occurrence of “some” to --a portion--.
On lines 2, 3, and 5 respectively of claim 2; lines 2-3 of claim 3; line 2 of claims 12-13; line 3 of claim 16; line 2 of claims 19-20; and line 7 of claim 36: insert --at least one-- before each occurrence of “functional”.
On lines 2-3 of claim 4; the last line of claim 14; and line 7 of claim 36: insert --at least one-- before “each occurrence of “heat”.
Appropriate correction is required.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1, 4-6, 26, and 36 are rejected under 35 U.S.C. 103 as being unpatentable over Goldberger et al. US Patent 6,094,112, as cited by the Applicant, in view of Credle et al. US Patent 5,340,947.
As per claims 1, 4-6, 26, and 36, Goldberger et al. discloses in Figs. 1-5 and 6a-6f a method for manufacturing and an electronic device (Col. 3 lines 7-11, cell phone) comprising a filter (e.g. filter 10), comprising an inductor (e.g. inductor 36) and a capacitor (e.g. capacitor 38), wherein a first electrode of the capacitor (e.g. top terminal of capacitor 38) is connected to a first terminal of the inductor (e.g. left terminal of inductor 36), and the filter further comprises:
as per claims 1, 26, and 36, a base substrate (e.g. printed circuit board 12), having at least one functional hole (e.g. vias 32 and 34); at least one column, arranged corresponding to the at least one functional hole, wherein the column is filled in the functional hole corresponding thereto (Col. 3 lines 26-28; Vias 32 and 34 are plated with a conductor (i.e. “at least one column”) to electrically connect terminations 20 and 22 to ground plane 30.); and a first conductive layer (Fig. 6a, layer comprising plates 48, 50, 52), located on a side of the base substrate (Fig. 3-4 and 6b, bottom side of dielectric layer 54 which is towards a side of the board 12 relative to layer 54), wherein the first conductive layer comprises: a first conductive line (e.g. plate 48), a partial structure of the first conductive line being used to form the first electrode of the capacitor (e.g. capacitor 38); a first transfer line (e.g. coil interconnect 62), connected to a side of the first conductive line (The coil interconnect 62 is electrically connected to plate 48 via a top side of the plate 48.); and a second conductive layer (e.g. plate structure 56a), located on a side of the first conductive layer away from the base substrate (The plate structure 56a is located on the top side of the plate 48 away from the board 12 which is disposed on a bottom side of plate 48.), wherein the second conductive layer comprises: a second conductive line (e.g. plate structure 56a), arranged corresponding to the first conductive line, wherein an orthographic projection of the second conductive line on the base substrate is located on an orthographic projection of the first conductive line on the base substrate (Figs. 6a and 6c; An orthographic projection of the plate 56a is at least partially disposed on an orthographic projection of the plate 48 in a vertical direction thereof.), and the second conductive line is used to form a second electrode of the capacitor (Plate 56a and plate 48 form capacitor 38.); and a third conductive line (e.g. coil 36), located on a side of the second conductive line and arranged corresponding to the first transfer line (Coil 36 is located on a top side of the plate 56a and is arranged corresponding to the inductor coil interconnect 62.), wherein the third conductive line is connected to the first transfer line through a via hole (e.g. via conductor 72), and the third conductive line is used to form a partial coil structure of the inductor (Coil 36 in Fig. 6e forms a portion of the inductor 36.), wherein at least a portion of the at least one column is insulated from the first conductive layer (At least a portion of the vias 32 and 34 are insulated from the capacitor plate 48 via substrate 44.);
as per claim 4, wherein the at least one column is a hollow column (Col. 5 lines 45-46; Metal is plated in the conductor channels of the vias. Thus, “at least one column” is a metal plated via hole or “hollow column”.), and an extension direction of a cavity of the at least one column is the same as an extension direction of the at least one column (An opening or “cavity” within the vias 32 and 34 extends in a vertical direction which is the same as a vertical direction extension of the vias 32 and 34.);
as per claim 5, wherein the at least one column is a solid at least one column (Col. 5 lines 45-46; Metal is plated in the conductor channels of vias, thus at least a portion of the vias is a solid metal.); and
as per claim 6, wherein the at least one column is a conductive column (Col. 5 lines 45-46; Metal is plated in the conductor channels of vias, thus is inherently conductive.).
However, Goldberger et al. does not disclose the at least one column being an at least one heat dissipation column; and a thermal conductivity of the heat dissipation column is greater than a thermal conductivity of the base substrate.
Credle et al. exemplarily discloses that copper is generally the preferred metal filler for via holes by reason of its excellent electrical and thermal conductivity (Col. 3 lines 1-3 of Credle et al.). Before the effective filing date, it would have been obvious to one of ordinary skill in the art to have replaced the generic metal material of the vias of Goldberger et al. with a specific copper material as exemplarily taught by the Credle et al. as being an obvious art substitution of equivalence with the motivation of providing the benefit of utilizing a material having excellent thermal conductivity (Col. 3 lines 1-3 of Credle et al.).
As an obvious consequence of the modification, the combination would have necessarily included: the at least one column being an at least one heat dissipation column; and a thermal conductivity of the heat dissipation column is greater than a thermal conductivity of the base substrate (As stated in Col. 3 lines 12-17 of Goldberger et al., board 12 is made of a low temperature organic material. Therefore, in the resultant circuit, it is inherent that copper (which has excellent thermal conductivity) within the vias necessarily has a greater thermal conductivity than the low temperature organic material (which has low thermal conductivity) within the “base substate”, as well-known in the art.).
Allowable Subject Matter
Claims 2-3, 7-9, 11-16, and 18-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
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/RAKESH B PATEL/Primary Examiner, Art Unit 2843
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