Prosecution Insights
Last updated: May 04, 2026
Application No. 18/580,376

ELECTRICAL VARIABLE CAPACITOR CIRCUIT AND SEMICONDUCTOR PROCESSING SYSTEM INCLUDING SAME

Non-Final OA §103
Filed
Jan 18, 2024
Priority
Aug 17, 2021 — RE 10-2021-0107945 +1 more
Examiner
TRA, ANH QUAN
Art Unit
2843
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Industrial Cooperation Foudation Jeonbuk National University
OA Round
3 (Non-Final)
73%
Grant Probability
Favorable
3-4
OA Rounds
1m
Est. Remaining
78%
With Interview

Examiner Intelligence

Grants 73% — above average
73%
Career Allowance Rate
808 granted / 1111 resolved
+4.7% vs TC avg
Moderate +5% lift
Without
With
+5.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
39 currently pending
Career history
1150
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
57.7%
+17.7% vs TC avg
§102
24.9%
-15.1% vs TC avg
§112
7.8%
-32.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1111 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Carroll et al. (US 20220076923) in view of Cuk (US 20110285369). As to claim 6, Carroll et al.’s figures 4 and 23 show an electrically variable capacitor circuit comprising: a first node (at upper node of L1 or node between C1 and C2) connected to one side of an RF power supply (102 or further includes C1 and C2. Circuit that provides power is considered as a power supply); a second node (ground) connected to the other side of the RF power supply; a variable capacitor (C3) connected to the first node (connected directly or via C2. Figure 4 shows that L1 connected in series with C3. Interchanging the places of L1 and C3 will not change the transfer function of the series connected circuit L1 and C3. Therefore, it would have been obvious to one having ordinary skill in the art to interchanging the places of L1 and C3 due to the doctrine of equivalent function, MPEP 2144.06). The figures fail to show the internal structure of at least one of the switches shown in figure 23. However, Cuk’s figure 2f shows an equivalent switch circuit that operatable in first and second quadrants. It would have been obvious to one having ordinary skill in the art to use Cuk’s figure 2f for at least one of the switches S1-S13 shown in Carroll et al.’s figure 23 due to the doctrine of equivalent and allowing the device to operate in first and second quadrants, thereby achieving optimum performance. Thus, the modified Carroll et al.’s figures further show a parallel branch (the variable inductor L1 which comprises inductor L11 connected in parallel with switch S11 shown in figure 23, wherein switch S11 comprises Cuk’s transistor connected in series with diode) connected to the second node, the parallel branch comprises a first branch and a second branch connected in parallel, wherein the first branch comprises a PIN diode (Cuk’s diode used in switch S11) and a switch (Cuk’s transistor in switch S11) connected in series and the second branch comprises an inductor (L11); and the variable capacitor (C3) connected to the first node and connected to the parallel branch in series, wherein the first node is directly connected to the RF power supply. Claim(s) 1-5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Carroll et al. (US 20220076923) in view of Cuk (US 20110285369) and Iizuka et al. (US 20140091980) As to claim 1, the modified Carroll’s figures fail to show plurality of variable capacitor circuits connected in parallel. However, Iizuka et al.’s figure 4 shows an impedance matching circuit comprises plurality of similar variable capacitor circuits connected in parallel. It would have been obvious to one having ordinary skill in the art to add a duplicated variable capacitor circuit (L1 and C3) connected in parallel to Carroll et al.’s current variable capacitor circuit L1 and C3 for the purpose of achieving desired gain and transfer function, or it would have been obvious to one having ordinary skill in the art to use the modified Carroll et al.’s variable capacitor circuit L1 and C3 for each of Iizuka et al.’s variable capacitor circuits for the purpose of achieving desired inductances. Thus, the modified Carroll et al.’s figures show a radio frequency (RF) power supply (Carroll et al.’s 102 or further includes C1 and C2) configured to generate and supply RF power; a plasma chamber (106) configured to receive the RF power from the RF power supply; and an impedance matching circuit (L1 and C3) disposed between the RF power supply and the plasma chamber to match output impedance to the plasma chamber, wherein the impedance matching circuit includes a plurality of electrically variable capacitor circuits [(L1, C3) and (duplicated L1 and duplicated C3)], and each of the electrically variable capacitor circuits includes a first node connected to one side of the RF power supply, a second node connected to the other side of the RF power supply, a parallel branch connected to the second node, the parallel branch comprises a first branch and a second branch connected in parallel, wherein the first branch comprises a PIN diode and a switch connected inseries and the second branch comprises an inductor, and a variable capacitor connected to the first node and connected to the parallel branch in series, wherein the first node is directly connected to the RF power supply (see the rejection of claim 6). As to claim 2, the modified Carroll et al.’s figures show that the plurality of electrically variable capacitor circuits have the same structure. As to claim 3, selecting the number of the plurality of electrically variable capacitor circuits to be 8 to 28 is seen as an obvious design preference to ensure optimum performance, MPEP 2144.05. As to claim 4, the modified Carroll et al.’s figures show an anode of the PIN diode is connected to the variable capacitor; and a cathode of the PIN diode is connected to the switch (Cuk’s figure 2f shows that diode is connected in series with transistor. Interchanging the places of diode and transistor will not change the transfer function of the series connected circuit diode and transistor. Therefore, it would have been obvious to one having ordinary skill in the art to interchanging the places of diode and transistor due to the doctrine of equivalent function, MPEP 2144.06). As to claim 5, the modified Carroll et al.’s figures show that a cathode of the PIN diode is connected to the variable capacitor; and an anode of the PIN diode is connected to the switch (if L1, C3 and Cuk’s transistor and diode remain in their original positions). Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANH-QUAN TRA whose telephone number is (571)272-1755. The examiner can normally be reached Mon-Fri from 8:00 A.M.-5:00 P.M. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrea Lindgren Baltzell can be reached at 571-272-5918. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /QUAN TRA/ Primary Examiner Art Unit 2843
Read full office action

Prosecution Timeline

Jan 18, 2024
Application Filed
Aug 27, 2025
Non-Final Rejection — §103
Nov 28, 2025
Response Filed
Dec 15, 2025
Final Rejection — §103
Mar 16, 2026
Request for Continued Examination
Mar 18, 2026
Response after Non-Final Action
Apr 09, 2026
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
73%
Grant Probability
78%
With Interview (+5.2%)
2y 4m (~1m remaining)
Median Time to Grant
High
PTA Risk
Based on 1111 resolved cases by this examiner. Grant probability derived from career allowance rate.

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