Prosecution Insights
Last updated: April 19, 2026
Application No. 18/582,230

STORAGE DEVICE AND A METHOD OF CONTROLLING DATA STORING AREA

Final Rejection §103
Filed
Feb 20, 2024
Examiner
WESTBROOK, MICHAEL L
Art Unit
2139
Tech Center
2100 — Computer Architecture & Software
Assignee
Hitachi, Ltd.
OA Round
2 (Final)
74%
Grant Probability
Favorable
3-4
OA Rounds
2y 11m
To Grant
80%
With Interview

Examiner Intelligence

Grants 74% — above average
74%
Career Allow Rate
160 granted / 216 resolved
+19.1% vs TC avg
Moderate +6% lift
Without
With
+6.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 11m
Avg Prosecution
17 currently pending
Career history
233
Total Applications
across all art units

Statute-Specific Performance

§101
3.8%
-36.2% vs TC avg
§103
47.0%
+7.0% vs TC avg
§102
20.3%
-19.7% vs TC avg
§112
23.8%
-16.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 216 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . This office action is in response to communication filed on August 8, 2025. Response to Amendment Applicant's submission filed on August 8, 2025 has been entered. Claims 15-17 have been added. Claims 1-17 are pending in the current application. Claims 1-17 are rejected herein. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-3, 6-7, 8-10, and 13-16 are rejected under 35 U.S.C. 103 as being unpatentable over Sicola et al. (Hereinafter Sicola, U.S. Patent No. 7,111,189) in view of Thomas (U.S. Patent No. 6,601,181) in view of Kobayashi (U.S. Publication No. 2010/0100678). Regarding claim 1, Sicola teaches: A storage apparatus comprising: a plurality of kinds of drives that store data in a non-volatile manner (See Col. 7 lines 14-17 “Storage arrays 203 and 213 typically comprise a plurality of magnetic disk storage devices, but could also include or consist of other types of mass storage devices such as semiconductor memory.” See log unit 1000 depicted in Figure 10 and log unit 1001 depicted in Figure 12. See Col. 15 lines 27-28 “The log unit is preferably located on the same storage array as the local remote copy set member,”); a plurality of controllers that control reading and writing of the data to and from a host (See Col. 8 lines 29-34 “Each pair of array controllers 201/202 and 211/212 (and associated storage array) is also called a storage node (e.g., 301 and 302), and has a unique Fibre Channel Node Identifier. As shown in FIG. 3, array controller pair A1/A2 comprise storage node 301, and array controller pair B1/B2 comprise storage node 302.” See Figures 2-4 which depicts controllers 201/202 (also referenced as A1/A2) and 211/212 (also referenced as B1/B2).); and a …memory that temporarily stores the data (See Col. 12 line 16-17 “In synchronous operation mode, data is written simultaneously to local controller cache memory” See Col. 12 line 46-47 “remote target controller B1 writes data to its write-back cache” See Col. 13 line 16 “the controller's non-volatile write-back cache `micro-log`” See Col. 13 line 64-67 “writes were logged to the initiator controller A1's write-back cache”); and wherein each of the plurality of controllers has a memory data protection function comprising: generating a cache data log including block-based data and a header related to update content of the block-based data, and writing the cache data log to any one of the plurality of kinds of drives (See lower section of Figure 10. See Col. 15 lines 32-34 “FIG. 10 is a high-level flow diagram showing a write history log operation performed by the present system 100 when both links are down, or when the remote site is down.” See Col. 15 lines 39-48 “The lower section of FIG. 10 shows system 100 operation when the links between the local and remote sites are down, or when the remote pair of array controllers 211/212 are inoperative, and thus array 213 is inaccessible to local site 218, as indicated by the broken arrow 1015. In this situation, as indicated by arrows 1020, write operations from the local host (ref. no. 101, shown in FIGS. 2 and 3), are directed by the initiator array controller (either 201 or 202 in FIGS. 2 and 3) to both array 203 and log unit 1000.” See Col. 16 lines 8-13 “As shown in FIG. 11, at step 1105, access from site 218 to target array 213 is broken, as indicated by arrow 1015 in FIG. 10. At step 1110, the write history logging operation of the present system is initiated by array controller 201 in response to a link failover situation” See Col. 16 lines 15-19 “At step 1115, write operations requested by host computer 101/102 are redirected by associated initiator array controller 201 (optionally, controller 202) from target controller 211 to log unit 1000.” See Col. 15 lines 26-30 “The log unit is preferably located on the same storage array as the local remote copy set member, but in an alternative embodiment, the log unit could be located on a separate storage device coupled to the array controller associated with the local remote copy set member.” See Col. 13 line 64-67 “these `outstanding` writes were logged to the initiator controller A1's write-back cache which is also mirrored in partner controller A2's non-volatile write-back cache (as a backup copy),” See Abstract “In the situation wherein an array controller fails during an asynchronous copy operation, the partner array controller uses a `micro log` stored in mirrored cache memory to recover transactions, in order, which were `missed` by the backup storage array when the array controller failure occurred.” See Abstract and Figures 2-4, Figure 10 and Figure 12, in which multiple controllers have the ability to implement a memory data protection function of generating a cache data log and storing it in a log unit storage device as a way to provide redundancy in failover operations. See Col. 13 lines 29-33 “The micro-log contains information to re-issue (`micro-merge`) the remote copies by either the `other` controller (in this example, controller A2) upon controller failover, or when `this` controller (A1) reboots, in the situation wherein both controllers A1 and A2 are down.” See Col. 14, lines 23-26 “In addition to command and LBN extent information, the micro-log contains the command sequence number and additional context to issue the commands in the same order received from the host.” See Col. 14 lines 36-39 “This process assures that the target data is always consistent with the initiator data, regardless of whether the system operations are synchronous or asynchronous.” See Col. 5 lines 9-13 “Because the present system employs an array controller-based `micro log` stored in mirrored cache memory which contains all commands and data for up to 240 transactions, the system is thus is capable of rapid recovery from array controller failure,” See Col. 17, lines 31-36 “FIG. 13 is a diagram showing an exemplary format 1300 of data and extent information stored on a log unit 1000/1001. As shown in FIG. 13, the Log Container (log unit) Descriptor (`LCD`) 1301 starts at logical block address (LBA) 0, and is used to describe attributes of the log `container` (i.e., the log unit).” See Col. 17, lines 51-58 “The Extent Descriptor header contains pointers 1306 to the next EDL and the previous EDL, more specifically, the next/previous EDL logical block address (LBA). The Extent Descriptor array member information includes (1) the LBA of the data at the target destination; (2) a pointer 1307 to the associated data segment 1303 on the log unit (the data LBA); (3) bit-encoded LCD membership parameters for the target(s)”), and wherein each of the plurality of controllers use the memory data protection function to select, from the plurality of kinds of drives, a first drive that is to store the cache data log, according to a necessary performance, and store the cache data log in the first drive (See lower section of Figure 10. See Col. 15 lines 32-34 “FIG. 10 is a high-level flow diagram showing a write history log operation performed by the present system 100 when both links are down, or when the remote site is down.” See Col. 15 lines 39-48 “In this situation, as indicated by arrows 1020, write operations from the local host (ref. no. 101, shown in FIGS. 2 and 3), are directed by the initiator array controller (either 201 or 202 in FIGS. 2 and 3) to both array 203 and log unit 1000.” See Col. 16 lines 8-13 “As shown in FIG. 11, at step 1105, access from site 218 to target array 213 is broken, as indicated by arrow 1015 in FIG. 10. At step 1110, the write history logging operation of the present system is initiated by array controller 201 in response to a link failover situation” See Col. 16 lines 15-19 “At step 1115, write operations requested by host computer 101/102 are redirected by associated initiator array controller 201 (optionally, controller 202) from target controller 211 to log unit 1000.” See Col. 15 lines 26-30 “The log unit is preferably located on the same storage array as the local remote copy set member, but in an alternative embodiment, the log unit could be located on a separate storage device coupled to the array controller associated with the local remote copy set member.” See Col. 13 line 64-67 “these `outstanding` writes were logged to the initiator controller A1's write-back cache which is also mirrored in partner controller A2's non-volatile write-back cache (as a backup copy),” See Abstract “In the situation wherein an array controller fails during an asynchronous copy operation, the partner array controller uses a `micro log` stored in mirrored cache memory to recover transactions, in order, which were `missed` by the backup storage array when the array controller failure occurred.” See Abstract and Figures 2-4, Figure 10 and Figure 12, in which multiple controllers have the ability to implement a memory data protection function of generating a cache data log and storing it in a log unit storage device 1000/10001 as a way to provide redundancy in failover operations. See Col. 5 line 50 – Col. 6 line 7 “The present system further provides a data logging mechanism (a write history `log unit`) for storing commands and data for every transaction that occurs in the situation where the remote backup storage device is unavailable because both links have failed, a remote site is down, or because of a site failover. The system performs an in-order merging of the log unit data with the data on the previously unavailable backup device to quickly return both local and remote sites to the same data state after link restoration or remote site restoration. In the situation wherein an array controller fails during an asynchronous copy operation, the partner array controller uses a `micro log` stored in mirrored cache memory to recover transactions which were `missed` by the backup storage array when the array controller failure occurred.” See Figure 10 and Figure 12 in view of Col. 5 line 50 – Col. 6 line 7, in which a log unit storage device is essentially selected to store data to increase/maintain system performance following failover operations, as such storage method/selection allows the system to return to the same data state prior to the failure/error.), and Sicola does not explicitly disclose what Thomas teaches: a volatile memory that temporarily stores the data (See Col. 1 lines 34-38 “in a conventional personal computing environment, the use of write back caches, wherein updated data intended for the disk is temporarily stored in volatile RAM to improve performance,”); and While Sicola does disclose a write-back cache memory that temporarily stores, Sicola does not disclose the write-back cache memory to be volatile memory. Thomas discloses that a write back cache memory being volatile memory is well-known and conventional in the art. Therefore, it would have been obvious to apply a known technique of write-back caching to a known volatile memory to yield predictable results. Sicola and Thomas do not explicitly disclose what Kobayashi teaches: a storage location management table for managing information related to at least a type and a capacity size regarding the plurality of kinds of drives (See Figure 8 and Figure 13, which depicts a Resource Management Table that corresponds to a RAID-G (Raid group) Information Table. This table contains an HDD Type column and a Free Capacity column for the storage devices.), wherein the storage apparatus utilizes the storage location management table to select the first drive, suppress a consumption of a storage capacity for saving a base image to the first drive, and reduce management information for managing free spaces of the first drive (See Figure 15, which depicts a storage allocation/selection process based on information that is found in the Resource Management Table. See Claim 8 of Kobayashi “the volume allocation unit updates an RAID group information table by collecting RAID group information from other storage devices, selects RAID groups in accordance with a region allocation method decided based on format characteristic, selects RAID groups in accordance with an HDD type decided based on a performance requirement, selects RAID groups based on IO performance, selects an RAID group based on a free capacity,”). The underlined portion of the claim is considered intended use/results by examiner. Intended use/results portions of the claim do not receive patentable weight. It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to combine the transaction log failover method of Sicola and the conventional storage method of Thomas with the storage selection/allocation method of Kobayashi to permit allocation of volumes to be decided in accordance with the volume usages of the applications, so that a problem concerned with performance competition among the applications can be prevented in advance (See paragraph [0008] of Kobayashi). Such combination would also reduce the load imposed on an administrator for a volume generation and configuration change process by managing volumes used by applications in accordance with the applications and using characteristics of the applications and information about host environments where the applications are operated (See paragraph [0006] of Kobayashi in view of Figure 15). Regarding claim 2, Sicola teaches: The storage apparatus according to claim 1, wherein, when a first controller of the plurality of controllers is blocked, a second controller of the plurality of controllers that is not blocked executes the memory data protection function (See Col. 15 lines 35-48 “The lower section of FIG. 10 shows system 100 operation when the links between the local and remote sites are down, or when the remote pair of array controllers 211/212 are inoperative, and thus array 213 is inaccessible to local site 218, as indicated by the broken arrow 1015. In this situation, as indicated by arrows 1020, write operations from the local host (ref. no. 101, shown in FIGS. 2 and 3), are directed by the initiator array controller (either 201 or 202 in FIGS. 2 and 3) to both array 203 and log unit 1000” See Col. 16 lines 8-13 “As shown in FIG. 11, at step 1105, access from site 218 to target array 213 is broken, as indicated by arrow 1015 in FIG. 10. At step 1110, the write history logging operation of the present system is initiated by array controller 201 in response to a link failover situation” See Col. 16 lines 15-19 “At step 1115, write operations requested by host computer 101/102 are redirected by associated initiator array controller 201 (optionally, controller 202) from target controller 211 to log unit 1000.” See Figure 10, in which the controller(s) 201/202 in the initiator array are used in a write history logging operation (memory protection method) to direct write operations to array 203 and log unit 1000 when remote pair array controllers 211/212 are inoperative (failed). See Figure 12.). Regarding claim 3, Sicola teaches: The storage apparatus according to claim 2, wherein the plurality of kinds of drives includes; a memory backup drive as a storage area for saving storage content of a memory of the first controller when the first controller is blocked (See log unit device/drive 1000 depicted in Figure 10. See Col. 15 lines 39-48 “The lower section of FIG. 10 shows system 100 operation when the links between the local and remote sites are down, or when the remote pair of array controllers 211/212 are inoperative, and thus array 213 is inaccessible to local site 218, as indicated by the broken arrow 1015. In this situation, as indicated by arrows 1020, write operations from the local host (ref. no. 101, shown in FIGS. 2 and 3), are directed by the initiator array controller (either 201 or 202 in FIGS. 2 and 3) to both array 203 and log unit 1000.” See Figure 10, in which data is backed up in the log unit device/drive 1000 when controllers 211/212 are inoperable/blocked and thus array 213 is inaccessible.), and a drive for user data that reads and writes the data regardless of whether or not the first controller is blocked (See array 203 depicted in Figure 10. See Col. 15 lines 39-48 “The lower section of FIG. 10 shows system 100 operation when the links between the local and remote sites are down, or when the remote pair of array controllers 211/212 are inoperative, and thus array 213 is inaccessible to local site 218, as indicated by the broken arrow 1015. In this situation, as indicated by arrows 1020, write operations from the local host (ref. no. 101, shown in FIGS. 2 and 3), are directed by the initiator array controller (either 201 or 202 in FIGS. 2 and 3) to both array 203 and log unit 1000.” See Figure 10, in which array 203 permits reads and writes regardless of whether or not controllers 211/212 are inoperable/blocked. See Figure 4, in which array 203 permits reads and writes when controllers 211/212 are operable/not blocked.). Regarding claim 6, Sicola teaches: The storage apparatus according to claim 2, wherein the block-based data includes a plurality of pieces of block-based data in which the data is divided into blocks, wherein the cache data log includes the block-based data and the header related to the update content of the block-based data, and wherein the second controller selects, from the plurality of kinds of drives, a drive that is to store the block-based data and the header as the cache data log (See Col. 17, lines 31-36 “FIG. 13 is a diagram showing an exemplary format 1300 of data and extent information stored on a log unit 1000/1001. As shown in FIG. 13, the Log Container (log unit) Descriptor (`LCD`) 1301 starts at logical block address (LBA) 0, and is used to describe attributes of the log `container` (i.e., the log unit).” See Col. 17, lines 51-58 “The Extent Descriptor header contains pointers 1306 to the next EDL and the previous EDL, more specifically, the next/previous EDL logical block address (LBA). The Extent Descriptor array member information includes (1) the LBA of the data at the target destination; (2) a pointer 1307 to the associated data segment 1303 on the log unit (the data LBA); (3) bit-encoded LCD membership parameters for the target(s)” See Col. 13 lines 29-33 “The micro-log contains information to re-issue (`micro-merge`) the remote copies by either the `other` controller (in this example, controller A2) upon controller failover, or when `this` controller (A1) reboots, in the situation wherein both controllers A1 and A2 are down.” See Col. 14, lines 23-26 “In addition to command and LBN extent information, the micro-log contains the command sequence number and additional context to issue the commands in the same order received from the host.” See Col. 5 lines 9-13 “Because the present system employs an array controller-based `micro log` stored in mirrored cache memory which contains all commands and data for up to 240 transactions, the system is thus is capable of rapid recovery from array controller failure,”) Regarding claim 7, Kobayashi teaches: The storage apparatus according to claim 2, wherein the second controller refers to the storage location management table to select the first drive that is to store the cache data log (See Figure 15, which depicts a storage allocation/selection process based on information that is found in the Resource Management Table. See Claim 8 of Kobayashi “the volume allocation unit updates an RAID group information table by collecting RAID group information from other storage devices, selects RAID groups in accordance with a region allocation method decided based on format characteristic, selects RAID groups in accordance with an HDD type decided based on a performance requirement, selects RAID groups based on IO performance, selects an RAID group based on a free capacity,”). It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to combine the transaction log failover method of Sicola and the conventional storage method of Thomas with the storage selection/allocation method of Kobayashi to permit allocation of volumes to be decided in accordance with the volume usages of the applications, so that a problem concerned with performance competition among the applications can be prevented in advance (See paragraph [0008] of Kobayashi). Such combination would also reduce the load imposed on an administrator for a volume generation and configuration change process by managing volumes used by applications in accordance with the applications and using characteristics of the applications and information about host environments where the applications are operated (See paragraph [0006] of Kobayashi in view of Figure 15). Regarding claim 15, Sicola teaches: The storage apparatus according to claim 1, wherein the block-based data and control information are duplicated between the plurality of controllers to prepare for a malfunction of one of the plurality of controllers (See Col. 5, lines 56-60 “the present system provides a peer-to-peer remote copy (backup) function which is implemented as a controller-based replication of one or more LUNs (logical units) between two remotely separated pairs of array controllers connected by redundant links.” See Col. 13 line 64 – Col. 14 line 1 “As indicated above, these `outstanding` writes were logged to the initiator controller A1's write-back cache which is also mirrored in partner controller A2's non-volatile write-back cache (as a backup copy), so that the cache data is available to controller A2 if controller A1's cache fails.” See Col. 14, lines 23-26 “In addition to command and LBN extent information, the micro-log contains the command sequence number and additional context to issue the commands in the same order received from the host.” See Col. 17, lines 31-33 “FIG. 13 is a diagram showing an exemplary format 1300 of data and extent information stored on a log unit 1000/1001.” See Col. 17, lines 31-63 in view of Figure 13. The underlined portion of the claim is considered intended use/results by examiner. Intended use/results portions of the claim do not receive patentable weight.). Regarding claim 16, Sicola teaches: The storage apparatus according to claim 1, wherein a memory backup drive of the storage apparatus comprises a saving location for the block-based data and control information written to a memory of a first controller of the plurality of controllers (See Col. 17, lines 31-63 in view of Figure 13.). Claim 8 is rejected for the same reasons as claim 1. Claim 9 is rejected for the same reasons as claim 2. Claim 10 is rejected for the same reasons as claim 3. Claim 13 is rejected for the same reasons as claim 6. Claim 14 is rejected for the same reasons as claim 7. Claims 4 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Sicola in view of Thomas in view of Kobayashi in view of Yamashita et al. (Hereinafter Yamashita, U.S. Publication No. 2014/0149691). Regarding claim 4, Yamashita teaches: The storage apparatus according to claim 3, wherein the second controller; selects the memory backup drive from the plurality of kinds of drives when the necessary performance is set to prioritize that a predetermined performance requirement related to reading and writing speed of data is satisfied, and selects the first drive for user data from the plurality of kinds of drives when the necessary performance is set to not prioritize that the predetermined performance requirement is satisfied (See [0057] “The selecting unit 413 may make the selection for the memory allocation request, based on priority level information that is based on the thread information. For example, if the priority level is high, the selecting unit 413 selects the high-speed main memory 103. If the priority level is low, the selecting unit 413 selects the DSP memory 202, which has a slower speed than the main memory 103.” See [0068] “For example, record 421-1 indicates that the available capacity of the main memory 103, which has the fastest access speed among the memory group, is 50 [Mbytes]. Record 421-2 indicates that the available capacity of the GPU memory 102, which has the next fastest access speed, is 10 [Mbytes]. Record 421-3 indicates that the available capacity of the DSP memory 202, which has a slow access speed, is 20 [Mbytes].” See [0102] “The data processing system may secure an area in any one among the main memory and peripheral memory, based on the priority level information of a thread that has issued a memory allocation request. The data processing system may secure an area in memory for which the memory access speed is high, if the thread that issued the memory allocation request has a high priority.” See [0103] “The data processing system may secure an area in peripheral memory, if the thread that issued the memory allocation request has an intermediate or a low priority and the peripheral memory has an available area.” See [0080]. Yamashita teaches different storage devices for allocation based on priority levels in relation to read/write speed.). It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to combine the transaction log failover method of Sicola and the conventional storage method of Thomas and the storage selection/allocation method of Kobayashi with the memory allocation method of Yamashita to manage power consumption based on performance needs, thus improving efficiency of power/energy management (i.e. See entirety of paragraph [0102] and paragraph [0103] of Yamashita). Claim 11 is rejected for the same reasons as claim 4. Claims 5 and 12 are rejected under 35 U.S.C. 103 as being unpatentable over Sicola in view of Thomas in view of Kobayashi in view of Kesavan et al. (Hereinafter Kesavan, U.S. Publication No. 2017/0031600). Regarding claim 5, Kesavan teaches: The storage apparatus according to claim 2, wherein the plurality of kinds of drives include at least one solid state drive, and wherein the second controller selects the solid state drive from the plurality of kinds of drives when the necessary performance is set to prioritize that a predetermined performance requirement is satisfied (See [0057] “The dynamic storage provisioning component 422 may select the first SSD storage device 404 and the second cloud storage 420 based upon the storage devices providing data access and performance that will satisfy the service level agreement 424 of the application 426.”). It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to combine the transaction log failover method of Sicola and the conventional storage method of Thomas and the storage selection/allocation method of Kobayashi with the dynamic storage selection method of Kesavan to ensure that storage level agreements are satisfied/maintained in a storage system by allowing dynamic selection of storage devices to maintain expected/desired performance metrics. Claim 12 is rejected for the same reasons as claim 5. Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over Sicola in view of Thomas in view of Kobayashi in view of Singh et al. (Hereinafter Singh, U.S. Publication No. 2019/0179918). Regarding claim 17, Singh teaches: The storage apparatus according to claim 1, wherein a base image area for storing the base image is allocated to part of a storage area of the first drive (See claim 5 of Singh “storing the first base image on a first storage device;” See [0135] “In step 506, the first base image and the first set of incremental files are stored. In one embodiment, the first base image may be stored using a first storage device of a first type”), the base image comprising at least control information (See Abstract “Each snapshot chain may correspond with a base image (e.g., a full image snapshot) and one or more incremental files (e.g., two forward incremental files) that derive from the base image.”). It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to combine the transaction log failover method of Sicola and the conventional storage method of Thomas and the storage selection/allocation method of Kobayashi with the snapshot storage method of Singh to permit back-up and restoration of different points in time for a storage system, thus providing data backup flexibility and improving data recovery. Response to Arguments Applicant's arguments filed August 8, 2025 have been fully considered but they are not persuasive. On page 8 of applicant’s arguments, applicant submitted that Sicola and Thomas fail to teach or disclose "a storage location management table" and/or "a cache data log," as recited by claim 1. In regards to the “storage location management table”, examiner submits that prior art Kobayashi was used in the previous office action to teach the “storage location management table”, and clarifies that neither Sicola nor Thomas were used to teach the “storage location management table”. Since applicant’s arguments regarding the storage location management table are all directed to either Sicola or Thomas (which were not used to reject the limitation) and were not directed to Kobayashi or the combination of Kobayashi and Sicola or Thomas regarding the “storage location management table”, such arguments are not persuasive. On page 8 of applicant’s arguments, applicant submitted that the micro-log disclosed in Sicola fails to teach or suggest any of the components of the claimed "a cache data log." Examiner respectfully disagrees as Col. 13 line 16 of Sicola discloses “the controller's non-volatile write-back cache `micro-log`” and Col. 13 line 64-67 discloses “writes were logged to the initiator controller A1's write-back cache”. Furthermore, see Abstract of Sicola “In the situation wherein an array controller fails during an asynchronous copy operation, the partner array controller uses a `micro log` stored in mirrored cache memory to recover transactions”. Also, see Col. 5 lines 9-13 “Because the present system employs an array controller-based `micro log` stored in mirrored cache memory which contains all commands and data for up to 240 transactions, the system is thus is capable of rapid recovery from array controller failure,”. On page 8 of applicant’s arguments, applicant submitted that the disaster-tolerant data backup of Sicola and the uninterruptible power supply system of Thomas do not relate to "a storage location management table for managing information related to at least a type and a capacity size regarding each of the plurality of kinds of drives" and/or "wherein each of the plurality of controllers has a memory data protection function comprising: generating a cache data log including block-based data and a header related to update content of the block-based data, as recited in claim 1. Examiner submits that Kobayashi was used previously and herein to teach “a storage location management table for managing information related to at least a type and a capacity size regarding each of the plurality of kinds of drives". Since the argument is not directed to Kobayashi in any fashion, such argument is not persuasive. Examiner maintains that the combination of Sicola and Thomas does in fact teach “wherein each of the plurality of controllers has a memory data protection function comprising: generating a cache data log including block-based data and a header related to update content of the block-based data”, as recited in claim 1, for the reasons stated herein (See rejection of claim 1.). On page 8 of applicant’s arguments, applicant submitted that Sicola and Thomas as a whole are completely devoid of "wherein the storage apparatus utilizes the storage location management table to select the first drive, suppress a consumption of a storage capacity for saving a base image to the first drive, and reduce management information for managing free spaces of the first drive," as recited by claim 1. Examiner submits that the storage apparatus utilizing the storage location management table to suppress a consumption of a storage capacity for saving a base image to the first drive, and reduce management information for managing free spaces of the first drive, is considered intended use/results, and will not receive patentable weight. Examiner submits that the prior art does teach “wherein the storage apparatus utilizes the storage location management table to select the first drive” for the reasons stated herein (See rejection of claim 1.). All pending claims in the instant application are rejected herein. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL L WESTBROOK whose telephone number is (571)270-5028. The examiner can normally be reached Mon-Fri 9am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Reginald Bragdon can be reached on (571) 272-4204. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MICHAEL L WESTBROOK/Examiner, Art Unit 2139 /REGINALD G BRAGDON/Supervisory Patent Examiner, Art Unit 2139
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Prosecution Timeline

Feb 20, 2024
Application Filed
Jun 14, 2025
Non-Final Rejection — §103
Aug 08, 2025
Response Filed
Nov 14, 2025
Final Rejection — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12547313
DEVICE AND METHOD FOR IMPLEMENTING LIVE MIGRATION
2y 5m to grant Granted Feb 10, 2026
Patent 12535964
SYSTEMS AND METHODS FOR HYBRID STORAGE
2y 5m to grant Granted Jan 27, 2026
Patent 12530138
MEMORY CONTROL DEVICE AND REFRESH CONTROL METHOD THEREOF
2y 5m to grant Granted Jan 20, 2026
Patent 12517656
COOPERATIVE ADAPTIVE THROTTLING BETWEEN HOSTS AND DATA STORAGE SYSTEMS
2y 5m to grant Granted Jan 06, 2026
Patent 12504876
FLEXIBLE METADATA REGIONS FOR A MEMORY DEVICE
2y 5m to grant Granted Dec 23, 2025
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
74%
Grant Probability
80%
With Interview (+6.0%)
2y 11m
Median Time to Grant
Moderate
PTA Risk
Based on 216 resolved cases by this examiner. Grant probability derived from career allow rate.

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