DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Species 1, readable on claims 1-22, and 26-28 in the reply filed on 1/26/2026 is acknowledged. Applicant further withdraws claims 23-25 for further consideration from the office, which potentially are directed towards non-elected species 2-4.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-3, 8, 10, 16, 19-22, and 26-28 is/are rejected under 35 U.S.C. 102(a)(1) and/or 102(a)(2) as being anticipated by Kamide et al. (US 20160127672, hereinafter Kamide).
Regarding claim 1, Kamide discloses an imaging system (fig. 1, ¶0024-0025) comprising:
at least one or more imaging terminals (10, fig. 1, ¶0024-0025); and
a server (100, fig. 1, ¶0024),
wherein the imaging terminal includes
an imaging unit (11+12+13, fig. 1) that includes an image sensor (12, fig. 1) and outputs imaging data (¶0025-0026),
a first communication unit (19, fig. 1) that transmits the imaging data output from the imaging unit to the server (step s04, fig. 2, ¶035-0036),
a first image processing engine (14, fig. 1) that performs image processing on the imaging data output from the imaging unit (The first ASIC 14 is a circuit that performs image processing of various kinds (for example, color interpolation processing, tone conversion processing, image compression processing, or the like) upon the digital image signal outputted by the A/D converter 13. And the first ASIC 14 outputs the digital signal upon which it has performed the image processing described above to the display unit 15 and/or to the recording medium 16. The imaging element 12 and the first ASIC 14 are disposed close to one another within the casing of the camera 10, and the processing load upon the imaging element 12 and upon the first ASIC 14 increases during capture of a movie image or during image processing of a movie image, and accordingly the amount of heat generated raises the temperature of the imaging element 12 and the temperature of the first ASIC 14. – ¶0026), and
a memory (16+18, fig. 1) that stores an image subjected to the image processing by the first image processing engine (And the first ASIC 14 outputs the digital signal upon which it has performed the image processing described above to the display unit 15 and/or to the recording medium 16. – ¶0026), and
the server (100, fig. 1, ¶0024) includes
a second communication unit (101, fig. 1) that receives the imaging data transmitted from the first communication unit of the imaging terminal (¶0030, ¶0034, ¶0039, ¶0049, ¶0055), and
a second image processing engine (102, fig. 1) that performs image processing on the received imaging data and generates an image for recording (¶0030, ¶0034, ¶0037-0039, ¶0043, ¶0048-0050, ¶0055-0057), the second image processing engine being different from the first image processing engine of the imaging terminal (fig. 1).
Regarding claim 2, Kamide discloses the imaging system according to claim 1,
wherein the second image processing engine generates a live view image based on continuously received imaging data (On the basis of the operational state of the camera 10 (i.e. whether the live viewing is in a still image mode or is in the movie image mode), the first control unit 21 deter nines whether to control the first ASIC 14 within the camera 10 to process this digital image signal, or to control the second ASIC 102 within the server 100 to perform this processing. – ¶0033).
Regarding claim 3, Kamide discloses the imaging system according to claim 1,
wherein the server records the image for recording generated by the second image processing engine to an image recording unit (…this second memory 104 also is capable of storing image data upon which image processing of various types has been performed by the second ASIC 102. – ¶0031).
Regarding claim 8, Kamide discloses the imaging system according to claim 1,
wherein the first image processing engine has only a part among functions that are able to perform the image processing with compared to the second image processing engine (As a method of sharing the image processing by the first ASIC 14 and the second ASIC 102, it may be suggested repeatedly to perform changeover processing to the second ASIC 102, after processing by the first ASIC 14 has been performed for some fixed time period. Alternatively, if the first control unit 21 displays the image data (i.e. the live view image) upon the display unit 15 at a rate of sixty frames per second, then, among the digital image signals outputted from the A/D converter 13 at the rate of sixty times per second, the first control unit 21 may output the odd numbered frames to the first ASIC 14, and may transmit the even numbered frames to the server 100 via the first communication unit 100. And in this case it is suggested that the first ASIC 14 should perform image processing upon the odd numbered frames, while the second ASIC 102 performs image processing upon the image numbered frames. – ¶0038. Also see ¶0048, ¶0050).
Regarding claim 10, Kamide discloses the imaging system according to claim 1,
wherein the first image processing engine has an arithmetic element having smaller thermal design power than the second image processing engine (… then the first communication unit 21 causes the second ASIC 102 in the server 100 to perform processing of the digital image signal outputted from the A/D converter 13. Since, due to this, the burden of calculation upon the first ASIC 14 is reduced and the amount of heat generated by the first ASIC 14 decreases, accordingly rise of the temperature of the imaging element 12 is suppressed. – ¶0043. First and second ASICs perform ISP functionalities implying inherent arithmetic element resides therein –
¶0026).
Regarding claim 16, Kamide discloses the imaging system according to claim 1,
wherein the first image processing engine has a configuration in which the number of executable commands is smaller than the second image processing engine (¶0111, complex method is understood taking a greater number of executable commands).
Regarding claim 19, Kamide discloses the imaging system according to claim 1,
wherein the imaging terminal transmits, in a case where an imaging instruction of a static image by a user operation is received (Furthermore, the operation unit 17 includes various operation members, such as a release switch for commanding preparatory operation for photography and photographic operation, a touch panel upon which settings of various types are established, a mode dial that selects the photographic mode, and so on. When the user operates these operation members, the operation unit 17 outputs operating signals corresponding to these operations to the first control unit 21. It should be understood that it would be acceptable to arrange for commands for photographing a still image and a movie image to be issued with the release switch, or alternatively a dedicated movie image capture switch may be provided. Moreover, the mode dial of this embodiment is capable of setting at least one of a plurality of still image modes and a movie image mode. – ¶0027), imaging instruction information from the first communication unit to the server (steps s04, s06, fig. 2, ¶0036-0039), and
the second image processing engine performs (102, fig. 1) the image processing on imaging data corresponding to the imaging instruction information among continuous imaging data (s05, s07, fig. 2, ¶0036-0039), and generates a static image for recording (And the second ASIC 102 is a circuit that performs image processing similar to that performed by the first ASIC 14. – ¶0030. In addition to the control program and the control parameters and so on mentioned above, this second memory 104 also is capable of storing image data upon which image processing of various types has been performed by the second ASIC 102. – ¶0031), in a case where the imaging instruction information is received via the second communication unit (On the other hand, if the first control unit 21 has determined that the second ASIC 102 is to be controlled to process the digital image signal, then the first control unit 21 transmits the digital image signal that has been outputted by the A/D converter 13 to the server 100 via the first communication unit 19. And, upon receipt of this digital image signal via the second communication unit 101, the second control unit 106 within the server 100 causes the second ASIC 102 to perform processing upon this received digital image signal. The second ASIC 102 generates image data (i.e. a live view image) by performing image processing of various types upon this digital image signal. – ¶0034).
Regarding claim 20, Kamide discloses the imaging system according to claim 1,
wherein the imaging terminal transmits recording instruction information or recording end instruction information from the first communication unit to the server in a case where a recording instruction or a recording end instruction of a video by a user operation is received (Furthermore, the operation unit 17 includes various operation members, such as a release switch for commanding preparatory operation for photography and photographic operation, a touch panel upon which settings of various types are established, a mode dial that selects the photographic mode, and so on. When the user operates these operation members, the operation unit 17 outputs operating signals corresponding to these operations to the first control unit 21. It should be understood that it would be acceptable to arrange for commands for photographing a still image and a movie image to be issued with the release switch, or alternatively a dedicated movie image capture switch may be provided. Moreover, the mode dial of this embodiment is capable of setting at least one of a plurality of still image modes and a movie image mode. – ¶0027), and
the second image processing engine (102, fig. 1) performs, in a case where the recording instruction information or the recording end instruction information is received via the second communication unit (On the other hand, if the first control unit 21 has determined that the second ASIC 102 is to be controlled to process the digital image signal, then the first control unit 21 transmits the digital image signal that has been outputted by the A/D converter 13 to the server 100 via the first communication unit 19. And, upon receipt of this digital image signal via the second communication unit 101, the second control unit 106 within the server 100 causes the second ASIC 102 to perform processing upon this received digital image signal. The second ASIC 102 generates image data (i.e. a live view image) by performing image processing of various types upon this digital image signal. – ¶0034), image processing on imaging data (s05, s07, fig. 2, ¶0036-0039) from receiving recording instruction information to receiving recording end instruction information among the continuous imaging data , and generates a video for recording (And the second ASIC 102 is a circuit that performs image processing similar to that performed by the first ASIC 14. – ¶0030. In addition to the control program and the control parameters and so on mentioned above, this second memory 104 also is capable of storing image data upon which image processing of various types has been performed by the second ASIC 102. – ¶0031).
Regarding claim 21, Kamide discloses the imaging system according to claim 1,
wherein the imaging terminal transmits terminal information indicating the imaging terminal to the server at a time of starting communication with the server (see fig. 4, specifically t2, t3),
the server acquires, in a case where the terminal information is received, RAW development information corresponding to the received terminal information, and
the second image processing engine performs image processing of performing RAW development on the imaging data based on the acquired RAW development information (And thereafter, at the time point t2, the temperature of the imaging element 12 as detected by the temperature sensor 20 becomes greater than the threshold value. Although the first control unit 21 starts transmission of the digital image signal outputted from the A/D converter 13 to the server 100 at this time point, the first control unit 21 causes the first ASIC 14 to execute in parallel the image processing. And at the time point t3, at which point a time interval has elapsed that is sufficient for absorbing the delay accompanying wireless communication, the first control unit 21 stops image processing by the first ASIC 14. – ¶0058).
Regarding claim 22, Kamide discloses the imaging system according to claim 2,
wherein the server transmits the live view image generated by the second image processing engine to the imaging terminal via the second communication unit, and
the imaging terminal displays the live view image on a display of the imaging terminal in a case where the live view image is received from the server via the first communication unit (On the other hand, if the first control unit 21 has determined that the second ASIC 102 is to be controlled to process the digital image signal, then the first control unit 21 transmits the digital image signal that has been outputted by the A/D converter 13 to the server 100 via the first communication unit 19. And, upon receipt of this digital image signal via the second communication unit 101, the second control unit 106 within the server 100 causes the second ASIC 102 to perform processing upon this received digital image signal. The second ASIC 102 generates image data (i.e. a live view image) by performing image processing of various types upon this digital image signal. And the second control unit 106 transmits this image data (i.e. the live view image) that has been generated by the second ASIC 102 to the camera 10 via the second communication unit 101. Upon receipt of this image data (i.e. the live view image) via the first control unit 21, the first control unit 21 within the camera 10 displays the live view image upon the display unit 15 – ¶0034).
23-25. Withdrawn
Regarding claim 26, Kamide discloses an imaging system (fig. 1, ¶0024-0025) comprising:
at least one or more imaging terminals (10, fig. 1, ¶0024-0025); and
a server (100, fig. 1, ¶0024); and
a server (100, fig. 1, ¶0024),
wherein the imaging terminal includes
an imaging unit (11+12+13, fig. 1) that includes an image sensor (12, fig. 1) and outputs imaging data (¶0025-0026), and
a first communication unit (19, fig. 1) that transmits the imaging data output from the imaging unit to the server (step s04, fig. 2, ¶035-0036),
the server (100, fig. 1, ¶0024) includes
a second communication unit (101, fig. 1) that receives the imaging data transmitted from the first communication unit of the imaging terminal (¶0030, ¶0034, ¶0039, ¶0049, ¶0055), and
an image processing engine (102, fig. 1) that performs image processing on the received imaging data to generate an image for recording (¶0030, ¶0034, ¶0037-0039, ¶0043, ¶0048-0050, ¶0055-0057),
data corresponding to one pixel of the image sensor (12, fig. 1) of the imaging data has gradation of a maximum number of bits converted by an analog-to-digital conversion circuit (13, fig. 1, ¶0026. Whatever the bit rate is generated in ADC 13, is understood as gradation of a maximum number of bits),
the image processing engine generates a live view image based on continuously received imaging data (On the other hand, if the first control unit 21 has determined that the second ASIC 102 is to be controlled to process the digital image signal, then the first control unit 21 transmits the digital image signal that has been outputted by the A/D converter 13 to the server 100 via the first communication unit 19. And, upon receipt of this digital image signal via the second communication unit 101, the second control unit 106 within the server 100 causes the second ASIC 102 to perform processing upon this received digital image signal. The second ASIC 102 generates image data (i.e. a live view image) by performing image processing of various types upon this digital image signal. And the second control unit 106 transmits this image data (i.e. the live view image) that has been generated by the second ASIC 102 to the camera 10 via the second communication unit 101. Upon receipt of this image data (i.e. the live view image) via the first control unit 21, the first control unit 21 within the camera 10 displays the live view image upon the display unit 15. – ¶0034),
the server transmits the generated live view image to the imaging terminal via the second communication unit (ibid, ¶0034), and
the imaging terminal displays the live view image on a display of the imaging terminal in a case where the live view image is received from the server via the first communication unit (ibid, ¶0034).
Regarding claim 27, Kamide discloses, an imaging terminal comprising:
the imaging system according to claim 1 (fig. 5, ¶0060, system in fig. 5 is understood as a scaled system based on system of fig. 1. Also, only the camera 10 of fig. 1 can also be reasonably understood as an imaging terminal).
Regarding claim 28, Kamide discloses, a server (server 100 of fig. 1) comprising:
the imaging system according to claim 1 (see claim 1 rejection below).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 4, 5, 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kamide in view of Honda e al. (US 20210227129 A1, hereinafter Honda).
Regarding claim 4, Kamide discloses the imaging system according to claim 1, except, wherein the second image processing engine has a technical specification higher than a technical specification of the first image processing engine.
However, Honda discloses that processing capabilities of the server 200 is higher than the processing capabilities of the image capture apparatus 100 (¶0111).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to modify the invention of Kamide to incorporate the teaching of Honda, such that second ASIC 102 has higher processing capabilities than the first ASIC 14, to obtain, wherein the second image processing engine has a technical specification higher than a technical specification of the first image processing engine, because, in that case, server can overtake higher image processing loads enabling a simpler, compact, less costly and more efficient camera design a possibility. The modification can be done by combining prior art elements ready to be improved according to known method to yield predictable results, which is obvious.
Regarding claim 5, Kamide in view of Honda discloses the imaging system according to claim 4, wherein the first image processing engine and the second image processing engine have different image processing performance (Honda: ¶0111).
Regarding claim 9, Kamide discloses the imaging system according to claim 1, except,
wherein the first image processing engine is capable of performing the image processing on a smaller number of pixels of an image than the second image processing engine.
However, Honda discloses that processing capabilities of the server 200 is higher than the processing capabilities of the image capture apparatus 100 (¶0111). Honda further discloses that a proxy image data includes thumbnail data, which has a lower resolution, and/or a lower bit depth, than the captured image data for recording and the RAW data (¶0076), indicating a smaller number of pixels at the terminal side than server side for processing.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to modify the invention of Kamide to incorporate the teaching of Honda, such that second ASIC 102 has higher processing capabilities than the first ASIC 14, to obtain, wherein the first image processing engine is capable of performing the image processing on a smaller number of pixels of an image than the second image processing engine, because, in that case, server can overtake higher image processing loads enabling a simpler, compact, less costly and more efficient camera design a possibility. The modification can be done by combining prior art elements ready to be improved according to known method to yield predictable results, which is obvious.
Claim(s) 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kamide in view of Jang (US 20150161755 A1).
Regarding claim 6, Kamide discloses the imaging system according to claim 1, except, wherein the first image processing engine is capable of the image processing on a smaller amount of information per pixel than the second image processing engine.
However, Jang discloses that ISP 140 in the terminal 100 side processes a thumbnail image at s203, than the ISP 142 on the server side which is capable of processing screen nail image, having a higher resolution than the terminal side thumbnail image (¶0015, 0024, 0029, 0062, 0067, 0069, 0072-0074, 0085-0088, 0114-0119, 0123-0128, 0134-0135, 0143-0145, 0154-0155). Higher resolution image is understood as having higher amount of information per pixel, since there are more pixels to be processed. Furthermore, Jang discloses that the terminal 100 has lower processing power than the server’s processor (¶0010, ¶0061).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to modify the invention of Kamide with the teaching of Jang of using the terminal and server combination as an overall distributed system to process images, so that a lower processing power terminal can have the server take over heavier processing duties to obtain, the first image processing engine is capable of the image processing on a smaller amount of information per pixel than the second image processing engine, because, operating the system in a distributed manner, based on the throughputs or processing power of the actual terminal and the cloud server, yields efficient capturing and viewing of images (Jang: ¶0010).
Claim(s) 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kamide in view of Jang and Honda.
Regarding claim 7, Kamide discloses the imaging system according to claim 1, except, wherein the first image processing engine has a different number of gradation bits or a different number of processing bits from the second image processing engine.
However, Jang discloses that ISP 140 in the terminal 100 side processes a thumbnail image at s203, than the ISP 142 on the server side which is capable of processing screen nail image, having a higher resolution than the terminal side thumbnail image (¶0015, 0024, 0029, 0062, 0067, 0069, 0072-0074, 0085-0088, 0114-0119, 0123-0128, 0134-0135, 0143-0145, 0154-0155). Higher resolution image is understood as having higher amount of information per pixel, since there are more pixels to be processed. Furthermore, Jang discloses that the terminal 100 has lower processing power than the server’s processor (¶0010, ¶0061).
Honda discloses that a proxy image data includes thumbnail data, which has a lower resolution, and/or a lower bit depth, than the captured image data for recording and the RAW data (¶0076). Bit depth is reasonably understood as number of gradation or processing bits.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to modify the invention of Kamide with the teaching of Jang and Honda of using the terminal and server combination as an overall distributed system to process images, so that a lower processing power terminal can have the server take over heavier processing duties such that a lower bits per pixel thumbnail image is processed at the terminal-end, leaving behind higher processing capable functionalities deferred to the server ISP, to obtain, wherein the first image processing engine has a different number of gradation bits or a different number of processing bits from the second image processing engine, because, operating the system in a distributed manner, based on the throughputs or processing power of the actual terminal and the cloud server, yields efficient capturing and viewing of images (Jang: ¶0010).
Claim(s) 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kamide in view of Honda and further in view of Shen et al. (US 20150357272 A1, herein after Shen).
Regarding claim 11, Kamide discloses the imaging system according to claim 1, except, wherein the first image processing engine has an arithmetic element having a smaller number of transistors than the second image processing engine.
However, Honda discloses in ¶0111 that the server processors are based on newer technologies and thus are capable of handling more complex methods than processing circuits in the camera 100 (… the development processing applied by the server 200 is processing based on a newer and/or more complex method than the processing performed by the image processing circuit 107 of the image capture apparatus 100, and can therefore achieve a better processing result than development processing applied by the image capture apparatus 100. This is due to the processing capabilities of the server 200 being higher than the processing capabilities of the image capture apparatus 100, and the image processing program 211 executed by the server 200 being based on newer technology than the image processing circuit 107 of the image capture apparatus 100
Kamide - First and second ASICs perform ISP functionalities implying inherent arithmetic element resides therein – ¶0026).
Shen on the other hand discloses that by Moore’s law newer technology yields circuits having higher number of transistors within same real estate thus increasing the transistor density (¶0005).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to modify the invention of Kamide to incorporate the teaching of Honda, such that second ASIC 102 has higher processing capabilities than the first ASIC 14, to obtain, wherein the first image processing engine has an arithmetic element having a smaller number of transistors than the second image processing engine, because, according to Moore’s Law newer technology chips yields higher number of transistors in same real estate, and incorporating Jang’s idea a server can overtake higher image processing loads enabling a simpler, compact, less costly and more efficient camera design a possibility. The modification can be done by combining prior art elements ready to be improved according to known method to yield predictable results, which is obvious.
Claim(s) 12, and 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kamide in view of Honda and further in view of Choudhury et al. (US 20170186667 A1, hereinafter Choudhury).
Regarding claim 12, Kamide discloses the imaging system according to claim 1, except, wherein the first image processing engine has a smaller number of processor cores than the second image processing engine.
However, Honda discloses in ¶0111 that the server processors are based on newer technologies and thus are capable of handling more complex methods than processing circuits in the camera 100 (… the development processing applied by the server 200 is processing based on a newer and/or more complex method than the processing performed by the image processing circuit 107 of the image capture apparatus 100, and can therefore achieve a better processing result than development processing applied by the image capture apparatus 100. This is due to the processing capabilities of the server 200 being higher than the processing capabilities of the image capture apparatus 100, and the image processing program 211 executed by the server 200 being based on newer technology than the image processing circuit 107 of the image capture apparatus 100
Kamide - First and second ASICs perform ISP functionalities implying inherent arithmetic element resides therein – ¶0026).
Choudhury on the other hand discloses that newer technology allows higher number of cores for processors with higher functionalities (¶0003).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to modify the invention of Kamide to incorporate the teaching of Honda, such that second ASIC 102 has higher processing capabilities than the first ASIC 14, to obtain, wherein the first image processing engine has a smaller number of processor cores than the second image processing engine, because, according to Chowdhury newer technology allows higher number of cores for processors with higher functionalities, and incorporating Jang’s idea – a server can overtake higher image processing loads enabling a simpler, compact, less costly and more efficient camera design a possibility. The modification can be done by combining prior art elements ready to be improved according to known method to yield predictable results, which is obvious.
Regarding claim 17, Kamide discloses the imaging system according to claim 1, except, wherein the first image processing engine has a configuration in which the number of calculation units for executing a calculation command is smaller than the second image processing engine.
However, Honda discloses in ¶0111 that the server processors are based on newer technologies and thus are capable of handling more complex methods than processing circuits in the camera 100 (… the development processing applied by the server 200 is processing based on a newer and/or more complex method than the processing performed by the image processing circuit 107 of the image capture apparatus 100, and can therefore achieve a better processing result than development processing applied by the image capture apparatus 100. This is due to the processing capabilities of the server 200 being higher than the processing capabilities of the image capture apparatus 100, and the image processing program 211 executed by the server 200 being based on newer technology than the image processing circuit 107 of the image capture apparatus 100
Kamide - First and second ASICs perform ISP functionalities implying inherent calculation units for executing a calculation command resides therein – ¶0026).
Choudhury on the other hand discloses that newer technology allows higher number of cores for processors with higher functionalities (¶0003. Limitation calculation units for executing a calculation command could reasonably be understood as number of processor cores executing calculation commands).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to modify the invention of Kamide to incorporate the teaching of Honda, such that second ASIC 102 has higher processing capabilities than the first ASIC 14, to obtain, wherein the first image processing engine has a configuration in which the number of calculation units for executing a calculation command is smaller than the second image processing engine, according to Chowdhury newer technology allows higher number of cores for processors with higher functionalities, and incorporating Jang’s idea – a server can overtake higher image processing loads enabling a simpler, compact, less costly and more efficient camera design a possibility. The modification can be done by combining prior art elements ready to be improved according to known method to yield predictable results, which is obvious.
Claim(s) 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kamide in view of Honda and further in view of Chang et al. (US 20070220234 A1, hereinafter Chang).
Regarding claim 13, Kamide discloses the imaging system according to claim 1, except, wherein the first image processing engine includes an arithmetic element having a lower operation clock frequency than the second image processing engine.
However, Honda discloses in ¶0111 that the server processors are based on newer technologies and thus are capable of handling more complex methods than processing circuits in the camera 100 (… the development processing applied by the server 200 is processing based on a newer and/or more complex method than the processing performed by the image processing circuit 107 of the image capture apparatus 100, and can therefore achieve a better processing result than development processing applied by the image capture apparatus 100. This is due to the processing capabilities of the server 200 being higher than the processing capabilities of the image capture apparatus 100, and the image processing program 211 executed by the server 200 being based on newer technology than the image processing circuit 107 of the image capture apparatus 100
Kamide - First and second ASICs perform ISP functionalities implying inherent arithmetic element resides therein – ¶0026).
Chang on the other hand discloses that by newer technology for ASICs allow funning circuits using higher clock frequencies than before (¶0005).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to modify the invention of Kamide to incorporate the teaching of Honda, such that second ASIC 102 has higher processing capabilities than the first ASIC 14, to obtain, wherein the first image processing engine includes an arithmetic element having a lower operation clock frequency than the second image processing engine, because, according to Cheng newer technology chips faster operating frequencies for similar circuits, and incorporating Jang’s idea – a server can overtake higher image processing loads enabling a simpler, compact, less costly and more efficient camera design a possibility. The modification can be done by combining prior art elements ready to be improved according to known method to yield predictable results, which is obvious.
Claim(s) 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kamide in view of Honda and further in view of Yamano (US 20020114208 A1).
Regarding claim 14, Kamide discloses the imaging system according to claim 1, except, wherein the first image processing engine includes an arithmetic element having a lower rated operating current value than the second image processing engine.
However, Honda discloses in ¶0111 that the server processors are based on newer technologies and thus are capable of handling more complex methods than processing circuits in the camera 100 (… the development processing applied by the server 200 is processing based on a newer and/or more complex method than the processing performed by the image processing circuit 107 of the image capture apparatus 100, and can therefore achieve a better processing result than development processing applied by the image capture apparatus 100. This is due to the processing capabilities of the server 200 being higher than the processing capabilities of the image capture apparatus 100, and the image processing program 211 executed by the server 200 being based on newer technology than the image processing circuit 107 of the image capture apparatus 100
Kamide - First and second ASICs perform ISP functionalities implying inherent arithmetic element resides therein – ¶0026).
Yamano on the other hand discloses that recent development in fine processing technology yields a lower operating current for circuitry including memory devices (¶0016).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to modify the invention of Kamide to incorporate the teaching of Honda, such that second ASIC 102 has higher processing capabilities than the first ASIC 14, to obtain, wherein the first image processing engine includes an arithmetic element having a lower rated operating current value than the second image processing engine, because, according to Yamano recent development in fine processing technology yields a lower operating current for circuitry including memory devices, and incorporating Jang’s idea – a server can overtake higher image processing loads enabling a simpler, compact, less costly and more efficient camera design a possibility. The modification can be done by combining prior art elements ready to be improved according to known method to yield predictable results, which is obvious.
Claim(s) 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kamide in view of Honda and further in view of David et al. (US 20180373552 A1, hereinafter David).
Regarding claim 15, Kamide discloses the imaging system according to claim 1, except, wherein the first image processing engine has a smaller cache memory capacity than the second image processing engine.
However, Honda discloses in ¶0111 that the server processors are based on newer technologies and thus are capable of handling more complex methods than processing circuits in the camera 100 (… the development processing applied by the server 200 is processing based on a newer and/or more complex method than the processing performed by the image processing circuit 107 of the image capture apparatus 100, and can therefore achieve a better processing result than development processing applied by the image capture apparatus 100. This is due to the processing capabilities of the server 200 being higher than the processing capabilities of the image capture apparatus 100, and the image processing program 211 executed by the server 200 being based on newer technology than the image processing circuit 107 of the image capture apparatus 100
Kamide - First and second ASICs perform ISP functionalities implying inherent arithmetic element resides therein – ¶0026).
David on the other hand discloses that servers with newer technology comprises faster processor speeds, larger data width, faster memory access speeds, larger internal cache, etc. (¶0016).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to modify the invention of Kamide to incorporate the teaching of Honda, such that second ASIC 102 has higher processing capabilities than the first ASIC 14, to obtain, wherein the first image processing engine has a smaller cache memory capacity than the second image processing engine, because, according to David servers with newer technology comprises faster processor speeds, larger data width, faster memory access speeds, larger internal cache, etc., and incorporating Jang’s idea – a server can overtake higher image processing loads enabling a simpler, compact, less costly and more efficient camera design a possibility. The modification can be done by combining prior art elements ready to be improved according to known method to yield predictable results, which is obvious.
Claim(s) 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kamide in view of Pretlove et al. (US 20040189675 A1, hereinafter Pretlove).
Regarding claim 18, Kamide discloses the imaging system according to claim 1, except, wherein the first image processing engine has a built-in graphics function, and the second image processing engine has an extended graphics function.
However, Pretlove discloses camera device (fig. 3, camera unit 28) in a local site connected to a server (remote site fig. 2), wherein a local graphics module 44 performs predetermined graphics function, and remote graphics unit 37 adds graphical functions based on remote information (¶0055, claim 26).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention (AIA ) to modify the invention of Kamide, with the teaching of Pretlove of performing sharing graphical functions between a local and a remote site, wherein graphical functions are potentially required for image processing operations undertaken in first and second ASICs of Kamide, to obtain, wherein the first image processing engine has a built-in graphics function, and the second image processing engine has an extended graphics function, because, combining prior art elements ready to be improved according to known method to yield predictable results is obvious. Furthermore, such combination would enhance the versatility by dividing and distributing graphics related operations between camera and server side, and thus improving convenience of use of the overall system (see, ¶0018 of Kamide).
Conclusion
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/SHAHBAZ NAZRUL/Primary Examiner, Art Unit 2638
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