DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 1-4 are rejected under 35 U.S.C. 103 as being unpatentable over Li et. al (US2023016169A1) in view of Yoshitaka et. al (US2019305370A1).
As to Claim 1, Li et. al teaches a solid electrolyte composite (see e.g. first solid electrolyte layer 21 and second solid electrolyte layer 22 in Fig.1, Par. 44) disposed between a positive electrode layer (see e.g. first electrode layer 11, Fig. 1, Par. 44, corresponding to the positive electrode) and a negative electrode layer (see e.g. second electrode layer 12, Fig. 1, Par. 44, corresponding to the negative electrode), in a solid-state battery (see e.g. solid-state battery 100, Fig. 1, Par. 44),
PNG
media_image1.png
335
490
media_image1.png
Greyscale
Figure 1: Li et. al, Fig. 1, Annotated
comprising a positive electrode side solid electrolyte layer (see e.g. first solid electrolyte layer 21, Fig. 1, Par. 44) disposed in a side closer to the positive electrode layer (see e.g. first electrode layer 11, Fig. 1, Par. 44, corresponding to the positive electrode) and a negative electrode side solid electrolyte layer (see e.g. second solid electrolyte layer 22, Fig. 1, Par. 44) disposed in a side closer to the negative electrode layer (see e.g. second electrode layer 12, Fig. 1, Par. 44, corresponding to the negative electrode),
the solid electrolyte composite having a stepped shape having a step between the positive electrode side solid electrolyte layer and the negative electrode side solid electrolyte layer (see e.g. Par. 62 “the area of the surface 22 x or 22 y of the second solid electrolyte layer 22 may be larger than the area of the surface 11 x of the first electrode layer 11 or may be larger than the area of the surface 21 x or 21 y of the first solid electrolyte layer 21, as shown,” Fig. 2).
PNG
media_image2.png
421
770
media_image2.png
Greyscale
Figure 2: Li et. al, Fig. 2, Annotated
Li et. al does not teach a filler or a negative electrode side solid electrolyte layer with a higher content of filler than the positive electrode side solid electrolyte layer.
Yoshitaka et. al teaches at least the negative electrode side solid electrolyte layer (see e.g. second low-insulator-containing solid electrolyte layer, L2, Fig. 2, Par. 61) comprising a filler and/or a porous substrate (see e.g. Par. 91 “a binder (PVdF)”), the negative electrode side solid electrolyte layer (see e.g. second low-insulator-containing solid electrolyte layer, L2, Fig. 2, Par. 61) having a higher content of the filler and/or the porous substrate (see e.g. Par. 38 “Note that the content ratio of the first low-insulator-content solid electrolyte layer, L1, and the content ratio of the second low-insulator-content solid electrolyte layer, L2, may be the same or may be different”) than the positive electrode side solid electrolyte layer (see e.g. first low-insulator-containing solid electrolyte layer, L1, in Fig. 2, Par. 61).
PNG
media_image3.png
489
613
media_image3.png
Greyscale
Figure 3: Yoshitaka et. al, Fig. 2, Annotated
Li et. al and Yoshitaka et. al are analogous in the field of solid electrolytes for solid-state batteries, it would have been obvious for a person with ordinary skills in the art to modify the solid electrolyte of Li et. al with insulator and binder particles from Yoshitaka et. al as the modification would provide the benefit of preventing internal short circuits (see e.g. Yoshitaka et. al, Par. 5), prevent a reduction in the discharge capacity of an all-solid-state battery (see e.g. Yoshitaka et. al, Par. 24), and when the insulator is cheaper than the electrolyte it is possible to reduce costs as recognized by Yoshitaka et. al (see e.g. Yoshitaka et. al, Par. 37).
As to Claim 2, Li et al. in view of Yoshitaka et. al teaches the solid electrolyte composite according to Claim 1, wherein the negative electrode side solid electrolyte layer (see e.g. Yoshitaka et. al teaches the second low-insulator-containing solid electrolyte layer, L2, in Fig. 2, Par. 61) has a lower content of the filler and/or the porous substrate (see e.g. Yoshitaka et. al teaches Par. 42 “the content ratio of the insulator in each of the first and the second low-insulator-content solid electrolyte layer is lower than the content ratio of the insulator in the high-insulator-content solid electrolyte layer”) in a vicinity of an interface in a side closer to the negative electrode layer (see e.g. Yoshitaka et. al teaches the interface between second low-insulator-containing solid electrolyte layer, L2, and negative electrode active material layer 4, in Fig. 2), and a vicinity of an interface in a side closer to the positive electrode side solid electrolyte layer (see e.g. Yoshitaka et. al teaches the interface between second low-insulator-containing solid electrolyte layer, L2, and high insulator-containing solid electrolyte layer, H1, in Fig. 2) than in another portion (see e.g. Yoshitaka et. al teaches the high insulator-containing solid electrolyte layer, H1, in Fig. 2, Par. 61), and
the positive electrode side solid electrolyte layer (see e.g. Yoshitaka et. al teaches the first low-insulator-containing solid electrolyte layer, L1, Fig. 2, Par. 61) has a lower content of the filler and/or the porous substrate (see e.g. Yoshitaka et. al teaches Par. 42 “the content ratio of the insulator in each of the first and the second low-insulator-content solid electrolyte layer is lower than the content ratio of the insulator in the high-insulator-content solid electrolyte layer”) in a vicinity of an interface in a side closer to the positive electrode layer (see e.g. Yoshitaka et. al teaches the interface between first low-insulator-containing solid electrolyte layer, L1, and positive electrode active material layer 2, Fig. 2) and a vicinity of an interface in a side closer to the negative electrode side solid electrolyte layer (see e.g. Yoshitaka et. al teaches the interface between first low-insulator-containing solid electrolyte layer, L1, and high insulator-containing solid electrolyte layer, H1, Fig. 2) than in another portion (see e.g. Yoshitaka et. al teaches the high insulator-containing solid electrolyte layer, H1, Fig. 2, Par. 61).
As to Claim 3, Li et al. in view of Yoshitaka et. al teaches a solid electrolyte composite according to Claim 2, wherein the solid-state battery (see e.g. Yoshitaka et. al teaches the unit of all solid-state battery 6, Fig 2, Par. 61) further comprises an insulating member (see e.g. Yoshitaka et. al teaches Par. 90 “alumina (α-Al2 O3) as an insulator”), and each of the positive electrode side solid electrolyte layer (see e.g. Yoshitaka et. al teaches the first low-insulator-containing solid electrolyte layer, L1, Fig. 2, Par. 61) and the negative electrode side solid electrolyte layer (see e.g. Yoshitaka et. al teaches the second low-insulator-containing solid electrolyte layer, L2, Fig. 2, Par. 61) has a lower content of the filler and/or the porous substrate (see e.g. Yoshitaka et. al teaches Par. 38 “Note that the content ratio of the first low-insulator-content solid electrolyte layer, L1, and the content ratio of the second low-insulator-content solid electrolyte layer, L2, may be the same or may be different”) in a vicinity of an interface with the insulating member (see e.g. Yoshitaka et. al teaches the interface between high insulator-containing solid electrolyte layer, H1, and the first and second low-insulator-containing solid electrolyte layers, L1 and L2, Fig. 2) than in another portion (see e.g. Yoshitaka et. al teaches the high insulator-containing solid electrolyte layer, H1, in Fig. 2, Par. 61).
As to Claim 4, Li et al. in view of Yoshitaka et. al teaches a solid electrolyte composite according to Claim 1, wherein a high content of filling material-containing region that comprises the filler and/or the porous substrate in a higher content than another portion (see e.g. Yoshitaka et. al teaches the high insulator-containing solid electrolyte layer, H1, Fig. 2, Par. 61) is provided inside the solid electrolyte composite (see e.g. Yoshitaka et. al teaches the solid electrolyte laminate 30, Fig. 2, Par. 61), and the high content of filling material-containing region (see e.g. Yoshitaka et. al teaches the high insulator-containing solid electrolyte layer, H1, Fig. 2, Par. 61). Further Yoshitaka et. al in view of Li et. al teaches a stepped shape, having a step between the side closer to the positive electrode side solid electrolyte layer and the side closer to the negative electrode side solid electrolyte layer (see e.g. Li et al. teaches Par. 62 “the area of the surface 22 x or 22 y of the second solid electrolyte layer 22 may be larger than the area of the surface 11 x of the first electrode layer 11 or may be larger than the area of the surface 21 x or 21 y of the first solid electrolyte layer 21,” Fig. 2).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to FAUSTO I MARES DAVILA whose telephone number is (571)270-7298. The examiner can normally be reached Monday - Friday 8:00 am - 5:00 pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Tong Guo can be reached at (571) 272-3066. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/FAUSTO I MARES DAVILA/Examiner, Art Unit 1723
/TONG GUO/Supervisory Patent Examiner, Art Unit 1723