DETAILED ACTION
This Office Action is in response to the amendment filed on October 28, 2025. Claims 1-20 are pending and are examined.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The amendments made to original claims 1, 8, 9, and 16-17 have been fully considered.
Response to Argument
Applicant's arguments and amendments received October 28, 2025 have been fully considered.
With regard to 35 U.S.C. § 103, Applicant argues that the cited prior art fails to disclose that an unavailable merge candidate comprises a discarded MV position and that only some of the MV positions of the first pattern are determined to be available in a buffer or stored in the buffer and comprise discarded MV positions. This language corresponds to the newly amended language of claims 1, 9, and 17.
Examiner disagrees. Applicant defines discarded MV positions in its specification as MV positions for which motion information is not included in the candidate list (see ¶356). As detailed below, Lee describes that certain motion vector candidates may be not added or may be deleted from the candidate list, i.e., they are not included in the candidate list and are thus “discarded.” For example, Lee discloses that where motion information is redundant with the motion information of other candidates on the list, such candidates may not be included (see Lee ¶¶221, 267). In other words, they are discarded. Lee also describes that candidates from different LCUs, CTUs, tiles, or slices may be set as unavailable when generating a candidate list (see Lee ¶¶210-212, 250, 269) and not included in the list. Likewise, where the term “discarded” means not included in the candidate list, these positions which are not included in the candidate list because of their position, are “discarded”.
Ultimately, these have been considered but they are directed to newly amended language, which is further addressed below. See the rejection below for how the art on record reads on the newly amended language as well as the examiner's interpretation of the cited art in view of the presented claim set.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-20 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-6, 10-11, and 13-14 of copending Application No. 18/525,393 (reference application). Although the claims at issue are not identical, they are not patentably distinct from each other because, although the claims of the reference application include additional limitations, they also include all the elements of the claims of the current application.
This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented.
Likewise, Claims 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-4, 8-9, 15, 17, and 19-20 of U.S. Patent No. 11,936,900. Although the claims at issue are not identical, they are not patentably distinct from each other because the claims of the ‘900 patent, although they include additional elements, also include all the elements of the claims of the current application.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Publication No. 2021/0211646 (“Lee”), which corresponds to a foreign priority application dated May 24, 2018 in view of the level of skill in the art.
With respect to claim 1, Lee discloses the invention substantially as claimed, including
An apparatus for encoding a current coding unit (CU) (see Figs. 1, ¶¶11, 58, showing and describing an encoder for encoding a CU), wherein the apparatus comprises:
a processing circuitry (see ¶426, describing that the encoder may be embodied by executed by a computer – which would have been understood by one of ordinary skill in the art at the time of filing to include a processor) configured to:
include into a list of motion vector candidates (MVCs), one or more motion vectors (MVs) that are determined from a first pattern, wherein the first pattern specifies MV positions within a current video frame in which the CU is located (see Abstract, Figs. 15-20, 32, 33, ¶¶213, 237, 240-241, 246-255, 257-259, showing and describing generating a merge candidate list, i.e., a list of MVCs, MVs determined from a pattern that specifies MV candidate positions within a current video frame in which the CU is located);
wherein only some of the MV positions of the first pattern are available in a buffer or stored in the buffer and comprise discarded MV positions (see citations and arguments with respect to element above and ¶¶210-212, 221, 250, 267, 269, describing that some of the MV positions of the pattern may be deleted and/or unavailable, i.e., only some are available in a buffer or stored in the buffer, and are not included in the candidate list, i.e., comprise discarded MV positions).
As detailed above, Lee does not describe processing circuitry explicitly. However, Lee does describe the use of a computer for executing program instructions stored in a computer-readable medium. Examiner takes Official Notice that one of ordinary skill in the art at the time of filing would have understood computers to perform such an execution using processing circuitry.
With respect to claim 2, Lee discloses the invention substantially as claimed. As described above Lee in view of the level of skill in the art discloses all the elements of independent claim 1. Lee additionally discloses:
wherein the processing circuitry is further configured to include into the list of MVCs one or more MVs that are determined from positions adjacent to the current CU within the current video frame and that is different from the MV positions of the first pattern (see Figs. 11, ¶¶188-191, 213, showing and describing that the system includes into the list of MVCs one or more MVs of spatial candidates from positions adjacent to the current CU within the current video frame and different from the MV positions of the first pattern).
The reasons for combining the cited prior art with respect to claim 1 also apply to claim 2.
With respect to claim 3, Lee discloses the invention substantially as claimed. As described above Lee in view of the level of skill in the art discloses all the elements of independent claim 1. Lee additionally discloses:
wherein the processing circuity is configured to determine the first pattern including determining new MV positions for one or more MV positions of the first pattern that is not available and/or is not stored in the buffer in order to be available and/or stored in the buffer (see citations and arguments with respect to claim 1 above, including Figs. 15 and 17-20, and ¶¶267, 269, 284-286, showing and describing that, for one or more MV positions of the first pattern that are not available/stored in the buffer, new MV positions are determined – for example, in Fig. 15, when A1 or A2 are not available, B1 or B2 are determined and in Figs. 19-20, only when B4 is unavailable, B5 or B6 may be determined, etc.).
The reasons for combining the cited prior art with respect to claim 1 also apply to claim 3.
With respect to claim 4, Lee discloses the invention substantially as claimed. As described above Lee in view of the level of skill in the art discloses all the elements of dependent claim 3. Lee additionally discloses:
wherein determining the new MV positions comprises:
assigning x positions and/or y positions of the one or more MV positions to the new MV positions; and
discarding the one or more MV positions from the first pattern (see citations and arguments with respect to claims 1-3 above, including Figs. 15-20, ¶¶255, 267, 269, 284-286, showing and describing that determining the new MV positions are assigned to specific new locations, e.g., when position B4 is unavailable in Figs. 15 or 19-20, B4 is discarded from the pattern and B5 or B6 may be assigned as the new candidate for assessment in the pattern, and that these specific new locations have specific x and y positions).
The reasons for combining the cited prior art with respect to claim 1 also apply to claim 4.
With respect to claim 5, Lee discloses the invention substantially as claimed. As described above Lee in view of the level of skill in the art discloses all the elements of dependent claim 3. Lee additionally discloses:
wherein determining the new MV positions includes assigning to one or more of the new MV positions having a same x position or a same y position new y positions or new x positions using a predetermined prescription to obtain assigned y positions or assigned x positions (see citations and arguments with respect to claims 1-4 above, showing and describing that determining the new MV positions may include assigning a new MV position having a same x position, i.e., in the same column, or new y position, i.e., in the same row, having a predetermined prescription to obtain the new x or y position – for example, B5 has the same x position as B4 and B2 has the same y position as B1 in Figs. 15 and 17-20).
the reasons for combining the cited prior art with respect to claim 1 also apply to claim 5.
With respect to claim 6, Lee discloses the invention substantially as claimed. As described above Lee in view of the level of skill in the art discloses all the elements of dependent claim 5. Lee additionally discloses:
wherein the predetermined prescription comprises shifting the assigned y positions or the assigned x positions of the new MV positions by a predetermined offset value (see citations and arguments with respect to claims 1-5 above, showing and describing that the new MV positions are shifted x and y positions by a predetermined offset, namely a full block offset – each alternative block is a full block shifted from the previous, e.g., B2 is a full block shifted rightward from B1).
The reasons for combining the cited prior art with respect to claim 1 also apply to claim 6.
With respect to claim 7, Lee discloses the invention substantially as claimed. As described above Lee in view of the level of skill in the art discloses all the elements of dependent claim 3. Lee additionally discloses:
wherein the processing circuitry is further configured to generate a pattern relative to a position of the current CU based on:
a size of the current CU; and
a size of a grid specifying a minimum distance between two motion vector (MV) positions belonging to the pattern, wherein the pattern specifies positions of MVs, and wherein the pattern is the first pattern (see citations and arguments with respect to claims 1-3 above and ¶259, describing that the processing circuitry determines the second merge candidates, i.e., generates a pattern relative to the positions of the CU, based on the size of the current block and whether it is smaller or greater than a threshold, i.e., a size of the current CU).
The reasons for combining the cited prior art with respect to claim 1 also apply to claim 7.
With respect to claim 8, Lee discloses the invention substantially as claimed. As described above Lee in view of the level of skill in the art discloses all the elements of dependent claim 3. Lee additionally discloses:
wherein the processing circuitry is further configured to determine the first pattern based an iteration value specifying a size of the first pattern on the grid (see citations and arguments with respect to claims 1-3 above, describing that the processing circuitry may discard/not include certain candidates in the pattern based on whether they are outside the LCU, CTU, tile, or slice, and may be initialized based on such a unit, i.e., it determines the first pattern based on the unit/iteration value specifying the first pattern on the grid).
The reasons for combining the cited prior art with respect to claim 1 also apply to claim 8.
With respect to claim 9, claim 9 discloses the elements of claim 1 in method form rather than apparatus form. Accordingly, the disclosure cited with respect to claim 1 also applies to claim 9.
With respect to claim 10, claim 10 discloses the elements of claim 2 in method form rather than apparatus form. Accordingly, the disclosure cited with respect to claim 2 also applies to claim 9.
With respect to claim 11, claim 11 discloses the elements of claim 3 in method form rather than apparatus form. Accordingly, the disclosure cited with respect to claim 3 also applies to claim 9.
With respect to claim 12, claim 12 discloses the elements of claim 4 in method form rather than apparatus form. Accordingly, the disclosure cited with respect to claim 4 also applies to claim 9.
With respect to claim 13, claim 13 discloses the elements of claim 5 in method form rather than apparatus form. Accordingly, the disclosure cited with respect to claim 5 also applies to claim 13.
With respect to claim 14, claim 14 discloses the elements of claim 6 in method form rather than apparatus form. Accordingly, the disclosure cited with respect to claim 6 also applies to claim 14.
With respect to claim 15, claim 15 discloses the elements of claim 7 in method form rather than apparatus form. Accordingly, the disclosure cited with respect to claim 7 also applies to claim 15.
With respect to claim 16, Lee discloses the invention substantially as claimed. As described above Lee in view of the level of skill in the art discloses all the elements of dependent claim 15. Lee additionally discloses:
wherein the processing circuitry is further configured to determine the first pattern based on at least one of a minimal size configurable for a CU; or a maximal size configurable for a CU (see citations and arguments with respect to claims 1-3 above and ¶259, describing that the processing circuitry determines the second merge candidates, i.e., first pattern, based on the size/shape of the current block and whether it is greater or smaller than a threshold, i.e., based on a minimal or maximal size configurable for a CU).
The reasons for combining the cited prior art with respect to claim 1 also apply to claim 16.
With respect to claim 17, claim 17 discloses the elements of claim 1 in computer-readable medium form rather than apparatus form. Lee discloses that its apparatus may be embodied by computer program instructions recoded in a computer-readable storage medium, including non-transitory storage mediums, that as detailed above with respect to claim 1, may be executed by a processor (see ¶426 and citations and arguments with respect to claim 1 above). Accordingly, the disclosure cited with respect to claim 1 also applies to claim 17.
With respect to claim 18, claim 18 discloses the elements of claim 2 in computer-readable medium form rather than apparatus form. Lee discloses that its apparatus may be embodied by computer program instructions recoded in a computer-readable storage medium, including non-transitory storage mediums, that as detailed above with respect to claim 1, may be executed by a processor (see ¶426 and citations and arguments with respect to claim 1 above). Accordingly, the disclosure cited with respect to claim 2 also applies to claim 18.
With respect to claim 19, claim 19 discloses the elements of claim 3 in computer-readable medium form rather than apparatus form. Lee discloses that its apparatus may be embodied by computer program instructions recoded in a computer-readable storage medium, including non-transitory storage mediums, that as detailed above with respect to claim 1, may be executed by a processor (see ¶426 and citations and arguments with respect to claim 1 above). Accordingly, the disclosure cited with respect to claim 3 also applies to claim 19.
With respect to claim 20, claim 20 discloses the elements of claim 4 in computer-readable medium form rather than apparatus form. Lee discloses that its apparatus may be embodied by computer program instructions recoded in a computer-readable storage medium, including non-transitory storage mediums, that as detailed above with respect to claim 1, may be executed by a processor (see ¶426 and citations and arguments with respect to claim 1 above). Accordingly, the disclosure cited with respect to claim 4 also applies to claim 20.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LINDSAY JANE KILE UHL whose telephone number is (571)270-0337. The examiner can normally be reached on 8:30 AM-5:00 PM.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Vaughn can be reached on (571)272-3922. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/LINDSAY J UHL/ Examiner, Art Unit 2481