DETAILED ACTION
General Remarks
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
When responding to this office action, applicants are advised to provide the examiner with line numbers and page numbers in the application and/or references cited to assist the examiner in locating appropriate paragraphs.
Per MPEP 2111 and 2111.01, the claims are given their broadest reasonable interpretation and the words of the claims are given their plain meaning consistent with the specification without importing claim limitations from the specification.
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Status of claim(s) to be treated in this office action:
Independent: 1, 9 and 16.
Pending: 1-20.
Election/Restrictions
Applicant’s election without traverse of Species III claim 1-20 in the reply filed on 7/6/2026 is acknowledged.
Specification
The disclosure is objected to because of the following informalities:
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The following title is suggested: SEMICONDUCTOR DEVICE HAVING GATE-ALL-AROUND TRANSITION METAL DICHALCOGENIDE NANOWIRE CHANNELS WITH DIFFERING PHASE REGIONS.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1, 5 and 7 is/are rejected under 35 U.S.C. 102(a)(1) and 35 U.S.C. 102(a)(2) as being anticipated by Dorow et al., US PG pub. 20210408375 A1 (IDS filed on 2/23/2024).
Re: Independent Claim 1, Dorow discloses a lower pattern (218, fig. 2A) extending in a first direction;
a plurality of wire patterns (204 and 206, fig. 2A) disposed on the lower pattern (218, fig. 2A) and spaced apart from the lower pattern (218, fig. 2A) in a second direction; and
a gate electrode (212, fig. 2A,-2E) surrounding the plurality of wire patterns (204 and 206, fig. 2A), disposed on the lower pattern (218, fig. 2A), and extending in a third direction,
wherein each of the plurality of wire patterns (204 and 206, fig. 2A) includes a transition metal dichalcogenide (TMD) material (¶00054;¶0068-69; transition metal: molybdenum, tungsten or chromium and chalcogen atoms: sulfur, selenium or tellurium),
wherein each of the plurality of wire patterns (204 and 206, fig. 2A) includes:
a pair of first areas (area of layer 204/206 within source/drain region 208 and 210, fig. 2A) protruding from sidewalls of the gate electrode (212, fig. 2A,-2E) in the first direction, and
a second area (area of layer 204/206 directly between layer 212, fig. 2A) between the first areas (area of layer 204/206 within source/drain region 208 and 210, fig. 2A), and
wherein a phase of each first area (a phase for example region 106 in the first area of layer 204/206 within source/drain region 208 and 210, fig. 2A) of the pair is different from a phase of the second area (a phase for example region 107 in the area of layer 204/206 directly between layer 212, fig. 2A).
Re: Claim 5, Dorow disclose(s) all the limitations of claim 1 on which this claim depends. Dorow further discloses: wherein a thickness of each of the plurality of wire patterns (204 and 206, fig. 2A) in the second direction is 1 nm or less (¶0054).
Re: Claim 7, Dorow disclose(s) all the limitations of claim 1 on which this claim depends. Dorow further discloses: wherein in a molecular structure of the pair of first areas (area of layer 204/206 within source/drain region 208 and 210, fig. 2A), six chalcogen elements (top three 118A and bottom three 118B in region 106, fig. 2B) are disposed around one transition metal (second 117 from the left, fig. 2B) in a plan view of the molecular structure of the pair of first areas (area of layer 204/206 within source/drain region 208 and 210, fig. 2A), and
wherein in a molecular structure of the second area (area of layer 204/206 directly between layer 212, fig. 2A), three chalcogen elements (first 116A and first and second 116B in region 104, fig. 2B) are disposed around one transition metal (first 115 in region 104, fig. 2B) in a plan view of the molecular structure of the second area (area of layer 204/206 directly between layer 212, fig. 2A).
Claim Rejections - 35 USC § 103
The following is a quotation of AIA 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 2-4 is/are rejected under AIA 35 U.S.C. 103 as being unpatentable over Dorow et al., US PG pub. 20210408375 A1 (IDS filed on 2/23/2024); in view of Li et al., US patent 10734384 B1.
Re: Claim 2, Dorow discloses all the limitations of claim 1 on which this claim depends. Dorow further discloses: a source/drain pattern (208 and 210, fig. 2A) disposed on the sidewalls of the gate electrode (212, fig. 2A,-2E) and connected to the plurality of wire patterns (204 and 206, fig. 2A).
Dorow is silent regarding: wherein the source/drain pattern (208 and 210, fig. 2A) includes a semimetal material.
Li teaches source/drain pattern can include a semimetal material (column 14, lines 63-67; column 15, lines 36-56).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to include semiconductor material in the source/drain region since doped semiconductor material allow creation of smooth continuous semiconductor junctions that control charge flow and prevent direct short circuits.
Re: Claim 3, Dorow discloses all the limitations of claim 2 on which this claim depends. Dorow further discloses: wherein the source/drain pattern (208 and 210, fig. 2A) surrounds the pair of first areas (area of layer 204/206 within source/drain region 208 and 210, fig. 2A).
Re: Claim 4, Dorow discloses all the limitations of claim 2 on which this claim depends. Dorow further discloses: wherein the source/drain pattern (208 and 210, fig. 2A) has a single layer.
Prior art made of record and not relied upon are considered pertinent to current application disclosure.
* (“Huang et al., US PG pub. 20210066294 A1”) Discloses a semiconductor device includes a substrate and a fin stack that includes a plurality of nanostructures, a gate device surrounding each of the nanostructures, and inner spacers along the gate device and between the nanostructures. A width of the inner spacers differs between different layers of the fin stack.
* (“Shen et al., US PG pub. 20210359099 A1”) discloses a devices, such as transistors, that use bismuth to create ohmic contacts are provided, as are methods of manufacturing the same. The transistors, such as field-effect transistors, can include one or more two-dimensional materials, and electrical contact areas can be created on the two-dimensional material(s) using bismuth. The bismuth can help to provide energy-barrier free, ohmic contacts, and the resulting devices can have performance levels that rival or exceed state-of-the-art devices that utilize three-dimensional materials, like silicon. The two-dimensional materials can include transition metal dichalcogenides, such as molybdenum disulfide.
* (“Dorow et al., US PG pub. 20220199838 A1”) discloses a transistor includes a channel layer including a transition metal dichalcogenide (TMD) material, an encapsulation layer on a first portion of the channel layer, a gate electrode above the encapsulation layer, a gate dielectric layer between the gate electrode and the encapsulation layer. The transistor further includes a source contact on a second portion of the channel layer and a drain contact on a third portion of the channel layer, where the gate structure is between drain contact and the source contact.
Allowable Subject Matter
Claims 9-20 are allowed.
Re: Independent Claim 9 (and its dependent claim(s) 10-15), the prior art of record do not disclose or suggest, in combination with all other limitations in the claim: wherein each of the plurality of wire patterns includes: a first area surrounded by the source/drain pattern, and a second area that is not in contact with the source/drain pattern, wherein a molecular structure of the first area has a first angle between i) a first connection between a transition metal and a first chalcogen element and ii) a second connection between the transition metal and a second chalcogen element adjacent to the first chalcogen element in a plan view of the molecular structure of the pair of first areas, wherein a molecular structure of the second area has a second angle between iii) a third connection between the transition metal and a third chalcogen element and ii) a fourth connection between the transition metal and a fourth chalcogen element adjacent to the third chalcogen element in a plan view of the molecular structure of the second area, and wherein the first angle is less than the second angle.
Re: Independent Claim 16 (and its dependent claim(s) 17-20), the prior art of record do not disclose or suggest, in combination with all other limitations in the claim: a plurality of gate electrodes surrounding second areas of the plurality of wire patterns, disposed on the lower pattern, extending in a third direction, and spaced apart from each other in the first direction; a source/drain pattern connected to the plurality of wire patterns between the plurality of gate electrodes that are adjacent to each other; and a barrier pattern interposed between the pair of first areas and the source/drain pattern, wherein each of the plurality of wire patterns includes a transition metal dichalcogenide (TMD) material, and wherein a transition metal included in the barrier pattern is a Group 4 transition metal.
Claim(s) 6 and 8 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Re: Claim 6, the prior art of record do not disclose or suggest, in combination with all other limitations in the claim: wherein a molecular structure of the pair of first areas has a first angle between i) a first connection between a transition metal and a first chalcogen element and ii) a second connection between the transition metal and a second chalcogen element adjacent to the first chalcogen element in a plan view of the molecular structure of the pair of first areas, wherein a molecular structure of the second area has a second angle between iii) a third connection between the transition metal and a third chalcogen element and ii) a fourth connection between the transition metal and a fourth chalcogen element adjacent to the third chalcogen element in a plan view of the molecular structure of the second area, and wherein the first angle is less than the second angle.
Re: Claim 8, the prior art of record do not disclose or suggest, in combination with all other limitations in the claim: a barrier pattern surrounding the pair of first areas, wherein a transition metal included in the barrier pattern is a Group 4 transition metal.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TSZ CHIU whose telephone number is 571-272-8656. The examiner can normally be reached on M-F, 9:00AM to 5:00PM (EST).
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/TSZ K CHIU/Examiner, Art Unit 2898 Tsz.Chiu@uspto.gov
/Leonard Chang/Supervisory Patent Examiner, Art Unit 2898
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