DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
The Examiner acknowledges the applicant's submission of the amendment dated 4/7/26, which has been entered.
1. ACKNOWLEDGEMENT OF REFERENCES CITED BY APPLICANT
Information Disclosure Statement
As required by M.P.E.P. ' 609 (C), the applicant's submission of the Information Disclosure Statement, dated 5/26/26, is acknowledged by the examiner and the cited references have been considered in the examination of the claims now pending. As required by M.P.E.P. ' 609 C(2), a copy of the PTOL-1449 initialed and dated by the examiner is attached to the instant office action.
2. REJECTIONS BASED ON PRIOR ART
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Rejections - 35 USC ' 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 2, 4-9, 11-15, 22, and 24-26 is/are rejected under 35 U.S.C. 103 as being unpatentable over Allalouf (US 20110276578) in view of Kim (US 20130151761).
With respect to claim 2, the Allalouf reference teaches a memory system, comprising:
one or more memory devices; (e.g. fig. 1, storage disks 140) and
processing circuitry coupled with the one or more memory devices (e.g. fig. 1, controller 120; and paragraph 27, where FIG. 1 is a schematic block diagram of a host and a storage system, with file system view application according to embodiments of the present invention. Host 100 initiates block level commands to store or retrieve data at a storage system 110 that arrive to the block-level protocol target at the storage controller 120) and configured to cause the memory system to:
receive, at a memory device of the one or more memory devices, an access command; (paragraph 37, where each file-level command is usually translated into several block-level commands in order to update the information stored in the metadata blocks in the storage disks according to a typical block level protocol. For example, a file-level command for the EXT3 file system that creates a new file at the storage disk is translated at the initiator host to the following block level commands that update both metadata and pure data blocks)
create a file to store data indicated within the access command based at least in part on determining that the access command is a write command, wherein creating the file is based at least in part on allocating metadata for the file, wherein one or more logical addresses are mapped to one or more entries in a table based at least in part on creating the file, wherein the one or more logical addresses and the one or more entries are associated with the data; (paragraph 37, where a file-level command for the EXT3 file system that creates a new file at the storage disk is translated at the initiator host to the following block level commands that update both metadata and pure data blocks: (1) update the stored super block fields specifying the number of allocated blocks and inodes; and paragraph 28, where the metadata block inode table contains inode attributes and a list of the blocks belonging to each inode. EXT3 data blocks contain regular file data but may also contain additional metadata information such as a directory listing or information regarding indirect addressing of data blocks [i.e. there is a mapping of “logical” addresses to “physical” addresses]) and
write the data to a physical address of a memory array based at least in part on creating the file and receiving the write command. (paragraph 37, where a file-level command for the EXT3 file system that creates a new file at the storage disk is translated at the initiator host to the following block level commands that update both metadata and pure data blocks: (1) update the stored super block fields specifying the number of allocated blocks and inodes … (8) write the data blocks of this inode)
However, the Allalouf reference does not explicitly teach that the table is a
logical-to-physical mapping table.
The Kim reference teaches it is conventional for the table to be a logical-to-physical mapping table. (paragraph 87, where the data path controller 1210a may write (e.g., program) a first file portion (e.g., a header) of the write-requested file in the NVM cache 1220, and write a second file portion (e.g., a body) of the write-requested file in the disk storage 1240 (S130). During this step, the data path controller 1210a may configure a mapping table including mapping information relating logical addresses for the write-requested file, as provided by the host 1100, with corresponding physical addresses associated with the different storage mediums (e.g., the NVM and magnetic disk) of the data storage device 1200)
It would have been obvious to a person of ordinary skill in the art before the claimed invention was effectively filed to modify the Allalouf reference to have the table be a logical-to-physical mapping table, as taught by the Kim reference.
The suggestion/motivation for doing so would have been to translate a logical address from the host into a physical address of the non-volatile memory. (Kim, paragraph 123)
Therefore it would have been obvious to combine the Allalouf and Kim references for the benefits shown above to obtain the invention as specified in the claim.
With respect to claim 4, the combination of the Allalouf and Kim references teaches the memory system of claim 2, wherein the processing circuitry is further configured to cause the memory system to: receive, at the memory device, a second access command; remove the file based at least in part on determining that the second access command is different than a write command; and unmap the one or more logical addresses from the one or more entries in the table based at least in part on removing the file. (Allalouf, paragraph 40, where a data block is deleted 300 after a block level-command is captured and inferred that set to false the corresponding bit in the data block bitmap. After validation or deletion of a data block the block-to-inode inverse map and the data block tracker list are updated accordingly)
With respect to claim 5, the combination of the Allalouf and Kim references teaches the memory system of claim 4, wherein the processing circuitry is further configured to cause the memory system to: set a value for a field of the one or more entries in the table based at least in part on unmapping the one or more logical addresses, the value for the field indicating that the one or more logical addresses are unmapped. (Allalouf, paragraph 40, where a data block is deleted 300 after a block level-command is captured and inferred that set to false the corresponding bit in the data block bitmap. After validation or deletion of a data block the block-to-inode inverse map and the data block tracker list are updated accordingly)
With respect to claim 6, the combination of the Allalouf and Kim references teaches the memory system of claim 2, wherein the processing circuitry is further configured to cause the memory system to: receive, at the memory device, a second access command; and overwrite the data at the physical address of the memory array with second data based at least in part on determining that the second access command is a second write command. (Allalouf, paragraph 38, where these block-level commands are captured and inferred to maintain an updated file system view at the storage controller or at a remote server and to identify which arriving block belongs to which file or inode; and paragraph 39, where three block-level commands need to be parsed and inferred, independent of their arrival order, in order to get the state machine transit to a valid state: a. a write command to this specific data block 301, b. a write command that set to "true" the address bit of this specific data block 302, and c. a write command that set to "true" the corresponding bit in the block bitmap 303)
With respect to claim 7, the combination of the Allalouf and Kim references teaches the memory system of claim 2, wherein the processing circuitry is further configured to cause the memory system to: identify a write operation comprising writing the data to the physical address, delay the write operation, or both, based at least in part on a type of file system of the memory device. (Allalouf, paragraph 37, where a file-level command for the EXT3 file system that creates a new file at the storage disk is translated at the initiator host to the following block level commands that update both metadata and pure data blocks: (1) update the stored super block fields specifying the number of allocated blocks and inodes, (2) update the stored field in the group descriptor of the appropriate block group specifying the number of free inodes, (3) set the relevant bit in the inode bitmap to true, (4) set the relevant bits in the data bitmap to true, corresponding to the additional data blocks that were allocated for this file, (5) create a new inode structure in the inode table, (6) update the access time fields in inode structure of the parent directory, (7) add the filename to the relevant data block of the parent inode, and finally, (8) write the data blocks of this inode)
With respect to claim 8, the combination of the Allalouf and Kim references teaches the memory system of claim 2, wherein allocating the metadata comprises allocating one or more inodes, one or more pointers, pre-allocating the data, or a combination thereof. (Allalouf, paragraph 37, where a file-level command for the EXT3 file system that creates a new file at the storage disk is translated at the initiator host to the following block level commands that update both metadata and pure data blocks: (1) update the stored super block fields specifying the number of allocated blocks and inodes, (2) update the stored field in the group descriptor of the appropriate block group specifying the number of free inodes, (3) set the relevant bit in the inode bitmap to true, (4) set the relevant bits in the data bitmap to true, corresponding to the additional data blocks that were allocated for this file, (5) create a new inode structure in the inode table, (6) update the access time fields in inode structure of the parent directory, (7) add the filename to the relevant data block of the parent inode, and finally, (8) write the data blocks of this inode)
Claims 9 and 11-15 is the non-transitory computer-readable medium implementation of claims 2 and 4-8, and rejected under a similar rationale as shown in the rejections above.
Claim 22 and 24-26 is the method implementation of claims 2 and 4-8, and rejected under a similar rationale as shown in the rejections above.
Claim Rejections - 35 USC ' 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 3, 10, and 23 is/are rejected under 35 U.S.C. 103 as being unpatentable over the combination of the Allalouf (US 20110276578) in view of Kim (US 20130151761), and in further view of Veeraswamy (US 9542401).
With respect to claim 3, the combination of the Allalouf and Kim references does not explicitly teach the memory system of claim 2, wherein the processing circuitry is further configured to cause the memory system to: receive, at the memory device, a second access command; and read the data based at least in part on determining that the second access command is a read command.
The Veeraswamy reference teaches it is conventional to have wherein the processing circuitry is further configured to cause the memory system to: receive, at the memory device, a second access command; and read the data based at least in part on determining that the second access command is a read command. (see fig. 4; and column 7, lines 48-60, where FIG. 4 shows a procedure for read or write access to a specified file in the file system, for a more general case in which the file may have the format of FIG. 2, or the file may have the format of FIG. 3, or the file may be a snapshot copy as further described below with reference to FIG. 8)
It would have been obvious to a person of ordinary skill in the art before the claimed invention was effectively filed to modify the combination of the Allalouf and Kim references to have wherein the processing circuitry is further configured to cause the memory system to: receive, at the memory device, a second access command; and read the data based at least in part on determining that the second access command is a read command, as taught by the Veeraswamy reference.
The suggestion/motivation for doing so would have been to have the use of block-level mapping, as opposed to simply mapping larger and larger extents of data blocks, allows for the control and manipulation of individual data blocks within the file. (Veeraswamy, column 5, lines 19-31)
Therefore it would have been obvious to combine the Allalouf, Kim, and Veeraswamy references for the benefits shown above to obtain the invention as specified in the claim.
Claim 10 is the non-transitory computer-readable medium implementation of claim 3, and rejected under a similar rationale as shown in the rejections above.
Claim 23 is the method implementation of claim 3, and rejected under a similar rationale as shown in the rejections above.
3. ARGUMENTS CONCERNING PRIOR ART REJECTIONS
Rejections - USC 102/103
Applicant's arguments and amendments (see pages 7-11 of the remarks) with respect to claims 2-15 and 22-26 have been considered, and are persuasive. The Examiner noted the Kim reference has been included to teach the newly amended claim language as shown in the rejections above.
4. CLOSING COMMENTS
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PRASITH THAMMAVONG whose telephone number is (571) 270-1040. The examiner can normally be reached Monday - Friday 12-8 PM EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Arpan Savla can be reached on (571) 272-1077. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/PRASITH THAMMAVONG/
Primary Examiner, Art Unit 2137
Prosecution Insights