Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Species 2, corresponding to Fig. 5 and dependent Claims 8-15, in the reply filed on 8/4/2026 is acknowledged. Species 1, corresponding to Fig. 4 and dependent Claims 16-24, is withdrawn from consideration.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1, 8, and 9 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1 and 8 of U.S. Patent No. 11913845 (the reference Patent). Although the claims at issue are not identical, they are not patentably distinct from each other.
Regarding Claim 1 of the instant Application, all of the features of Claim 1 are taught by Claims 1 and 8 of the reference Patent.
Regarding Claim 8 of the instant Application, which depends from Claim 1, all of the features of Claim 8 are taught by Claims 1 and 8 of the reference Patent.
Regarding Claim 9 of the instant Application, which depends from Claim 8, all of the features of Claim 9 are taught by Claims 1 and 8 of the reference Patent.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-6 and 25 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Raz et al (U.S. Pub. No. 2013/0033364, hereinafter “Raz”, cited on Applicant’s IDS dated 2/26/2024).
Regarding Claim 1, Raz teaches an RFID tag (Fig. 1) comprising: a chip (107); an antenna electrically coupled to the chip (106); and a temperature exposure indicator electrically coupled to the chip, the temperature exposure indicator having an electrical property that changes in response to exposure to a specified environmental condition, wherein the RFID tag is configured to change a response of the RFID tag in response to a change in the electrical property of the temperature exposure indicator (paragraphs [0073]-[0074], when switch 103 is broken it will be able to transmit that the tag has exceeded a certain temperature based on change of voltage at point 101).
Regarding Claim 2, Raz teaches everything that is claimed above with respect to Claim 1. Raz further teaches wherein the change in response of the RFID tag associated with the change in the electrical property comprises a change in data bits transmitted by the RFID tag when the RFID tag is interrogated (paragraph [0074], information transmitted by the antenna 106 upon interrogation may be altered).
Regarding Claim 3, Raz teaches everything that is claimed above with respect to Claim 1. Raz further teaches wherein the chip is disposed electrically between the antenna and the temperature exposure indicator (Fig. 1, chip 107 is disposed between antenna 106 and switch 103).
Regarding Claim 4, Raz teaches everything that is claimed above with respect to Claim 1. Raz further teaches wherein the specified environmental condition is exposure to a temperature above a threshold temperature for more than a predetermined amount of time (paragraph [0074], when switch 103 is broken it will be able to transmit that the tag has exceeded a certain temperature based on change of voltage at point 101; amount of time at excessive temperature necessary to break the switch is equated to predetermined amount of time).
Regarding Claim 5, Raz teaches everything that is claimed above with respect to Claim 4. Raz further teaches wherein when the temperature exposure indicator returns to a temperature below the threshold temperature, the temperature exposure indicator retains the changed electrical property (paragraph [0013], irreversible switch).
Regarding Claim 6, Raz teaches everything that is claimed above with respect to Claim 1. Raz further teaches wherein the changed electrical property is conductivity (paragraphs [0073]-[0074], closing the switch 103 changes the conductivity of the switch).
Regarding Claim 25, Raz teaches everything that is claimed above with respect to Claim 1. Raz further teaches: a host product (paragraph [0014], RFID device located on an object for external event monitoring); and the RFID tag of claim 1 (Fig. 1), wherein the temperature exposure indicator is associated with the host product to monitor a temperature change of the host product (paragraph [0013], tag detects laundering or heating).
Claim(s) 1 and 7 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Sumida et al (U.S. Pub. No. 2008/0259992, hereinafter “Sumida”).
Regarding Claim 1, Sumida teaches an RFID tag (Fig. 4A, resonance tag) comprising: a chip (substrate 1); an antenna electrically coupled to the chip (wiring pattern 3 corresponding to coil antenna, see paragraph [0043]); and a temperature exposure indicator electrically coupled to the chip, the temperature exposure indicator having an electrical property that changes in response to exposure to a specified environmental condition, wherein the RFID tag is configured to change a response of the RFID tag in response to a change in the electrical property of the temperature exposure indicator (Fig. 4A, paragraph [0047], thermofusion materials 11, 12, and 13 having different melting points that change the capacitance of the resonance circuit based on temperature exposure).
Regarding Claim 7, Sumida teaches everything that is claimed above with respect to Claim 1. Sumida further teaches wherein the changed electrical property is capacitance (paragraph [0047]).
Prior Art of Record
The prior art made of record and not relied upon is considered pertinent to Applicant’s disclosure.
Czaplewski-Campbell et al (U.S. Pub. No. 2020/0256744) teaches, in Fig. 5, a circuit including three parallel plate capacitors 512, 514, and 516 connected in series for temperature sensing (see paragraphs [0051]-[0057]).
Allowable Subject Matter
Claims 8-15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, and pending addressing of the Double Patenting rejections.
Regarding dependent Claim 8, the recited Claim features “wherein the temperature exposure indicator comprises: a first electrical contact; a second electrical contact; and a first capacitor group comprising: a first capacitor first conducting surface group comprising a plurality of first capacitor first conducting surfaces, wherein the first capacitor first conducting surfaces comprise a first temperature-dependent component, wherein the first capacitor first conducting surfaces are separated from the first and second electrical contacts; a first capacitor second conducting surface group comprising a plurality of first capacitor second conducting surfaces, wherein a first component among the first capacitor second conducting surfaces is electrically connected to the first electrical contact and a last component among the first capacitor second conducting surfaces is electrically connected to the second electrical contact; and a first dielectric formed between the first capacitor first conducting surface group and the first capacitor second conducting surface group; wherein the first capacitor first conducting surfaces, the first dielectric, and the first capacitor second conducting surfaces form a plurality of first capacitors connected in series, wherein the first temperature-dependent component is configured to change conductivity when exposed to a temperature above a first threshold temperature”, corresponding to Fig. 5 of Applicant’s Specification as filed, were not found in the prior art.
The closest prior art are the Sumida (see Figs. 3 and 4A) and Czaplewski-Campbell (see the Prior Art or Record section) references, cited above, which each teach capacitors connected in series for temperature sensing. However, neither of these references teaches the claimed configuration of the plurality of first capacitor first conducting surfaces that are separated from the first and second electrical contacts, and the plurality of first capacitor second conducting surfaces, wherein a first component among the first capacitor second conducting surfaces is electrically connected to the first electrical contact and a last component among the first capacitor second conducting surfaces is electrically connected to the second electrical contact, such that the plurality of first capacitor first conducting surfaces and the plurality of first capacitor second conducting surfaces form a plurality of first capacitors connected in series. Claims 9-15 are allowable due to their dependence on Claim 8.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CYNTHIA L DAVIS whose telephone number is (571)272-1599. The examiner can normally be reached Monday-Friday, 7am to 3pm.
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/CYNTHIA L DAVIS/Examiner, Art Unit 2857
/SHELBY A TURNER/Supervisory Patent Examiner, Art Unit 2857