Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The drawings filed on 2/8/16 are accepted by the examiner.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 9/4/15 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Interpretation
Claim 7 is a method claim that use contingency language “determining…whether the internal timekeeper can be synchronized to an external timekeeper….responsive to the determination…that the internal timekeeper cannot be synchronized”, it is noted that MPEP 2111.04 states “II. CONTINGENT LIMITATIONS The broadest reasonable interpretation of a method (or process) claim having contingent limitations requires only those steps that must be performed and does not include steps that are not required to be performed because the condition(s) precedent are not met. For example, assume a method claim requires step A if a first condition happens and step B if a second condition happens. If the claimed invention may be practiced without either the first or second condition happening, then neither step A or B is required by the broadest reasonable interpretation of the claim. If the claimed invention requires the first condition to occur, then the broadest reasonable interpretation of the claim requires step A. If the claimed invention requires both the first and second conditions to occur, then the broadest reasonable interpretation of the claim requires both steps A and B. The broadest reasonable interpretation of a system (or apparatus or product) claim having structure that performs a function, which only needs to occur if a condition precedent is met, requires structure for performing the function should the condition occur. The system claim interpretation differs from a method claim interpretation because the claimed structure must be present in the system regardless of whether the condition is met and the function is actually performed. See Ex parte Schulhauser, Appeal 2013-007847 (PTAB April 28, 2016) (precedential) for an analysis of contingent claim limitations in the context of both method claims and system claims. In Schulhauser, both method claims and system claims recited the same contingent step. When analyzing the claimed method as a whole, the PTAB determined that giving the claim its broadest reasonable interpretation, “[i]f the condition for performing a contingent step is not satisfied, the performance recited by the step need not be carried out in order for the claimed method to be performed” (quotation omitted). Schulhauser at 10. When analyzing the claimed system as a whole, the PTAB determined that “[t]he broadest reasonable interpretation of a system claim having structure that performs a function, which only needs to occur if a condition precedent is met, still requires structure for performing the function should the condition occur.” Schulhauser at 14. Therefore "[t]he Examiner did not need to present evidence of the obviousness of the [ ] method steps of claim 1 that are not required to be performed under a broadest reasonable interpretation of the claim (e.g., instances in which the electrocardiac signal data is not within the threshold electrocardiac criteria such that the condition precedent for the determining step and the remaining steps of claim 1 has not been met);" however to render the claimed system obvious, the prior art must teach the structure that performs the function of the contingent step along with the other recited claim limitations. Schulhauser at 9, 14. See also MPEP § 2143.03.”
Therefore, the broadest reasonable interpretation of the method claim 7 would be without the steps with contingent limitations because the condition of “determination that the internal timekeeper cannot be synchronized to the external timekeeper” is not required by the BRI of the claim (the BRI of “determining, by the electric load control circuitry, whether the internal timekeeper can be synchronized to an external timekeeper via a second network using a second communication protocol” is “determining, by the electric load control circuitry, the internal timekeeper can be synchronized to an external timekeeper via a second network using a second communication protocol” OR “determining, by the electric load control circuitry, the internal timekeeper cannot be synchronized to an external timekeeper via a second network using a second communication protocol”, however, for the purpose of compact prosecution, the examiner has examined the claims in consideration of the steps with contingent limitation.
The examiner recommends amending claim 7 to recite “determining…not be synchronized to an external timekeeper” for the contingent limitations to be included as part of the BRI.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the claims at issue are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the reference application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The USPTO internet Web site contains terminal disclaimer forms which may be used. Please visit http://www.uspto.gov/forms/. The filing date of the application will determine what form should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to http://www.uspto.gov/patents/process/file/efs/guidance/eTD-info-I.jsp.
Claims of instant application
Claims of USPAT 11983027
1. An electric load control apparatus, comprising:
electric load control circuitry to:
execute a timeclock schedule using internal timekeeper circuitry to control operation of each of a plurality of load devices;
communicate commands to each of the plurality of load devices via a first network using a first wireless communication protocol;
determine whether the internal timekeeper can be synchronized to an external timekeeper via a second network using a second communication protocol;
responsive to the determination that the internal timekeeper cannot be synchronized to the external timekeeper,
determine whether a temporal error of the internal timekeeper exceeds a defined temporal error threshold value; and
responsive to the determination that the temporal error of the internal timekeeper exceeds a defined temporal error threshold value, abort execution of the timeclock schedule.
1. An electrical load control system gateway to control operation of each of a plurality of control devices, the electrical load control system gateway comprising:
memory circuitry;
first network interface circuitry to
communicate a command to a control device using a timeclock schedule retrieved from a communicatively coupled memory using the local timeclock and the retrieved timeclock schedule;
communicatively couple to a first network using a first network protocol; and
gateway control circuitry communicatively coupled to the first network interface circuitry and the memory circuitry, the gateway control circuitry to:
maintain a local timekeeper;
responsive to an inability to synchronize the local timekeeper with present time data retrieved from a remote timekeeper communicatively coupled to the gateway control circuitry via the first network:
prior to expiration of the timeout timer:
attempt to periodically synchronize the local timeclock with the present time data retrieved from the network connected remote timekeeper;
upon successful synchronization the local timeclock with the present time data retrieved from the network connected remote timekeeper, stop the timeout timer;
initiate a timeout timer;
upon expiration of the timeout timer:
discontinue communication of commands to the control device using the timeclock schedule.
2. The electric load control apparatus of claim 1 wherein to determine whether the temporal error of the internal timekeeper, the electric load control circuitry to further:
determine a duration that the internal timekeeper has not synchronized with the external timekeeper; and
determine the temporal error of the internal timekeeper using a maximum temporal shift rate of the internal timekeeper and the determined duration that the internal timekeeper has not synchronized with the external timekeeper.
4. The electrical load control system gateway of claim 1 wherein to initiate the timeout timer, the gateway control circuitry to further:
determine a value corresponding to a drift of the local timekeeper over time;
determine a maximum allowable drift; and
determine a timeout timer expiration time using the determined allowable drift and the determined drift over time of the local timekeeper.
3. The electric load control apparatus of claim 1 wherein to determine whether the internal timekeeper can be synchronized to an external timekeeper, the electric load control circuitry to further:
determine whether the electric load control circuitry can receive time/date information from the external timekeeper via the Internet.
Part of claim 1:
responsive to an inability to synchronize the local timekeeper with present time data retrieved from a remote timekeeper communicatively coupled to the gateway control circuitry via the first network
4. The electric load control apparatus of claim 1 wherein to determine whether the internal timekeeper can be synchronized to an external timekeeper, the electric load control circuitry to further:
determine whether the electric load control circuitry can receive time/date information from the external timekeeper via a portable device communicatively coupled to the Internet.
2. The electrical load control system gateway of claim 1, further comprising:
second network interface circuitry communicatively coupled to the gateway control circuitry, the second network interface circuitry to communicatively couple the gateway control circuitry to a second network using a second network protocol different from the first network protocol;
wherein, responsive to receipt of a message from a portable network device via the second network interface circuitry, the gateway control circuitry to further:
synchronize the local timeclock with a time data received from the portable network device, via the second network interface circuitry.
5. The electric load control apparatus of claim 1, the electric load control circuitry to further:
receive an input that includes information indicative of a failure of a power supply to the electric load control apparatus.
6. The electrical load control system gateway of claim 1 the gateway control circuitry to further place the electrical load control system gateway in a low-power consumption state responsive to receipt of an input signal indicative of a failure of a primary power supply to the electrical load control system gateway.
6. The electric load control apparatus of claim 5, the electric load control circuitry to further:
abort execution of the timeclock schedule responsive to receipt of the input that includes information indicative of the failure of the power supply to the electric load control apparatus.
6. The electrical load control system gateway of claim 1 the gateway control circuitry to further place the electrical load control system gateway in a low-power consumption state responsive to receipt of an input signal indicative of a failure of a primary power supply to the electrical load control system gateway.
7. An electric load control method, comprising:
executing, by electric load control circuitry, a timeclock schedule using internal timekeeper circuitry to control operation of each of a plurality of load devices;
causing, by the electric load control circuitry, a communication of one or more commands to each of the plurality of load devices via a first network using a first wireless communication protocol;
determining, by the electric load control circuitry, whether the internal timekeeper can be synchronized to an external timekeeper via a second network using a second communication protocol;
responsive to the determination, by the electric load control circuitry, that the internal timekeeper cannot be synchronized to the external timekeeper, determining, by the electric load control circuitry, whether a temporal error of the internal timekeeper exceeds a defined temporal error threshold value; and
responsive to the determination, by the electric load control circuitry, that the temporal error of the internal timekeeper exceeds a defined temporal error threshold value, ceasing, by the electric load control circuitry, execution of the timeclock schedule.
7. A method of scheduling control device operations by a gateway control circuitry communicatively coupled to first network interface circuitry and memory circuitry, the method comprising:
maintaining, by the gateway control circuitry, a local timekeeper; and
determining an inability to synchronize the local timekeeper with present time data retrieved from a remote timekeeper communicatively coupled to the gateway control circuitry via a first network interface circuitry, responsive to determining the inability to synchronize the local timekeeper with the present time data, the first network interface circuitry to communicatively couple to a first network using a first network protocol network:
initiating, by the gateway control circuitry, a timeout timer;
determining, at a first time instance, that the timeout timer has not expired in response to determining that the timeout timer has not expired:
communicating, by the gateway control circuitry, a command to a control device using a timeclock schedule retrieved from a communicatively coupled memory using the local timeclock and the retrieved timeclock schedule; and
attempting, by the gateway control circuitry, to periodically synchronize the local timeclock with the present time data retrieved from the network connected remote timekeeper;
upon successful synchronization the local timeclock with the present time data retrieved from the network connected remote timekeeper, resetting, by the gateway control circuitry, the timeout timer; and
determining, at a second time instance, that the timeout timer has expired, in response to determining that the timeout timer has expired:
discontinuing, by the gateway control circuitry, communication of commands to the control device using the timeclock schedule.
8. The electric load control method of claim 7 wherein determining whether the temporal error of the internal timekeeper further comprises:
determining, by the electric load control circuitry, a duration that the internal timekeeper has not synchronized with the external timekeeper; and
determining, by the electric load control circuitry, the temporal error of the internal timekeeper using a maximum temporal shift rate of the internal timekeeper and the determined duration that the internal timekeeper has not synchronized with the external timekeeper.
10. The method of claim 7 wherein initiating the timeout timer further comprises:
determining, by the gateway control circuitry, a value corresponding to a drift over time of the local timekeeper;
determining, by the gateway control circuitry, a maximum allowable drift; and
determining, by the gateway control circuitry, a timeout timer expiration time using the determined allowable drift and the determined drift over time of the local timekeeper.
9. The electric load control method of claim 7 wherein determining whether the internal timekeeper can be synchronized to an external timekeeper further comprises:
determining, by the electric load control circuitry, whether the electric load control circuitry can receive time/date information from the external timekeeper via the Internet.
Part of claim 7:
determining an inability to synchronize the local timekeeper with present time data retrieved from a remote timekeeper communicatively coupled to the gateway control circuitry via a first network interface circuitry
10. The electric load control method of claim 7 wherein determining whether the internal timekeeper can be synchronized to an external timekeeper further comprises:
determining, by the electric load control circuitry, whether the electric load control circuitry can receive time/date information from the external timekeeper via a portable device communicatively coupled to the Internet.
8. The method of claim 7, further comprising:
responsive to receipt of a message from a portable network device via second network interface circuitry communicatively coupled to the gateway control circuitry, synchronizing, by the gateway control circuitry, the local timeclock with a time data received from the portable network device;
wherein, the second network interface circuitry communicatively couples the gateway control circuitry to a second network using a second network protocol different from the first network protocol
11. The electric load control method of claim 7, further comprising:
receiving, by the electric load control circuitry, an input that includes information indicative of a failure of a power supply to the electric load control apparatus.
12. The method of claim 7, further comprising:
transitioning, by the gateway control circuitry, the electrical load control system gateway from a relatively high-power consumption state to a relatively low-power consumption state responsive to receipt, by the gateway control circuitry, of an input signal indicative of a failure of a primary power supply to the electrical load control system gateway.
12. The electric load control method of claim 11, further comprising:
ceasing, by the electric load control circuitry, execution of the timeclock schedule responsive to receipt of the input that includes information indicative of the failure of the power supply to the electric load control apparatus.
12. The method of claim 7, further comprising:
transitioning, by the gateway control circuitry, the electrical load control system gateway from a relatively high-power consumption state to a relatively low-power consumption state responsive to receipt, by the gateway control circuitry, of an input signal indicative of a failure of a primary power supply to the electrical load control system gateway.
13. A non-transitory, machine-readable, storage device that includes instructions that, when executed by electric load control circuitry, cause the electric load control circuitry to:
execute a timeclock schedule using internal timekeeper circuitry to control operation of each of a plurality of load devices;
cause a communication of one or more commands to each of the plurality of load devices via a first network using a first wireless communication protocol;
determine whether the internal timekeeper can be synchronized to an external timekeeper via a second network using a second communication protocol;
responsive to the determination, by the electric load control circuitry, that the internal timekeeper cannot be synchronized to the external timekeeper, determine whether a temporal error of the internal timekeeper exceeds a defined temporal error threshold value; and
responsive to the determination, by the electric load control circuitry, that the temporal error of the internal timekeeper exceeds a defined temporal error threshold value, cease execution of the timeclock schedule.
13. A non-transitory, machine-readable, storage device that includes instructions that, when executed by gateway control circuitry communicatively coupled to the first network interface circuitry and the memory circuitry, cause the gateway control circuitry to:
maintain a local timekeeper;
responsive to an inability to synchronize the local timekeeper with present time data retrieved from a remote timekeeper communicatively coupled to the gateway control circuitry via first network interface circuitry, the first network interface circuitry to communicatively couple to a first network using a first network protocol network:
initiate a timeout timer;
prior to expiration of the timeout timer:
communicate a command to a control device using a timeclock schedule retrieved from a communicatively coupled memory using the local timeclock and the retrieved timeclock schedule; and
attempt to periodically synchronize the local timeclock with the present time data retrieved from the network connected remote timekeeper;
upon successful synchronization the local timeclock with the present time data retrieved from the network connected remote timekeeper, stop the timeout timer;
upon expiration of the timeout timer:
discontinue communication of commands to the control device using the timeclock schedule.
14. The non-transitory, machine-readable, storage device of claim 13, wherein the instructions that cause the electric load control circuitry to determine whether the temporal error of the internal timekeeper further cause the electric load control circuitry to:
determine a duration that the internal timekeeper has not synchronized with the external timekeeper; and
determine the temporal error of the internal timekeeper using a maximum temporal shift rate of the internal timekeeper and the determined duration that the internal timekeeper has not synchronized with the external timekeeper.
16. The non-transitory, machine-readable, storage device of claim 13 wherein the instructions that cause the gateway control circuitry to initiate the timeout timer further cause the gateway control circuitry to:
determine a value corresponding to a drift over time of the local timekeeper;
determine a maximum allowable drift; and
determine a timeout timer expiration time using the determined allowable drift and the determined drift over time of the local timekeeper.
15. The non-transitory, machine-readable, storage device of claim 13 wherein the instructions that cause the electric load control circuitry to determine whether the internal timekeeper can be synchronized to an external timekeeper further cause the electric load control circuitry:
determine whether the electric load control circuitry can receive time/date information from the external timekeeper via the Internet.
Part of claim 13:
responsive to an inability to synchronize the local timekeeper with present time data retrieved from a remote timekeeper communicatively coupled to the gateway control circuitry via first network interface circuitry
16. The non-transitory, machine-readable, storage device of claim 13 wherein the instructions that cause the electric load control circuitry to determine whether the internal timekeeper can be synchronized to an external timekeeper further cause the electric load control circuitry to:
determine whether the electric load control circuitry can receive time/date information from the external timekeeper via a portable device communicatively coupled to the Internet.
14. The non-transitory, machine-readable, storage device of claim 13, wherein the instructions, when executed by the gateway control circuitry, further cause the gateway control circuitry to:
responsive to receipt of a message from a portable network device via second network interface circuitry communicatively coupled to the gateway control circuitry, synchronize the local timeclock with a time data received from the portable network device;
wherein, the second network interface circuitry communicatively couples the gateway control circuitry to a second network using a second network protocol different from the first network protocol
17. The non-transitory, machine-readable, storage device of claim 13 wherein the instructions, when executed by the electric load control circuitry, further cause the electric load control circuitry to:
receive an input that includes information indicative of a failure of a power supply to the electric load control apparatus.
18. The non-transitory, machine-readable, storage device of claim 13 wherein the instructions, when executed by the gateway control circuitry, further cause the gateway control circuitry to:
transition the electrical load control system gateway from a relatively high-power consumption state to a relatively low-power consumption state responsive to receipt, by the gateway control circuitry, of an input signal indicative of a failure of a primary power supply to the electrical load control system gateway.
18. The non-transitory, machine-readable, storage device of claim 17 wherein the instructions, when executed by the electric load control circuitry, further cause the electric load control circuitry to:
cease execution of the timeclock schedule responsive to receipt of the input that includes information indicative of the failure of the power supply to the electric load control apparatus.
18. The non-transitory, machine-readable, storage device of claim 13 wherein the instructions, when executed by the gateway control circuitry, further cause the gateway control circuitry to:
transition the electrical load control system gateway from a relatively high-power consumption state to a relatively low-power consumption state responsive to receipt, by the gateway control circuitry, of an input signal indicative of a failure of a primary power supply to the electrical load control system gateway.
Claims 1-5, 7-11 and 13-17 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-2, 4, 6-8, 10, 12-14, 16 and 18 of USPAT 11983027, in view of US7634555 to Wainscott Jr. et al. (hereinafter “Wainscott”).
Although the claims at issue are not identical, they are not patentably distinct from each other because the scopes of both claim sets are extremely similar (for example, the term “internal timekeeper” is interchangeable with “local timekeeper” and the term “external timekeeper” is interchangeable with “remote timekeeper”, also “initiate a timeout timer; upon expiration of the timeout timer: discontinue communication of commands to the control device using the timeclock schedule” in USPAT11983027 reads on “determine whether a temporal error of the internal timekeeper exceeds a defined temporal error threshold value; and responsive to the determination that the temporal error of the internal timekeeper exceeds a defined temporal error threshold value, abort execution of the timeclock schedule” of claim 1 of instant application because the timeout can be interpreted as the temporal error and the timeout timer can be interpreted as the defined temporal error threshold), the difference in the independent claim 1 of the instant application and the independent claim 1 of USPAT 11983027 is that the independent claim 1 of the instant application recites less limitation than the independent claim 1 of USPAT 11983027, for example, the independent claim 1of the instant application does not recite “prior to expiration of the timeout timer:
communicate a command to a control device using a timeclock schedule retrieved from a communicatively coupled memory using the local timeclock and the retrieved timeclock schedule; and attempt to periodically synchronize the local timeclock with the present time data retrieved from the network connected remote timekeeper; upon successful synchronization the local timeclock with the present time data retrieved from the network connected remote timekeeper, stop the timeout timer” that are recited in the independent claim 1 of USPAT 11983027. Omission of an element and its function in a combination is an obvious expedient if the remaining elements perform the same function as before. In re KARLSON (CCPA) 136 USPQ 184 (1963). Another difference is that claim 1 of the instant application further recites “timekeeper synchronized to an external timekeeper via a second network using a second communication protocol”. Wainscott in an analogous art discloses timekeeper synchronized to an external timekeeper via a second network using a second communication protocol (Wainscott, see Fig. 1 and col. 6 lines 9-21 for the NCE having SNTP that synchorize its clock with the clocks on the Internet).
Therefore, it would have been obvious to a person of ordinary skill in the art at the time of invention was made to incorporate the teaching of Wainscott of into the system of USPAT 11983027. The modification would be obvious because one of the ordinary skill in the art would want to allow BAS device to adjust time for local daylight savings time as appropriate (Wainscott, see col. 6 lines 29-31).
For similar reasons, claims 2-5, 7-11 and 13-17 of the instant application are patentably indistinct from claims 1-2, 4, 6-8, 10, 12-14, 16 and 18 of USPAT 11983027.
Claims 6, 12 and 18 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 6, 12 and 18 of USPAT 11983027, in view of Wainscott, further in view of US20080111527 to Sarmast.
The difference in the dependent claim 6 of the instant application and the dependent claim 6 of USPAT 11983027 is that the dependent claim 6 of the instant application recites “cease execution of the timeclock schedule responsive to receipt of the input that includes information indicative of the failure”, Sarmast in an analogous art discloses cease execution of the timeclock schedule responsive to receipt of the input that includes information indicative of the failure (Sarmast, see [0022] and [0038]).
Therefore, it would have been obvious to a person of ordinary skill in the art at the time of invention was made to incorporate the teaching of Sarmast of into the system of USPAT 11983027. The modification would be obvious because one of the ordinary skill in the art would want to protect the system in the event of fault conditions (Sarmast, see [0038]).
For similar reasons, claims 12 and 18 of the instant application are patentably indistinct from claims 12 and 18 of USPAT 11983027.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant’s disclosure.
US 20090057428 discloses a controller that accommodates and/or facilitates control from a remote location. The HVAC control system may include a web-enabled building control appliance with a controller, a first port and a second port. The controller may implement a web server that is coupled to the first port for serving up one or more web pages on a first network and for receiving a number of responses. The controller may also be coupled to the second port so as to communicate with one or more communicating thermostats via a second network. The web server may be adapted to provide one or more web-pages via the first port that solicit and accept an alarm condition for the one or more communicating thermostats. The controller may provide and/or monitor the alarm condition of the one or more communicating thermostats over the second network.
US 20080191837 discloses operating a lighting control system having a plurality of control devices coupled to a communication link uses a polling technique to coordinate the transmission of digital messages between the control devices.
US 8306051 discloses a communication protocol for a lighting control system having a plurality of control devices coupled to a communication link uses a polling technique to coordinate the transmission of digital messages between the control devices. When the control devices are powered up, one of the control devices is established as a "master" device. During normal operation, the master device transmits a standard poll message to each of the control devices in succession using a unique semi-permanent Poll ID for each of the control devices. The master device periodically transmits a Poll-ID-Request poll message to the control devices allow those devices that do not have a Poll ID to request a Poll ID. If a control device determines either that the master device is not transmitting poll messages to it, or that another control device has the same Poll ID, the control device drops its Poll ID and acquires another Poll ID.
US 20130103621 discloses intelligent controllers that continuously, periodically, or intermittently calculate and display the time remaining until a control task is projected to be completed by the intelligent controller. In general, the intelligent controller employs multiple different models for the time behavior of one or more parameters or characteristics within a region or volume affected by one or more devices, systems, or other entities controlled by the intelligent controller. The intelligent controller collects data, over time, from which the models are constructed and uses the models to predict the time remaining until one or more characteristics or parameters of the region or volume reaches one or more specified values as a result of intelligent controller control of one or more devices, systems, or other entities.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JASON LIN whose telephone number is (571)270-3175. The examiner can normally be reached on Monday-Friday 9:30 a.m. – 6:00 p.m. PST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Robert E. Fennema can be reached on (571)272-2748. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/JASON LIN/
Primary Examiner, Art Unit 2117
Prosecution Insights