DETAILED ACTION
The current Office Action is in response to the papers submitted 02/27/2024. Claims 1 - 20 are pending.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
There is no mention of compression being performed in the claims.
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Objections
Claim 15 is objected to because of the following informalities:
Claim 15 is worded oddly to the examiner. It appears that claim 15 is actually meant to be dependent on claim 14 possibly and not claim 1.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1 – 20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 discloses “a second memory space” in two different locations in lines 6 – 7 and 10. This makes it unclear if there is one or two memory locations referred to as a second memory space. This makes the scope of the claims indefinite since it is unclear how many “second memory space” locations there are. The drawings only show two memory locations in a computing device in figure 2. For examination the second mention of a second memory space will be treated as referring back to the first disclosure of a second memory space.
Claim 3 recites “the second memory space” in line 1. Claim 3 is dependent on claim 1. Claim 1 discloses a second memory space in two different locations in lines 6 – 7 and 10 as indicated above. It is unclear how many second memory locations are actually being claimed and which second memory location is being referred to in claim 3. In accordance with the interpretation of claim 1, the second memory space in claim 3 will be treated as referring to the single second memory location in claim 1.
Claim 9 recites “the second memory space” in lines 4 – 5. The claim is rejected on the same basis as claim 3 above since claim 9 is also dependent on claim 1.
Claim 12 recites the limitation "the delta file" in 2 - 3. There is no previous mention of a delta file in the claim or any base claim. There is insufficient antecedent basis for this limitation in the claim. For examination claim 12 will be treated as being dependent on claim 11 which recites a delta file.
Claim 18 contains similar language rejected in claim 1 above and is thus rejected for similar reasoning.
Claim 20 recites “the second memory space” in lines 1 - 2. Claim 20 is dependent on claim 18. Claim 18 discloses a second memory space in two different locations in lines 7 - 8 and 10 - 11. It is unclear how many second memory locations are actually being claimed and which second memory location is being referred to in claim 20. In accordance with the interpretation of claim 18, the second memory space in claim 20 will be treated as referring to the single second memory location in claim 18.
All remaining claims are rejected for being dependent on a rejected base claim.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1 – 10 and 14 - 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee (Pub. No.: US 2004/0186946) referred to as Lee in view of Kim et al. (Pub. No.: US 2022/0334718) referred to as Kim.
Regarding claim 1, Lee teaches allocating a scratch buffer [44, Fig 4] within a first memory space [24, Fig 2; Paragraph 0035; The buffer 44 is allocated to data as data is read or written between the host and the flash memory] of a controller [14, Fig 1; Item 14 controls the flash memory along with performing other functions. The memory in 14 and 6 are used by the controller to store data make both memories of the controller];
storing a particular portion of a chunk of data elements [Paragraphs 0036 – 0037; Fig 5; A first entry in the scratch buffer is a 4 KB portion of the chunk of data requested to be written] in the scratch buffer [44, Fig 4; S1010 and S1012, Fig 7; Write data elements from the host are allocated and stored in the buffer];
flushing the particular portion of the chunk [Paragraphs 0036 – 0037; A first entry in the scratch buffer is a 4 KB portion of the chunk of data requested to be written] from the scratch buffer [44, Fig 4] to a second memory space [6, Fig 1; Paragraph 0044; Data in the buffer 44 is flushed to the flash memory 6];
storing at least one subsequent portion of the chunk [Paragraphs 0036 – 0037; A next entry in the scratch buffer in a subsequent portion] in the scratch buffer [44, Fig 4];
flushing the at least one subsequent portion of the chunk [Paragraphs 0036 – 0037; The buffer 44 stores data in 4 KB portion sizes. When the write request is larger than 4 KB the buffer will store multiple portions of 4 KB size] from the scratch buffer [44, Fig 4] to a second memory space [6, Fig 1; Paragraph 0044; Data in the buffer 44 is flushed to the flash memory 6] of the controller [14, Fig 1. The memory in 14 and 6 are used by the controller to store data make both memories of the controller]; and
using the flushed first and at least one subsequent portion of the chunk [Paragraphs 0036 – 0037; The buffer 44 stores data in 4 KB portion sizes. When the write request is larger than 4 KB the buffer will store multiple portions of 4 KB size] by the controller [S910, Fig 6; The controller uses the flushed data to process a read request when request is received for the flushed data].
However, Lee may not specifically disclose the limitation(s) of software change elements and applying the software change elements to the controller.
Kim discloses software change elements and applying the software change elements to the controller [Paragraphs 0118 – 0119; The data the controller stores is software change data that changes the operation of the controller when applied to the controller].
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Kim in Lee, because it allows the functionality of the controller to be updated with new features as needed [Paragraph 0054] without having to restart or reboot the system [Paragraph 0004].
Regarding claim 2, Lee teaches the first memory space exists [24, Fig 2; Paragraph 0035] in random access memory (RAM) [44, Fig 4; The buffer is RAM].
Regarding claim 3, Lee teaches the second memory space exists in flash memory [6, Fig 1; Paragraph 0044; The second memory space is flash memory].
Regarding claim 4, Lee teaches a size of the chunk is a multiple of a page size [Paragraphs 0036 – 0037; The page size if 512 bytes. When the size of the data to be written from the host is a multiple of 512 bytes (such as 5 GB) then the size of the chunk is a multiple of the page size] associated with the flash memory [6, Fig 1; Paragraph 0044].
Regarding claim 5, Lee teaches a size of the scratch buffer [44, Fig 4] is a multiple of a page size [Paragraphs 0036 – 0037; Each entry in the scratch buffer is a multiple of the page size. This makes the overall size of the scratch buffer a multiple of the page size] associated with the flash memory [6, Fig 1; Paragraph 0044].
Regarding claim 6, Lee teaches storing the particular portion of the chunk [Paragraphs 0036 – 0037; Fig 5; A first entry in the scratch buffer is a 4 KB portion of the chunk of data requested to be written] at the scratch buffer [44, Fig 4; S1010 and S1012, Fig 7; Write data elements from the host are allocated and stored in the buffer] comprises trapping the particular portion of the chunk [S1006 and S1012, Fig 7; Paragraph 0044; The portions of the chunk of data are trapped in the scratch buffer until they are flushed out of the scratch buffer].
Regarding claim 7, Lee teaches trapping the particular portion of the chunk [Paragraphs 0036 – 0037; Fig 5; A first entry in the scratch buffer is a 4 KB portion of the chunk of data requested to be written] comprises executing a trapping function configured to trap chunk portions [S1006 and S1012, Fig 7; Paragraph 0044; Trapping the portions to the scratch buffer by storing the portions in the scratch buffer until they are flushed shows a trapping function is executed to perform the trapping].
Regarding claim 8, Lee teaches the trapping function [S1006 and S1012, Fig 7; Paragraph 0044; Trapping the portions to the scratch buffer by storing the portions in the scratch buffer until they are flushed shows a trapping function is executed to perform the trapping] is not configured to trap an entire chunk [Abstract, Paragraph 0040; Claims 8, 15, 33; The buffer has a predetermined capacity showing that the buffer is configured to not store the entire chunk when the entire chunk is larger than the capacity of the buffer].
Regarding claim 9, Lee teaches the controller [14, Fig 1] includes an initial function [46, Fig 4; Paragraph 0044; The flushing operations is considered an initial function in 46 which is in 14];
the method further comprises storing the trapping function on the controller [ 14, Fig 1; 46, Fig 4; S1006 and S1012, Fig 7; Paragraph 0044; The trapping is performed by trapping function stored in 46 which is part of the controller 14]; and
flushing the particular portion of the chunk [Paragraphs 0036 – 0037; The buffer 44 stores data in 4 KB portion sizes] from the scratch buffer [44, Fig 4] to the second memory space [6, Fig 1; Paragraph 0044; Data in the buffer 44 is flushed to the flash memory 6] comprises executing the trapping function instead of the initial function [Paragraph 0044; Storing the data in the scratch buffer involves executing the trapping for the storing into the scratch buffer instead of the executing the flushing function].
Regarding claim 10, Lee teaches storing a particular portion of a chunk of data elements [Paragraphs 0036 – 0037; Fig 5; A first entry in the scratch buffer is a 4 KB portion of the chunk of data requested to be written] in the scratch buffer [44, Fig 4; S1010 and S1012, Fig 7; Write data elements from the host are allocated and stored in the buffer].
Kim discloses wherein the software change elements include a software change file representing a change to software of the controller [Paragraphs 0118 – 0119; The data the controller stores is software change data that changes the operation of the controller when applied to the controller by changing the software the controller executes].
Regarding claim 14, Lee teaches dynamically partitioning [S1010, Fig 7; Paragraph 0044; Adding an entry is dynamically partitioning a new entry in the scratch buffer 44] and overlaying [S1006, Fig 7; Paragraphs 0043; Step S1006 overlays data in the scratch buffer 44 with new data from the write request] the first memory space [24, Fig 2; Paragraph 0035].
Regarding claim 15, Lee teaches dynamically partitioning [S1010, Fig 7; Paragraph 0044; Adding an entry is dynamically partitioning a new entry in the scratch buffer 44] and overlaying [S1006, Fig 7; Paragraphs 0043; Step S1006 overlays data in the scratch buffer 44 with new data from the write request] the first memory space [24, Fig 2; Paragraph 0035] is based on metadata associated with the chunk [Paragraphs 0043 – 0044; The partitioning and overlaying is based on the logical address metadata associated with the chunk to be written].
Regarding claim 16, Lee teaches a size of the scratch buffer [44, Fig 4] is smaller than the size of the chunk [Abstract, Paragraph 0040; Claims 8, 15, 33; The buffer has a predetermined capacity. The size of the chunk of data to be stored does not have a size limit showing at times the size of the chunk will be larger than the size of the static predetermined scratch buffer].
Regarding claim 17, Lee teaches the chunk is one megabyte or less in size [Paragraphs 0036; The size of the chunk of data to be written as no size limit showing sizes of one megabyte or less are taught. When the size of the chunk is 4 KB, as one example, the chunk is less than one megabyte].
Claims 18 – 20 are medium claims corresponding to the method claims 1 – 3 and are rejected using the same prior art and reasoning as claims 1 – 3. Lee teaches the use of instructions and shows flow charts showing the operations of instructions. Instructions are stored in a medium and executed in a system by a processing device that reads and interprets the instructions stored in a medium [Figs 6 – 7 and 10 – 11; Paragraph 0045].
Claim(s) 11 - 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee (Pub. No.: US 2004/0186946) referred to as Lee in view of Kim et al. (Pub. No.: US 2022/0334718) referred to as Kim as applied to claim 10 above, and further in view of Moran et al. (Pub. No.: US 2021/0132859) referred to as Moran.
Regarding claim 11, Lee teaches storing a particular portion of a chunk of data elements [Paragraphs 0036 – 0037; Fig 5; A first entry in the scratch buffer is a 4 KB portion of the chunk of data requested to be written] in the scratch buffer [44, Fig 4; S1010 and S1012, Fig 7; Write data elements from the host are allocated and stored in the buffer].
Kim discloses software change elements and applying the software change elements to the controller [Paragraphs 0118 – 0119; The data the controller stores is software change data that changes the operation of the controller when applied to the controller. Software is data].
However, Lee in view of Kim may not specifically disclose the limitation(s) of data elements include a delta file.
Moran discloses data elements include a delta file [Paragraph 0011; The modification or update data is in the form of a data file].
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Moran in Lee in view of Kim, because it allows less data to be transferred which also reduces the amount of bandwidth used [Paragraph 0011].
Regarding claim 12, Lee teaches the particular portion of the chunk [Paragraphs 0036 – 0037; Fig 5; A first entry in the scratch buffer is a 4 KB portion of the chunk of data requested to be written] and the at least one subsequent portion of the chunk [Paragraphs 0036 – 0037; A next entry in the scratch buffer in a subsequent portion] are extracted from a file by the controller [14, Fig 1; Paragraphs 0036 – 0037; The data stored is extracted from the file sent from the host to be saved].
Kim discloses software change elements and applying the software change elements to the controller [Paragraphs 0118 – 0119; The data the controller stores is software change data that changes the operation of the controller when applied to the controller].
Moran discloses the file is a delta file [Paragraph 0011; The modification or update data is in the form of a data file].
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Moran in Lee in view of Kim, because it allows less data to be transferred which also reduces the amount of bandwidth used [Paragraph 0011].
Allowable Subject Matter
Claim 13 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base
claim and any intervening claims.
Conclusion
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/Christopher D Birkhimer/Primary Examiner, Art Unit 2138