Prosecution Insights
Last updated: April 19, 2026
Application No. 18/589,977

Ciphertext Nullification Operations

Non-Final OA §101§103
Filed
Feb 28, 2024
Examiner
ULLAH, SHARIF E
Art Unit
2495
Tech Center
2400 — Computer Networks
Assignee
International Business Machines Corporation
OA Round
1 (Non-Final)
84%
Grant Probability
Favorable
1-2
OA Rounds
2y 8m
To Grant
99%
With Interview

Examiner Intelligence

Grants 84% — above average
84%
Career Allow Rate
380 granted / 451 resolved
+26.3% vs TC avg
Strong +22% interview lift
Without
With
+22.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
22 currently pending
Career history
473
Total Applications
across all art units

Statute-Specific Performance

§101
14.6%
-25.4% vs TC avg
§103
57.6%
+17.6% vs TC avg
§102
5.9%
-34.1% vs TC avg
§112
13.2%
-26.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 451 resolved cases

Office Action

§101 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statement (IDS) submitted on 03/01/2024 & 10/09/2025 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Claim Rejections - 35 USC § 101 Claims 11-18 are rejected under 35 U.S.C. 101 because the claimed invention is directed to non-statutory subject matter. In regards to claim 11, claim 1 is directed towards a system comprising a processor and a computer readable medium. The specification does not distinctly limit the processor as a hardware element. The computer readable medium but does not exclude a signal and carrier wave. An ordinary skill in the art will define the computer readable medium to include signal and carrier wave which are a non-statutory subject matter. Therefore, the system lacks at least one hardware element. Examiner suggests adding the phrase "non-transitory" before "computer readable medium", or using “computer readable storage device”, or “a computer readable medium which is not a signal”, or "hardware processor" to overcome the 35 USC 101 rejection set forth for claim 11. Dependent claims 12-19 do not cure the deficiency of claim 1 and are rejected under 35 U.S.C 101 for their dependency upon claim 11. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-3, 6, 8-9, 11-13, 16, 18-19 & 20 are rejected under 35 U.S.C 103 as being unpatentable over Dolev et al. (US 2024/0176883), hereon referred to as Dolev, in view of Boudguiga et al. (US 2024/0054136), and hereon referred to as Boudguiga. In regards to claims 1,11 & 20, Dolev discloses receiving a ciphertext in nullification logic of a cryptographic circuit, wherein the cryptographic circuit comprises one or more cryptographic functions to be performed on the ciphertext (The server capabilities to manipulate the addition operation when the computation is executed over bit representation is examined. The ability to replace the carry bits that are computed in each bitwise operation by 0, will lead to the result of 00 when adding 01 to 01. The server can just ignore or set to zero any carry bit that arose from the addition operation, resulting in a wrong result. Therefore, the primitives of the server are further restricted to execute black box word granularity additions, where the server calls a function that returns the correct addition result, rather than involving a binary addition. Hence, a computation black box supporting environment is built, similar to the interpreter level; Paragraphs 00090-0095; 0105-0110); determining, by the nullification logic, whether the received ciphertext is to be nullified (In the complete fingerprint scenario, since all inputs have a unique fingerprint bit location, no carry operation in the fingerprint section while adding is required. This implies that any carry operation indicates an unintended (malicious) behavior. This behavior might represent an attempt to compensate for a missing input data and will influence the black box definition, so it nullifies the result when a carry operation, in the relevant section, is detected; Paragraphs 0090-0095; 0105-0110). However, Dolev does not disclose in response to the determination indicating that the ciphertext is to be nullified, generating, by the nullification logic, a nullified ciphertext and outputting the nullified ciphertext; and in response to the determination indicating that the ciphertext is not to be nullified, outputting, by the nullification logic, the received ciphertext. In an analogous art Boudguiga discloses in response to the determination indicating that the ciphertext is to be nullified, generating, by the nullification logic, a nullified ciphertext and outputting the nullified ciphertext (the external multiplication operation makes it possible to multiply a plaintext by a ciphertext to obtain a ciphertext. It will be noted that this operation carries out an absorption in the homomorphic domain; The request is formed by a vector u of 2.sup.m encrypted with a ciphertext of the value “1” in position q.sub.m, the remainder consisting of ciphertexts of the value “0”.; Paragraphs 0055-0060; 0070-0075); and in response to the determination indicating that the ciphertext is not to be nullified, outputting, by the nullification logic, the received ciphertext (The request is formed by a vector u of 2.sup.m encrypted with a ciphertext of the value “1” in position q.sub.m, the remainder consisting of ciphertexts of the value “0”; where u.sub.i is the i.sup.th element of the vector u and δ is the Kronecker symbol; Paragraphs 0055-0060; 0070-0075). At the time before the effective filing date of the invention, it would have been obvious to the one with ordinary skill in the art to combine the teachings disclosed by Dolev, with the teachings disclosed by Boudguiga regarding in response to the determination indicating that the ciphertext is to be nullified, generating, by the nullification logic, a nullified ciphertext and outputting the nullified ciphertext; and in response to the determination indicating that the ciphertext is not to be nullified, outputting, by the nullification logic, the received ciphertext. The suggestion/motivation of the combination would have been to provide additional security in confidentially querying a database (Boudguiga; Paragraph 0001). In regards to claims 2 & 12, Boudguiga wherein determining that the ciphertext is unauthenticated and should be nullified comprises receiving, by the nullification logic, a ciphertext selection input, wherein the ciphertext selection input specifies whether or not the ciphertext is to be nullified, and wherein the nullification logic outputs either the ciphertext or the nullified ciphertext based on the ciphertext selection input (the user B constructs a request R(q.sub.m) in the form of a vector u of 2.sup.m encrypted with a homomorphic ciphertext of the value “1” in position q.sub.m, the other elements of this vector being homomorphic ciphertexts of the value “0; Paragraphs 0080-0085). In regards to claims 3 & 13, Boudguiga discloses wherein the ciphertext selection input is an encrypted value of a cleartext selection value (The request is formed by a vector u of 2.sup.m encrypted with a ciphertext of the value “1” in position q.sub.m, the remainder consisting of ciphertexts of the value “0”; Paragraphs 0070-0075). In regards to claims 6 & 16, Dolev discloses, wherein the nullification logic generates a masked value by constructing the nullified ciphertext bit by bit without a mask or selector input specifying whether to nullify the ciphertext (The black box is implemented using the OR and NOT bitwise operators (algorithms 2, 3), where the black box will OR all the carries that resulted in the fingerprint section, negate this result, and multiply it by the addition result to zero the final output when an undesired carry takes place; Paragraphs 0105-0110). In regards to claims 8 & 18, the combination of Dolev and Boudguiga discloses wherein the cryptographic circuit is an authenticated transciphering circuit in which an input ciphertext is a first type of ciphertext that is converted to a different second type of ciphertext to thereby generate the received ciphertext that is received by the nullification logic (The elements presented in the claim(s) do not contain any additional features, do not present any inventive step or novelty not addressed/presented in the combination of Dolev and Boudguiga. Examiner takes official notice, that these elements are commonly known, minor design details that are derivable from the prior art and are well known, and obvious to an ordinary skill in the art. The additional features of these claims represent normal design options, which the skilled person would implement the combination of Dolev and Boudguiga, depending on the circumstances, without exercising any inventive activity). In regards to claims 9 & 19, the combination of Dolev and Boudguiga discloses wherein the first type of ciphertext is an AEAD ciphertext and the second type of ciphertext is a homomorphic encryption ciphertext (The elements presented in the claim(s) do not contain any additional features, do not present any inventive step or novelty not addressed/presented in the combination of Dolev and Boudguiga. Examiner takes official notice, that these elements are commonly known, minor design details that are derivable from the prior art and are well known, and obvious to an ordinary skill in the art. The additional features of these claims represent normal design options, which the skilled person would implement the combination of Dolev and Boudguiga, depending on the circumstances, without exercising any inventive activity). Claims 7 & 17 are rejected under 35 U.S.C 103 as being unpatentable over the combination of Dolev and Boudguiga, in view of Adir et al. (US 2024/0137205), and hereon referred to as Adir. In regards to claims 7 & 17, the combination of Dolev and Boudguiga does not disclose wherein generating the nullified ciphertext comprises: generating a random mask value bit-by-bit using an algorithm that generates random bits and a helper function that operates on a selector value, where the selector value indicates whether or not the received ciphertext is to be nullified or not; and combining the random mask value with the received ciphertext to generate the nullified ciphertext. However Adir discloses wherein generating the nullified ciphertext comprises: generating a random mask value bit-by-bit using an algorithm that generates random bits and a helper function that operates on a selector value, where the selector value indicates whether or not the received ciphertext is to be nullified or not; and combining the random mask value with the received ciphertext to generate the nullified ciphertext (a vector of positive real numbers and that can be encoded with low scale (e.g., a scale=1) is discovered; a vector R of N random values in the range [min, maxval] is generated. At line (2), the vector R is encoded, preferably under CKKS, with scale=1. This encode operation generates E. At line (3), the result of the encoding in line (2) is then decoded. This is decode operation D. At line (4), a test is run to determine if the decode operation encodes a vector of positive values. If so, the result of the encode operation is returned as the mask. If, however, D does not encode a vector of positive values, the min variable is then indexed at line (5) by setting min=min*2, and the iterates for at most number-of-trials times as long as min is still less than or equal to maxval/2. If there is no success in all of these iterations, then a not-found response is returned; Paragraphs 0045-0055). At the time before the effective filing date of the invention, it would have been obvious to the one with ordinary skill in the art to combine the teachings disclosed by the combination of Dolev and Boudguiga, with the teachings disclosed by Adir regarding wherein generating the nullified ciphertext comprises: generating a random mask value bit-by-bit using an algorithm that generates random bits and a helper function that operates on a selector value, where the selector value indicates whether or not the received ciphertext is to be nullified or not; and combining the random mask value with the received ciphertext to generate the nullified ciphertext. The suggestion/motivation of the combination would have been to provide additional security in use of homomorphic encryption operations to facilitate inferencing against encrypted data (Adir; Paragraph 0001). Allowable Subject Matter Claims 4-5, 10, & 14-15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHARIF E ULLAH whose telephone number is (571)272-5453. The examiner can normally be reached Mon-Fri 7:00-5:30. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Farid Homayounmehr can be reached at 571-272-3739. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SHARIF E ULLAH/Primary Examiner, Art Unit 2495
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Prosecution Timeline

Feb 28, 2024
Application Filed
Mar 07, 2026
Non-Final Rejection — §101, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
84%
Grant Probability
99%
With Interview (+22.4%)
2y 8m
Median Time to Grant
Low
PTA Risk
Based on 451 resolved cases by this examiner. Grant probability derived from career allow rate.

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