Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 7/21/26 has been entered.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-9 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Re claims 1-9, applicant added new terms “processing chamber combinations” and “plurality of processing chamber combinations” which are not described nor found in the original specification and it is not understood what exactly is meant by these terms and may be new matter.
Re claims 4-5, applicant added new term “base bases” which is not described nor found in the original specification and it is not understood what exactly is meant by this term and may be new matter.
Claims 1-9 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Re claims 1-9, applicant added new terms “processing chamber combinations” and “plurality of processing chamber combinations” which are not described nor found in the original specification and it is not understood what exactly is meant by these terms making the claims indefinite.
Re claims 4-5, applicant added new term “base bases” which is not described nor found in the original specification and it is not understood what exactly is meant by this term making the claims indefinite.
For sake of examination, the claims are interpreted as shown in the art rejections below.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2,6-7,9 are rejected under 35 U.S.C. 103 as being unpatentable over Lill (US 9,818,633) in view of Hofmeister (8,602,706).
Re claims 1,9, Lill teaches a semiconductor manufacturing apparatus 10, comprising: a front end module 100 with a load port 130 to which a conveyance container 135 is connected; and a plurality of processing units (chamber combinations) 160,190, configured to process a semiconductor substrate, disposed around the front end module in a plan view from a normal direction of the upper surface of the front end module, and each connected to the front end module from at least two directions (figures 2,7,etc.) in the plan view, wherein the semiconductor substrate is conveyed between the conveyance container and the processing units via the front end module.
Lill teaches movable robot 180 that moves between rows of chambers but not each of the plurality of processing units includes at least one conveyance device configured to convey the semiconductor substrate along two rows of chambers within the processing unit. However, Lill in paragraph 33 and elsewhere states that other types of process unit arrangements may be used. Hofmeister (see figures such as 7,2-6,etc.) teaches a similar semiconductor manufacturing apparatus with a plurality of processing units 18A,18B, etc. including at least one conveyance container & device 22,122,406 configured to convey the semiconductor substrate along two rows of chambers 20,301,302 within the processing unit and around the plurality of loadports (figure 7, column 9 line 14- column 10 line 65, 18,18A,18B,18P1, EFEM’s, etc.). It would have been obvious to have modified Lill in view of Hofmeister as claimed in order to allow greater variation in process chamber numbers, types and layouts of processing units to meet the needs of varied given situations, available space and other given requirements.
Re claim 2, Lill & Lill as already modified teaches the processing units include a plurality of processing chambers (200,205; 20,301,302) each configured to process semiconductor substrate.
Re claim 6, Lill teaches the conveyance container includes a front opening unified pod 135.
Re claim 7, Lill teaches the conveyance container is configured to transfer the substrate.
Claims 3,8 are rejected under 35 U.S.C. 103 as being unpatentable over Lill (US 9,818,633) in view of Hofmeister (8,602,706) & Jeong (KR10-2018-0045316).
Re claims 3,8, Lill teaches (see claim 1 rejection above & included herein this claim rejection) the processing units (chamber combinations) are connected to the front end module from two (front / back) rather than four directions orthogonal to each other in the plan view. Jeong teaches a similar semiconductor manufacturing apparatus with a top loading (figure 2, FOUPs10 enter/exit via 143) front end module 100 with processing units 230 on left / right sides as well as front (back) sides. Also duplication and rearrangement of parts is an obvious modification (In re Harza, 274 F.2d 669, 124 USPQ 378 (CCPA 1960); In re Japikse, 181 F.2d 1019, 86 USPQ 70 (CCPA 1950); In re Kuhle, 526 F.2d 553, 188 USPQ 7 (CCPA 1975)).
It would have been obvious to one of ordinary skill in the art prior to filing to have modified Lill in view of Jeong as claimed in order to have the processing units connected to the front end module from four directions orthogonal to each other in the plan view as claimed in order to allow greater processing, layout and handling capabilities to fit the needs of a varied space limitations and processing needs.
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Lill (US 9,818,633) in view of Hofmeister (8,602,706) & Chen (US 8,944,739).
Re claim 4, Lill does not teach a plurality of base units connected to each other while sharing one of the processing units, wherein the plurality of processing units are connected to the front end module as a base unit (base bases). Chen teaches multiple base unit front end modules (EFEMs) (see figures, not numbered) connected & sharing processing units (see figures) with FOUPs 50 transferring overhead. Also duplication and rearrangement of parts is an obvious modification (In re Harza, 274 F.2d 669, 124 USPQ 378 (CCPA 1960); In re Japikse, 181 F.2d 1019, 86 USPQ 70 (CCPA 1950); In re Kuhle, 526 F.2d 553, 188 USPQ 7 (CCPA 1975)). It would have been obvious to one of ordinary skill in the art prior to filing to have modified Lill in view of Chen as claimed in order to allow greater processing, layout and handling capabilities to fit the needs of a varied space limitations and processing needs.
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Lill (US 9,818,633) in view of Hofmeister (8,602,706), Chen (US 8,944,739) and Bachrach (US 6,698,991).
Re claim 5, Lill teaches a controller 156 with a method for monitoring & designating paths for the wafers to be moved through the semiconductor manufacturing apparatus & communicating with other EFEMs, load ports, etc. (columns 9-12). Bachrach teaches a semiconductor manufacturing apparatus with multiple base unit front end modules & load ports LP with a method of monitoring operation that can detect abnormalities (need for repair, maintenance, etc.) and reroute to non-abnormal units with shared connections (figures 1-5, column 3 lines 23-32, column 4 lines 38-colunm 5 line 15) to give a fault tolerant system and backup ability to allow continuous production. It would have been obvious to one of ordinary skill in the art prior to filing to have modified Lill as claimed in order to have a fault tolerant system and backup ability to allow continuous production.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Moura teaches (abstract, cover, figure 4) a similar semiconductor apparatus with conveyance devices (1500, etc.).
Applicant's arguments filed 7/21/26 have been fully considered but they are not persuasive.
As shown above applicant’s amendments are not supported in the original specification, indefinite, and one of ordinary skill would not have understood the terms in light of the specification.
Applicant argues that the references do not teach a conveyance container moving between loadports and processing chambers, however, the conveyed devices 22,122,406,122A are conveyance containers that hold wafer substrates and are shown in the figures and columns 9,10 and elsewhere throughout the Hoffmeister reference and meet the claim limitations as written.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL S LOWE whose telephone number is (571)272-6929. The examiner can normally be reached Hoteling M,Th,F & alternating W 6:30am-6:30pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Saul Rodriguez can be reached at 5712727097. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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MICHAEL S. LOWE
Primary Examiner
Art Unit 3652
/MICHAEL S LOWE/Primary Examiner, Art Unit 3652
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