Prosecution Insights
Last updated: October 04, 2026
Application No. 18/591,521

CURRENT-REUSE CURRENT-MODE NOTCH FILTER

Final Rejection §103
Filed
Feb 29, 2024
Examiner
GONZALES, APRIL GUZMAN
Art Unit
2648
Tech Center
2600 — Communications
Assignee
Sequans Communications SA
OA Round
2 (Final)
85%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
91%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allowance Rate
728 granted / 855 resolved
+23.1% vs TC avg
Moderate +6% lift
Without
With
+6.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
22 currently pending
Career history
876
Total Applications
across all art units

Statute-Specific Performance

§101
3.1%
-36.9% vs TC avg
§103
53.0%
+13.0% vs TC avg
§102
33.6%
-6.4% vs TC avg
§112
5.4%
-34.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 855 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statement submitted on 02/11/2026 has been considered by the Examiner and made of record in the application file. Response to Amendment The Examiner acknowledges the receipt of the Applicant’s amendment filed on 05/08/2026. Claims 1, 3, 11, and 16 have been amended. Claims 1-20 are currently pending in the present application. Response to Arguments Applicant’s arguments with respect to claims 1-20 have been considered but are moot in view of the new grounds of rejection. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over van Sinderen et al. (US 2014/0340151 A1 herein van Sinderen), and further in view of Haque et al. (US 11,374,599 herein Haque). Regarding claim 1, van Sinderen teaches a receiver circuit (read as FM receiver) (van Sinderen - [0073], [0078]) comprising: a low noise transconductance amplifier (LNTA) stage (read as Low Noise Transconductance Amplifier with current amplification; LNTA amplifies the RF signal in the current domain and directly delivers a signal current into the mixer) (van Sinderen - Figure 2, Figure 3, Figure 4, and [0009]-[0010]); a down-conversion mixer stage (read as down converter using a low noise amplifier the output of which is provided to a passive mixer; the LNTA output drives a passive mixer requiring high linearity and low noise) (van Sinderen - Figure 1, [0006], [0075], and [0078]). However, van Sinderen fails to teach a current-mode notch filter coupled to an output of the passive down-conversion mixer stage; and a gain stage coupled to an output of the current-mode notch filter, wherein supply currents consumed by the current-mode notch filter and the gain stage are combined and re-used to bias and supply the LNTA stage. In the related art, Haque teaches a current-mode notch filter coupled to an output of the passive down-conversion mixer stage (read as low pass filter has an input coupled to an output of the passive mixer; RF output current iinta of LNTA 602 is down-converted by passive mixer 604 formed using two switches that are driving by two non-over-lapping clocks from a local oscillator modulator 608) (Haque – Abstract, column 2 lines 1-21, column 4 lines 21-35); and a gain stage coupled to an output of the current-mode notch filter (read as complex sum of the C-S and C-G IQ outputs is formed by noise cancellation DSP 658 and the gain of the two paths are adjusted by adjusting weights that are input to DSP 658 to minimize this sum thereby achieving noise cancellation) (Haque – column 7 lines 40-52), wherein supply currents consumed by the current-mode notch filter and the gain stage are combined and re-used to bias and supply the LNTA stage (read as common-mode (CM) feedback amplifiers 1006 and 1008 and bias generators 1010 and 1012; cascaded inverter is used as the core circuit block in each LNTA circuit 1002 and 1004 and the bias current of each core may be set externally using the cs_bias and cg_bias inputs to bias generators 1010 and 1020) (Haque - column 7 lines 29-39). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to incorporate the teachings of Haque into the teachings of van Sinderen for the purpose of providing a common-source (C-S) low noise transconductance amplifier (LNTA), a common-gate (C-G) LNTA, a common-mode feedback amplifiers, and bias generators that can be used in the receiver. Regarding claim 2 as applied to claim 1, van Sinderen as modified by Haque further teaches wherein the down-conversion mixer stage is a passive mixer (read as down converter using a low noise amplifier the output of which is provided to a passive mixer; the LNTA output drives a passive mixer requiring high linearity and low noise) (van Sinderen - Figure 1, [0006], [0075], [0078]). Regarding claim 3 as applied to claim 1, van Sinderen as modified by Haque further teaches wherein the current-mode notch filter is a filter (read as a low pass filter having an input coupled to the output of the passive mixer) (Haque – Abstract, column 2 lines 1-21). Regarding claim 4 as applied to claim 3, van Sinderen as modified by Haque further teaches wherein the current-mode notch filter is implemented using an operational transconductance amplifier (OTA) combined with an RC circuit to create a low-impedance node at an output of the down-conversion mixer stage for frequencies outside a band of operation (read as passive mixers 1102 and 1104 use transmission gates and TIAs 1106 and 1108 with two-stage Miller-compensated operational transconductance amplifiers (OTAs) 1110) (Haque – column 7 lines 59-67). Regarding claim 5 as applied to claim 3, van Sinderen as modified by Haque further teaches wherein the current-mode notch filter is implemented using a current-reuse current-mode notch filter topology (read as a low pass filter having an input coupled to the output of the passive mixer) (Haque – Abstract, column 2 lines 1-21). Regarding claim 6 as applied to claim 5, van Sinderen as modified by Haque further teaches wherein half of the current consumed by the gain stage is redirected to power the current-reuse current-mode notch filter (read as bandwidth of the FIR lowpass filters 1206 in the DBB slices can be set to fFIR=B/2; response at DC can be extracted without using a DBB slice by lowpass filtering I and Q with fFIR=B/2; the two digital baseband circuits 652 and 654 use 4r NCOs and 4(2r+1) FIR filters) (Haque – Figure 12, column 5 lines 1-19). Regarding claim 7 as applied to claim 6, van Sinderen as modified by Haque further teaches wherein a noise figure (NF) performance of the receiver circuit is primarily influenced by the LNTA, and various LNTA topologies can be employed (read as compared to gain reduction effected with a passive input attenuator, the gain reduction effected through negative feedback delivers a more favourable Noise Figure) (van Sinderen - [0054], and [0076]). Regarding claim 8 as applied to claim 7, van Sinderen as modified by Haque further teaches wherein a capacitive cross-coupled common-gate (CCC-CG) LNTA topology is utilized to provide wideband RF input matching (read as may be needed for correct input matching when gain reduction is applied; each inverter stage is implemented by a PMOS and NMOS transistor with common gate drive signals) (van Sinderen - Figure 7, and [0063]). Regarding claim 9 as applied to claim 1, van Sinderen as modified by Haque further teaches wherein a supply voltage of the receiver circuit can be any value (read as supply voltage vdd2) (van Sinderen - [0064]-[0065]). Regarding claim 10 as applied to claim 9, van Sinderen as modified by Haque further teaches wherein the supply voltage is exemplarily 1.2V (read as supply voltage vdd2) (van Sinderen - [0064]-[0065]). Regarding claim 11, van Sinderen teaches a method for mitigating out-of-band blockers in a receiver circuit (read as FM receiver) (van Sinderen - [0073], [0078]), comprising: providing a low noise transconductance amplifier (LNTA) stage (read as Low Noise Transconductance Amplifier with current amplification; LNTA amplifies the RF signal in the current domain and directly delivers a signal current into the mixer) (van Sinderen - Figure 2, Figure 3, Figure 4, and [0009]-[0010]); down-converting an input signal in a passive mixer stage (read as down converter using a low noise amplifier the output of which is provided to a passive mixer; the LNTA output drives a passive mixer requiring high linearity and low noise) (van Sinderen - Figure 1, [0006], [0075], and [0078]). However, van Sinderen fails to teach filtering the down-converted signal in a current-mode notch filter post-mixer coupled to an output of the passive mixer stage, wherein the current-mode notch filter attenuates out-of-band blocker signals while permitting in-band signals to pass; amplifying the filtered signal in a gain stage coupled to an output of the current-mode notch filter; and re-using a combined supply current of the current-mode notch filter and the gain stage to bias and supply the LNTA stage. In the related art, Haque teaches filtering the down-converted signal in a current-mode notch filter post-mixer coupled to an output of the passive mixer stage, wherein the current-mode notch filter attenuates out-of-band blocker signals while permitting in-band signals to pass (read as low pass filter has an input coupled to an output of the passive mixer; RF output current iinta of LNTA 602 is down-converted by passive mixer 604 formed using two switches that are driving by two non-over-lapping clocks from a local oscillator modulator 608) (Haque – Abstract, column 2 lines 1-21, column 4 lines 21-35); amplifying the filtered signal in a gain stage coupled to an output of the current-mode notch filter (read as passive mixers 1102 and 1104 use transmission gates and TIAs 1106 and 1108 with two-stage Miller-compensated operational transconductance amplifiers (OTAs) 1110) (Haque – column 7 lines 59-67); and re-using a combined supply current of the current-mode notch filter and the gain stage to bias and supply the LNTA stage (read as common-mode (CM) feedback amplifiers 1006 and 1008 and bias generators 1010 and 1012; cascaded inverter is used as the core circuit block in each LNTA circuit 1002 and 1004 and the bias current of each core may be set externally using the cs_bias and cg_bias inputs to bias generators 1010 and 1020) (Haque - column 7 lines 29-39) (Haque). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to incorporate the teachings of Haque into the teachings of van Sinderen for the purpose of providing a common-source (C-S) low noise transconductance amplifier (LNTA), a common-gate (C-G) LNTA, a common-mode feedback amplifiers, and bias generators that can be used in the receiver. Regarding claim 12 as applied to claim 11, van Sinderen as modified by Haque further teaches wherein the current-mode notch filter is implemented using an operational transconductance amplifier (OTA) combined with an RC circuit (read as passive mixers 1102 and 1104 use transmission gates and TIAs 1106 and 1108 with two-stage Miller-compensated operational transconductance amplifiers (OTAs) 1110) (Haque – column 7 lines 59-67). Regarding claim 13 as applied to claim 11, van Sinderen as modified by Haque further teaches wherein the current-mode notch filter is implemented using a current-reuse current-mode notch filter topology (read as a low pass filter having an input coupled to the output of the passive mixer) (Haque – Abstract, column 2 lines 1-21). Regarding claim 14 as applied to claim 13, van Sinderen as modified by Haque further teaches wherein half of the current consumed by the gain stage is redirected to power the current-reuse current-mode notch filter (read as bandwidth of the FIR lowpass filters 1206 in the DBB slices can be set to fFIR=B/2; response at DC can be extracted without using a DBB slice by lowpass filtering I and Q with fFIR=B/2; the two digital baseband circuits 652 and 654 use 4r NCOs and 4(2r+1) FIR filters) (Haque – Figure 12, column 5 lines 1-19). Regarding claim 15 as applied to claim 11, van Sinderen as modified by Haque further teaches further comprising employing a capacitive cross-coupled common-gate (CCC-CG) LNTA topology for the LNTA stage to provide wideband RF input matching (read as may be needed for correct input matching when gain reduction is applied; each inverter stage is implemented by a PMOS and NMOS transistor with common gate drive signals) (van Sinderen - Figure 7, [0053], and [0063]). Regarding claim 16, van Sinderen teaches a receiver circuit for mitigating out- of-band blockers (read as FM receiver) (van Sinderen - [0073], [0078]), comprising: means for low noise amplification (read as Low Noise Transconductance Amplifier with current amplification; LNTA amplifies the RF signal in the current domain and directly delivers a signal current into the mixer) (van Sinderen - Figure 2, Figure 3, Figure 4, and [0009]-[0010]); means for down-converting an input signal (read as down converter using a low noise amplifier the output of which is provided to a passive mixer; the LNTA output drives a passive mixer requiring high linearity and low noise) (van Sinderen - Figure 1, [0006], [0075], and [0078]). However, van Sinderen fails to teach means for filtering the down-converted signal using a current-mode notch filter coupled to an output of the means for down-converting the input signal, wherein the current-mode notch filter attenuates out-of-band blocker signals while permitting in-band signals to pass; means for amplifying the filtered signal coupled to an output of the means for filtering the down-converted signal; and means for re-using a combined supply current of the means for filtering and the means for amplifying to bias and supply the low noise amplification means. In the related art, Haque teaches means for filtering the down-converted signal using a current-mode notch filter coupled to an output of the means for down-converting the input signal, wherein the current-mode notch filter attenuates out-of-band blocker signals while permitting in-band signals to pass (read as low pass filter has an input coupled to an output of the passive mixer; RF output current iinta of LNTA 602 is down-converted by passive mixer 604 formed using two switches that are driving by two non-over-lapping clocks from a local oscillator modulator 608) (Haque – Abstract, column 2 lines 1-21, column 4 lines 21-35); means for amplifying the filtered signal coupled to an output of the means for filtering the down-converted signal (read as passive mixers 1102 and 1104 use transmission gates and TIAs 1106 and 1108 with two-stage Miller-compensated operational transconductance amplifiers (OTAs) 1110) (Haque – column 7 lines 59-67); and means for re-using a combined supply current of the means for filtering and the means for amplifying to bias and supply the low noise amplification means (read as common-mode (CM) feedback amplifiers 1006 and 1008 and bias generators 1010 and 1012; cascaded inverter is used as the core circuit block in each LNTA circuit 1002 and 1004 and the bias current of each core may be set externally using the cs_bias and cg_bias inputs to bias generators 1010 and 1020) (Haque - column 7 lines 29-39) (Haque). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to incorporate the teachings of Haque into the teachings of van Sinderen for the purpose of providing a common-source (C-S) low noise transconductance amplifier (LNTA), a common-gate (C-G) LNTA, a common-mode feedback amplifiers, and bias generators that can be used in the receiver. Regarding claim 17 as applied to claim 16, van Sinderen as modified by Haque further teaches wherein the means for down-converting the input signal is a passive mixer (read as down converter using a low noise amplifier the output of which is provided to a passive mixer; the LNTA output drives a passive mixer requiring high linearity and low noise) (van Sinderen - Figure 1, [0006], [0075], [0078]). Regarding claim 18 as applied to claim 16, van Sinderen as modified by Haque further teaches wherein the means for filtering the down-converted signal is a current-reuse current-mode notch filter (read as a low pass filter having an input coupled to the output of the passive mixer) (Haque – Abstract, column 2 lines 1-21). Regarding claim 19 as applied to claim 18, van Sinderen as modified by Haque further teaches wherein the current-reuse current-mode notch filter is powered by redirecting half of the current consumed by the means for amplifying (read as bandwidth of the FIR lowpass filters 1206 in the DBB slices can be set to fFIR=B/2; response at DC can be extracted without using a DBB slice by lowpass filtering I and Q with fFIR=B/2; the two digital baseband circuits 652 and 654 use 4r NCOs and 4(2r+1) FIR filters) (Haque – Figure 12, column 5 lines 1-19). Regarding claim 20 as applied to claim 16, van Sinderen as modified by Haque further teaches wherein the means for low noise amplification is implemented using a capacitive cross-coupled common-gate (CCC-CG) LNTA topology (read as each inverter stage is implemented by a PMOS and NMOS transistor with common gate drive signals) (van Sinderen - Figure 7, and [0063]). Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to APRIL GUZMAN GONZALES whose telephone number is (571)270-1101. The examiner can normally be reached Monday - Friday 8:00 am to 4:00 pm EST. The examiner’s email address is april.guzman@uspto.gov. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Wesley L. Kim can be reached at (571) 272-7867. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /APRIL G GONZALES/Primary Examiner, Art Unit 2648
Read full office action

Prosecution Timeline

Feb 29, 2024
Application Filed
Feb 11, 2026
Non-Final Rejection mailed — §103
May 08, 2026
Response Filed
Aug 24, 2026
Final Rejection mailed — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
85%
Grant Probability
91%
With Interview (+6.3%)
2y 7m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 855 resolved cases by this examiner. Grant probability derived from career allowance rate.

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