DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's arguments filed 6/29/26 have been fully considered but they are moot due to the fact that all independent claims have been significantly amended, to which new ground rejections are made as shown below.
Examiner feels that the claim language is too broad to match the inventive concept specified by the specification. It is suggested to add more limitations to the claim language to make it more accurately match the inventive concept.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-8, 10-14 and 16-20 are rejected under 35 U.S.C. 103 as being unpatentable over Mizutani (US 20130258842 A1) in view of Sarusi (US 10680977 B1).
For claim 1, Sarusi discloses an electronic device (FIGs. 1-10 and the associated text, such as “[0082] FIG. 10 is a block configuration diagram illustrating a configuration example of the user side edge equipment AE of the relay network 10 which accommodates access lines”) comprising:
an interconnection controller (FIG. 10: controller 1000) including:
a physical layer circuit for signal transmission (FIGs. 1-10 and the associated text, such as “[0117] … the lines 911, 912, 921, 922, 931 and 932 may indicate physical layer links and may indicate logical connection passing through a plurality of relay equipments. …”);
a signaling interface (FIGs. 1-11 and the associated text, such as suggested by “[0083] FIG. 11 is an explanatory diagram illustrating a configuration example of the transfer table 1110 of a reception signal held by a path control unit 1100 of AE 112 of FIG. 10.”);
a link controller coupled to the physical layer circuit through the signaling interface (FIGs. 1-11 and the associated text, such as suggested by “[0083] FIG. 11 is an explanatory diagram illustrating a configuration example of the transfer table 1110 of a reception signal held by a path control unit 1100 of AE 112 of FIG. 10.”, and “[0010] … a signal is transferred from the active system BHE to the standby system path in which another BHE is a top so as to build a sub-tree (hierarchical tree) bypassing the failure point and to secure the communication path. …”) and
a bypass path coupled to the link controller for control frame transmission (FIGs. 1-10 and the associated text, such as “[0072] … only the bypass between BHEs is a standby system path which is not used for a normal operation, and thus it is not necessary to make all the trees redundant unlike in the related art, and it is possible to efficiently distribute resources. …”),
wherein the link controller is configured to transmit data to the physical layer circuit through the signaling interface (FIGs. 1-10 and the associated text, such as “[0117] … the lines 911, 912, 921, 922, 931 and 932 may indicate physical layer links and may indicate logical connection passing through a plurality of relay equipments. …” and “[0224] … the present embodiment is to use the standby path 970 for transfer of a data signal as well as a control signal.”) and to transmit a control frame to the physical layer circuit (“[0257] … the frame generation unit 6470 forms a control frame 20002 directed to the BHE 171 (F909) in response thereto. The transfer request frame 20002 formed here is promptly transferred to the frame queue 6430, and is delivered via any one of the LIFs 6110 to 6130 (F910).”).
Mizutani does not specifically state but Sarusi, in the same field of endeavor of data communication, discloses: a control frame is transmitted through a signal path to bypass data path, while transmitting data through the at least one circuit stage of the link controller (FIGs. 1-5 and the associated text, such as FIGs. 1-2 shows multi-stage paths, FIG. 3-5 shows data path X and control path Z with the data path X comprising at least Stage 0, Stage 1, Stage 5; and c2/l62-c3/l9 “… One path may be referred to as a control path, which may include multiple stages and may transport and perform the desired processing on a minimum amount of received data. Another path may be referred to as a data path, which may transport most or all of the received data outside of the control path and may provide requested data to the stages on the control path on demand. … As a result, the stages on the control path may be significantly simplified and may be tailored to perform the desired data processing at a higher speed and with a lower latency.”). OOSA would have been motivated to apply the teaching of Sarusi above to the bypass path disclosed by Mizutani to yield a predictable result of reducing latency.
Therefore, it would have been obvious to OOSA before the effective filing date of the application to combine Mizutani and Sarusi for the benefit of reducing latency (c2/l62-c3/l9 of Sarusi).
For claim 16, Mizutani discloses a method for facilitating control frame transmission for use in an electronic device (FIGs. 1-10 and the associated text, such as “[0082] FIG. 10 is a block configuration diagram illustrating a configuration example of the user side edge equipment AE of the relay network 10 which accommodates access lines”), the method comprising:
transmitting data from a link controller of the electronic device to a physical layer circuit of the electronic device through a signaling interface (FIGs. 1-11 and the associated text, such as “[0117] … the lines 911, 912, 921, 922, 931 and 932 may indicate physical layer links and may indicate logical connection passing through a plurality of relay equipments. …” and “[0224] … the present embodiment is to use the standby path 970 for transfer of a data signal as well as a control signal.”); and
transmitting a control frame from the link controller to the physical layer circuit through a signal path (“[0257] … the frame generation unit 6470 forms a control frame 20002 directed to the BHE 171 (F909) in response thereto. The transfer request frame 20002 formed here is promptly transferred to the frame queue 6430, and is delivered via any one of the LIFs 6110 to 6130 (F910).”).
Mizutani does not specifically state but Sarusi, in the same field of endeavor of data communication, discloses: a control frame is transmitted through a signal path to bypass data path, while transmitting data through the at least one circuit stage of the link controller (FIGs. 1-5 and the associated text, such as FIGs. 1-2 shows multi-stage paths, FIG. 3-5 shows data path X and control path Z with the data path X comprising at least Stage 0, Stage 1, Stage 5; and c2/l62-c3/l9 “… One path may be referred to as a control path, which may include multiple stages and may transport and perform the desired processing on a minimum amount of received data. Another path may be referred to as a data path, which may transport most or all of the received data outside of the control path and may provide requested data to the stages on the control path on demand. … As a result, the stages on the control path may be significantly simplified and may be tailored to perform the desired data processing at a higher speed and with a lower latency.”). OOSA would have been motivated to apply the teaching of Sarusi above to the bypass path disclosed by Mizutani to yield a predictable result of reducing latency.
Therefore, it would have been obvious to OOSA before the effective filing date of the application to combine Mizutani and Sarusi for the benefit of reducing latency (c2/l62-c3/l9 of Sarusi).
As to claim 2, Mizutani in view of Sarusi discloses claim 1, Mizutani further discloses: wherein the bypass path serves as the signal path and is connected between a circuit stage of the link controller and the physical layer circuit (FIGs. 1-11 and the associated text, such as “[0117] … the lines 911, 912, 921, 922, 931 and 932 may indicate physical layer links and may indicate logical connection passing through a plurality of relay equipments. …” in view of the parent claim that discloses the bypass path served as the signal path).
As to claim 3, Mizutani in view of Sarusi discloses claim 2, Mizutani further discloses: wherein the link controller is configured to transmit the control frame directly from a pipelined circuit of the link controller to the physical layer circuit through the bypass path to bypass at least one circuit stage between the pipelined circuit of the link controller and the physical layer circuit (FIGs. 1-11 and the associated text, such as FIG. 10 shows the link controller with pipelined circuits, and “[0117] … the lines 911, 912, 921, 922, 931 and 932 may indicate physical layer links and may indicate logical connection passing through a plurality of relay equipments. …” in view of the parent claims that discloses the control frame).
As to claim 4, Mizutani in view of Sarusi discloses claim 2, Mizutani further discloses: wherein the link controller is configured to transmit the control frame directly from a data link layer of the link controller to the physical layer circuit through the bypass path (FIGs. 1-11 and the associated text, such as “[0117] … the lines 911, 912, 921, 922, 931 and 932 may indicate physical layer links and may indicate logical connection passing through a plurality of relay equipments. …” in view of the parent claims; and it is well known in the art that each link in FIG. 10 has 7 layers, including data link layer, and Examiner takes an official notice on this statement. For example, it is disclosed by Park (US 20170199673 A1) in FIG. 6 in view of [0073] “… physical layer 530, physical adapter layer 524, and data link layer 523 may independently exist according to the multi-connection ports. …”).
As to claims 5 and 17, Mizutani in view of Sarusi discloses claims 2 and 16, Mizutani further discloses: wherein the link controller is configured to transmit the control frame directly to the physical layer circuit through the bypass path to bypass a physical adapter layer of the link controller (FIGs. 1-11 and the associated text, such as “[0117] … the lines 911, 912, 921, 922, 931 and 932 may indicate physical layer links and may indicate logical connection passing through a plurality of relay equipments. …” and “[0141] When the ACK signal 30000 is confirmed, the AE 112 changes a sending destination from the path 921 to the path 922 …” in view of the parent claims for transmitting the control frame directly to the physical layer circuit through the bypass path; note that ACK signal is a control frame).
As to claims 6 and 18, Mizutani in view of Sarusi discloses claims 2 and 16, Mizutani further discloses: wherein the link controller is configured to transmit the control frame to the physical layer circuit directly through the bypass path, and the physical layer circuit is configured to, in response to the control frame, transmit a control information signal based on the control frame and pause signal transmission which is based on the data received through the signaling interface (FIGs. 1-11 and the associated text, such as “[0117] … the lines 911, 912, 921, 922, 931 and 932 may indicate physical layer links and may indicate logical connection passing through a plurality of relay equipments. …” and “[0141] When the ACK signal 30000 is confirmed, the AE 112 changes a sending destination from the path 921 to the path 922 …”; note that ACK signals are used to transmit or pause control signal).
As to claim 7, Mizutani in view of Sarusi discloses claim 6, Mizutani further discloses: wherein the physical layer circuit is configured to transmit the control information signal based on the control frame and pause the signal transmission which is based on the data received through the signaling interface in response a control signal associated with the control frame received through the bypass path (FIGs. 1-11 and the associated text, such as “[0117] … the lines 911, 912, 921, 922, 931 and 932 may indicate physical layer links and may indicate logical connection passing through a plurality of relay equipments. …” and “[0141] When the ACK signal 30000 is confirmed, the AE 112 changes a sending destination from the path 921 to the path 922 …”; note that ACK signals are used to transmit or pause control signal).
As to claims 8 and 19, Mizutani in view of Sarusi discloses claims 6 and 18, Mizutani further discloses: wherein the physical layer circuit is configured to proceed with the signal transmission which is based on the data received through the signaling interface after transmitting the control information signal based on the control frame (FIGs. 1-11 and the associated text, such as “[0117] … the lines 911, 912, 921, 922, 931 and 932 may indicate physical layer links and may indicate logical connection passing through a plurality of relay equipments. …” and “[0141] When the ACK signal 30000 is confirmed, the AE 112 changes a sending destination from the path 921 to the path 922 …”; note that an ACK signal is control frame carrying control information signal).
As to claim 10, Mizutani in view of Sarusi discloses claim 1, Mizutani further discloses: wherein the bypass path is coupled between a circuit stage of the link controller and the signaling interface, and the signal path includes the bypass path and the signaling interface (FIGs. 1-11 and the associated text, such as FIG. 10 shows “path control unit 1100” and “path management unit 1300” and “[0010] … bypassing the failure point and to secure the communication path. …” in view of the parent claim).
As to claims 11 and 20, Mizutani in view of Sarusi discloses claims 10 and 16, Mizutani further discloses: wherein the link controller is configured to transmit the control frame from a pipelined circuit of the link controller to the physical layer circuit through the signal path including the bypass path and the signaling interface to bypass at least one circuit stage between the pipelined circuit of the link controller and the signaling interface (FIGs. 1-11 and the associated text, such as FIG. 10 shows the link controller with pipelined circuits in view of the parent claims that teach the signal path including the bypass path and the signaling interface to bypass at least one circuit stage).
As to claim 12, Mizutani in view of M Sarusi eki discloses claim 10, Mizutani further discloses: wherein the bypass path is connected between a data link layer of the link controller and an interfacing module of a physical adapter layer of the link controller, and the interfacing module is connected to the signaling interface (FIGs. 1-11 and the associated text, such as FIG. 10 shows the link controller links to other modules with each link having 7 layers, including L1/physical layer and L2/data link layer; physical adapter layer is a sublayer between L1 and L2; these are well known in the art and Examiner takes an official notice on this statement. For example, it is disclosed by Park (US 20170199673 A1) in FIG. 6 in view of [0073] “… physical layer 530, physical adapter layer 524, and data link layer 523 may independently exist according to the multi-connection ports. …”).
As to claim 13, Mizutani in view of Sarusi discloses claim 10, Mizutani further discloses: wherein the link controller is configured to transmit the control frame from the data link layer of the link controller to the physical layer circuit through the signal path including the bypass path and the signaling interface (FIGs. 1-11 and the associated text in view of the parent claims, such as FIG. 10 shows the link controller to the physical layer circuit through the signal path and links to other modules with each link having 7 layers, including data link layer, and Examiner takes an official notice on this statement. For example, it is disclosed by Park (US 20170199673 A1) in FIG. 6 in view of [0073] “…physical layer 530, physical adapter layer 524, and data link layer 523 may independently exist according to the multi-connection ports. …”).
As to claim 14, Mizutani in view of Sarusi discloses claim 10, Mizutani further discloses: wherein the link controller is configured to transmit the control frame to the physical layer circuit through the signal path including the bypass path and the signaling interface to bypass a physical adapter layer entity of a physical adapter layer of the link controller (FIGs. 1-11 and the associated text, such as FIG. 10 shows the link controller to the physical layer circuit through the signal path and links to other modules with each link having 7 layers, including physical adapter layer, and Examiner takes an official notice on this statement. For example, it is disclosed by Park (US 20170199673 A1) in FIG. 6 in view of [0073] “… physical layer 530, physical adapter layer 524, and data link layer 523 may independently exist according to the multi-connection ports. …”).
Claims 9 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Mizutani in view of Sarusi, further in view of Radulecscu (US 20130262892 A1).
As to claim 9, Mizutani in view of Sarusi discloses claim 6, and is silent but Radulecscu, in the same field of data communication, discloses: wherein the control information signal includes information based on the control frame and information based on a control symbol of continuation of preempted frame (COF) (“[0038] … reception of a COF symbol during a data frame of the same traffic class, when that data frame has not been pre-empted; reception of a COF symbol continuing a data frame of a different traffic class (TC); …”). OOSA would have been motivated to apply the teaching of Radulecscu above to the device by Mizutani in view of Sarusi to yield a predicable result of continuing a data frame.
Therefore, it would have been obvious to OOSA before the effective filing date of the application to combine Radulecscu with Mizutani in view of Sarusi for the benefit of continuing a data frame ([0038] of Radulecscu).
As to claim 15, Mizutani in view of Sarusi discloses claim 1, and is silent but Radulecscu, in the same field of data communication, discloses: wherein the control frame is an acknowledgment and flow control (AFC) frame (“[0037] The second UniPro safety net is used for the cases in which one or more of the AFC or NAC frames are lost. …”) or a negative acknowledgment control (NAC) frame based on a Unified protocol (UniPro) (“[0037] … In both cases, (i.e., the loss of either the "AFC" frame or the "NAC" frame), UniPro 1.10.00 requires the link to be resynchronized, after which an NAC frame with the RReq bit is sent to also require the incoming link to be resynchronized.”). OOSA would have been motivated to apply the teaching of Radulecscu above to the device by Mizutani in view of Sarusi ki to yield a predicable result of resynchronizing a link.
Therefore, it would have been obvious to OOSA before the effective filing date of the application to combine Radulecscu with Mizutani in view of Sarusi for the benefit of resynchronizing a link ([0037] of Radulecscu).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JIANYE WU whose telephone number is (571)270-1665. The examiner can normally be reached M-TH 8am-6pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Yemane Mesfin can be reached at (571) 272-3927. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JIANYE WU/Primary Examiner, Art Unit 2462
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