The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
The disclosure is objected to because of the following informalities: Page 1, in the heading immediately preceding paragraph [0003] and page 2, in the heading immediately preceding paragraph [0016], note that --OF THE INVENTION-- should be inserted after “SUMMARY” (i.e. page 1) and inserted after “DETAIL DESCRIPTION” (i.e. page 2), respectively for consistency with PTO guidelines. Page 2, in paragraph [0015], second line therein, note that the recitation of “and this description refer” should be rewritten as --and the detail description thereof refer-- for an appropriate characterization. At appropriate instances throughout the detail description, where the terminology “also refer to as” appears, the associated terminology should be placed in quotes for appropriate characterizations (e.g. in paragraphs [0019], [0036], [0060], (electrical traces, delay lines) and in paragraph [0020] (metal layers) should be each placed in quotes, etc.). Page 8, in paragraph [0044], 14th line therein, note that “CLK3” & “CLK3” should be rewritten as --ClkN-- & --ClkN--, respectively for consistency with the labeling in FIG. 1. Page 10, in paragraph [0048], third line therein and in paragraph [0049], last line therein and page 14, in paragraph [0067], last line therein, note that the recitation of “FIGS. 3-9B” should be respectively rewritten, at these instances to include the individual drawing numberings, including drawing numbering having alphanumeric designations for clarity and completeness of description. Page 10, in paragraph [0048], 10th line therein, note that --v-- should be inserted after “speed” for an appropriate characterization consistent with the parameters in Equations 1 & 2. Page 14, in paragraph [0068], second line therein and page 21, in paragraph [0094], second line therein, note that --, respectively-- should be inserted after “and 2”, respectively at these instances for an appropriate characterization. Page 15, in paragraph [0070], 9th line therein, note that --C-- should be inserted after “capacitance” for an appropriate characterization consistent with the parameter in Equation 3. Page 19, in paragraph [0089], 10th line therein, note that one of the recitations of “of FIG.” should be deleted as being redundant. Page 20, in paragraph [0092], 11th line therein, note that --propagate-- should be inserted after “currents” for an appropriate characterization. Page 22, in paragraph [0100], 5th line therein, note that the recitation of “of FIG. 8” should be rewritten as --as shown in FIG. 9B-- for an appropriate characterization consistent with the labeling in that drawing. Page 22, in paragraph [0100], 7th line therein and page 23, in paragraph [0102], note that labels (940, 950) are vague in meaning, especially since no such labels appear in any of the drawings and thus appropriate clarification is needed. Page 23, in paragraph [0103], first line therein, note that --Note that terms such as-- should be inserted at the start of the paragraph for an appropriate characterization. Page 25, in paragraph [0107], 6th line therein, note that the term “manufactures” should be rewritten as –manufacturers-- for an appropriate characterization. Page 26, in paragraph [0114], 4th line therein, note that the acronyms “ASIC” & “FPGA” should be respectively defined (i.e. in words) for clarity and completeness of description. Throughout the detail description of the drawings, especially with respect to the detail description of FIGS. 5A to 5C in paragraph [0077] and with respect to the detail description of FIGS. 7A to 7F in paragraphs [0088] & [0089], reference labels therein need to reference to appropriate ones of the drawings in which such labels appear for clarity and completeness of description. Throughout the specification, note that it is unclear whether the terminology “fin” would be an accurate characterization of this aspect of this aspect of the invention. While it is acknowledged that applicant can be their own lexicographer, the terminology used should be consistent with what is typically recognized in the art. In particular, the elements designated as “fins” appear to be more appropriately characterize as --fingers-- that protrude or extend from the delay line and thus appropriate clarification is needed. Appropriate correction is required.
The disclosure is objected to because of the following informalities: Note that the following reference labels appearing in the indicated drawings need to be correspondingly described in the specification description of the indicated drawings for clarity and completeness of description: FIG. 1 (ADC0, ADC1, ADC2, ADCN, CLKN, CLKN, DELAY1_P, DELAY2_P, DELAYN_P, DELAY1_M, DELAY2_M, DELAYN_M, GUIDE0, GUIDE1); FIG. 9B (VP, VM). Appropriate correction is required.
The drawings are objected to because of the following: In FIGS. 9 and/or 9B, note that reference labels --940-- & --950-- need to be provided such as to be commensurate with the specification description of FIGS. 9A & 9B in paragraph [0100].
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the second insulating layer associated with the third & fourth metal layers (i.e. claim 6) must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 4, 5, 7; 12; 15-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention.
In claims 4, 7, 19, lines 2-5 in each claim, for the “via” respectively recited in these claims, note that it is unclear whether the via connecting the first delay line to the third delay line (or connecting the second and fourth delay lines) would be an accurate characterization of this aspect of the invention, especially since the first and third (or the second and fourth) delay lines do not appear to be establish with respect to corresponding surface and thus it is unclear how such a via that passes through the insulating layer would necessarily connect with the corresponding delay lines. Appropriate clarification is needed.
In claims 5, 12, 20, note that it is unclear whether the terminology “fin” would be an accurate characterization of this aspect of this aspect of the invention. While it is acknowledged that applicant can be their own lexicographer, the terminology used should be consistent with what is typically recognized in the art. In particular, the elements designated as “fins” appear to be more appropriately characterize as --fingers-- that protrude or extend from the delay line. Appropriate clarification is needed.
In claim 15, last two lines therein, note that it is unclear whether the “second ADC” being connected to the “first ADC” through the first and second electrical traces would be an accurate characterization of this aspect of the invention. Appropriate clarification is needed.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1; 8 are rejected under 35 U.S.C. 102(a)(1) as being clearly anticipated by Pchelnikov et al.
Pchelnikov et al (i.e. Fig. 3) discloses an integrated circuit (i.e. an electromagnetic delay line), comprising: an insulating layer or a third layer (i.e. dielectric base 3); a first metal layer or waveguide (i.e. impedance conductor 1) functioning as a delay line is disposed on an upper surface of the insulating/third layer (3) to include a surface area; a second metal layer or waveguide (i.e. impedance conductor 2) functioning as a delay line is disposed on a lower surface of the insulating/third layer (3) to include a surface area, where the second metal layer/waveguide (2) overlaps with the first metal layer/waveguide (1) with the insulating/third layer in between, as readily evident in the cross-sectional view of Fig. 2.
Claims 1-3, 6; 8-10 are rejected under 35 U.S.C. 102(a)(1) as being clearly anticipated by Brooks et al.
Brooks et al (i.e. FIG. 4) discloses an integrated circuit (i.e. coiled delay line device 40), comprising: an insulating layer or a third layer (i.e. flexible substrate 41); a first metal layer or waveguide (i.e. a first coiled delay line segment (42) in the upper left hand portion in FIG. 4) is disposed on a surface portion of the insulating/third layer (41) to include a surface area; a second metal layer or waveguide (i.e. a second coiled delay line segment (42) in the lower left hand portion in Fig. 4) is disposed on a surface of the insulating/third layer (41) to include a surface area, where the second metal layer/waveguide (42) overlaps with the first metal layer/waveguide (42), when the insulating/third layer (41) is folded along a fold line (i.e. 43) such that the first metal layer/waveguide (42) and the second metal layer/waveguide (42) are on opposite sides of the folded insulating/third layer (41). Regarding claims 2, 9, as evident from FIG. 4, a third metal layer or waveguide (i.e. a third coiled delay line segment (42) in the upper right-hand portion in FIG. 4) is disposed on a surface portion of the insulating/third layer (41) to include a surface area and a second metal layer or waveguide (i.e. a fourth coiled delay line segment (42) in the lower right hand portion in Fig. 4) is disposed on a surface of the insulating/third layer (41) to include a surface area, where the fourth metal layer/waveguide (42) overlaps with the third metal layer/waveguide (42), when the insulating/third layer (41) is folded along a fold line (i.e. 43) such that the first metal layer/waveguide (42) and the second metal layer/waveguide (42) are on opposite sides of the folded insulating/third layer (41). Regarding claims 3, 10, as evident from FIG. 4, each coil delay line includes terminals or end points that are configured such that the first and third metal layers/waveguides (42) are connected to each other, while the second and fourth metal layers/waveguides (42) are connected to each other. Regarding claim 6, note that by virtue of the folded nature of the flexible insulating/third layer (41), a first insulating layer (i.e. one of the folded layers of flexible substrate (41) can be associated with the first/second metal layers/waveguides (42), while the other of the folded layers of flexible substrate (41) can be associated with the third/fourth metal layers/waveguides (42).
Claims 11, 13, 14 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Bauman et al discloses a serpentine delay line having conductive layers on opposite sides of a dielectric layer.
Any inquiry concerning this communication should be directed to ANDREA LINDGREN BALTZELL at telephone number (571)272-5918.
/BENNY T LEE/PRIMARY EXAMINER
ART UNIT 2843
B. Lee