DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 10 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 10 recites “the first two-degree chain,” including “the first second qubit in the first two-degree chain” and “the last second qubit in the first two-degree chain.” However, claim 10 depends from claim 9, which recites only a “second two-degree chain” and does not introduce a corresponding “first two-degree chain.” Consequently, the metes and bounds of claim 10 are unclear because it is uncertain which qubits form the recited first two-degree chain.
Allowable Subject Matter
The following is an examiner’s statement of reasons for allowance:
Regarding Independent claims 1, 13 and 20 the closest prior art of record includes Heimonen et al. (WO 2023/041833 A1) and Saravanan et al. (US 12,701,063 B2).
Heimonen generally discloses a quantum-computer architecture in which a plurality of qubits are coupled to a common resonator through respective tunable couplers. Heimonen further discloses transferring quantum states between qubits and the resonator, including iSWAP or Rabi-swap operations, and using the resonator to perform quantum-gate operations with selected qubits. Heimonen, however, does not teach or reasonably suggest configuring the qubits as first and second subsets in which a common first qubit is directly coupled to a plurality of qubits in each subset and in which every qubit within each respective subset is directly or indirectly coupled to every other qubit of that same subset through one or more other qubits of the subset, as required by independent claim 1.
Saravanan generally discloses a quantum phase-estimation algorithm employing first and second quantum registers. In particular, Saravanan discloses initializing register qubits, applying Hadamard gates, performing register-controlled unitary operations on a second register containing an eigenstate, applying an inverse quantum Fourier transform, and measuring the register to determine an eigenvalue. Saravanan, however, does not disclose the particular physical qubit-coupling topology recited in claim 1. Saravanan does not disclose a common first qubit directly coupled to plural qubits in each of two internally connected subsets of second qubits.
Although Heimonen teaches resonator-mediated connectivity and Saravanan teaches the general operations of quantum phase estimation, the prior art does not teach or reasonably suggest the claimed combination in which the physical connectivity of the quantum processing unit is specifically organized into first and second internally connected subsets sharing a common first qubit. In particular, the prior art does not associate this topology with the respective register and memory functions of a quantum phase-estimation process.
Accordingly, the particular quantum-processing-unit topology recited in independent claim 1, considered as a whole, is not taught or suggested by the prior art of record.
With respect to independent claim 13, Saravanan teaches the conventional QPE operations of applying Hadamard gates to register quantum states, performing controlled-unitary operations on memory quantum states initialized in an eigenstate, and performing an inverse quantum Fourier transform on the register quantum states. Saravanan, however, performs the controlled operations using the respective register qubits as controls and does not disclose repeatedly swapping different register quantum states through a common first qubit before performing the corresponding controlled operations on a separately defined subset of memory qubits.
Heimonen teaches transferring or swapping quantum states through a resonator and performing quantum-gate operations using the resonator. Heimonen’s disclosed swapping procedure, however, is directed principally to implementing quantum Fourier transform and other resonator-mediated operations. Heimonen does not disclose:
storing register quantum states in a first subset of second qubits and in the first qubit;
storing memory quantum states in a second subset of second qubits;
repeatedly swapping different register quantum states into the first qubit; and
after each such swap, performing a respective controlled operation between the first qubit and the second subset, where each controlled operation depends upon a different one of the register quantum states.
The claimed method therefore does more than merely execute conventional QPE on known quantum hardware. It coordinates a particular QPE register/memory allocation with a particular hub-based topology and a repeated control-state-swapping sequence. The prior art does not teach or reasonably suggest using Heimonen’s state-transfer mechanism in Saravanan’s QPE process in the specific claimed manner.
Accordingly, the particular combination of physical qubit topology, allocation of register and memory quantum states, and repeated swapping of different register states through the first qubit before respective controlled-unitary operations, as recited in independent claim 13, is not taught or suggested by the prior art of record.
Independent claim 20 recites a computer system containing the quantum processing unit and configured to perform substantially the QPE operations recited in claim 13. For substantially the same reasons discussed above, neither Heimonen nor Saravanan, alone or in combination, teaches or reasonably suggests a computer system configured to:
store register quantum states across the first subset and the common first qubit;
store memory quantum states in the second subset;
repeatedly swap different register quantum states through the common first qubit;
perform respective controlled-unitary operations between the first qubit and the second subset based on the successively swapped register states; and
thereafter perform an inverse quantum Fourier transform on the register quantum states.
Accordingly, the particular hardware and operational combination recited in independent claim 20 is not taught or suggested by the prior art of record.
Claims 2–9, 11-12 and 14–19 are allowable by virtue of their dependency from an allowable independent claim and further limit the claimed quantum-processing topology or QPE implementation. Certain dependent claims additionally recite specific chain topologies, cross-subset couplings, resonator implementations, standing-wave coupling positions, register/memory allocation, measurement operations, and use in an HHL algorithm, none of which remedies the deficiencies of the prior art regarding the limitations of the respective independent claims.
Therefore, claims 1–9 and 11-20 are considered allowable over Heimonen and Saravanan and the other prior art of record.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MASUD K KHAN whose telephone number is (571)270-0606. The examiner can normally be reached Monday-Friday (8am-5pm).
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Hosain Alam can be reached at (571) 272-3978. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/MASUD K KHAN/Primary Examiner, Art Unit 2132
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