CTNF 18/593,594 CTNF 91895 DETAILED ACTION 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-23-aia AIA The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. 07-21-aia AIA Claim 1-10 are rejected under 35 U.S.C. 103 as being unpatentable over Snelgrove et al. (US 2007/0249304 A1) , hereinafter "Snelgrove" in view of Savicki (US 5,264,752), hereinafter "Savicki" both prior arts are cited by the applicant . Regarding claim 1 , “ an amplifier circuit assembly”, Snelgrove teaches a radio frequency power amplifier system utilizing an active feedback control loop and a modulated supply network (see Fig. 13, §0114) comprising: “a power supply module configured to generate a supply voltage that changes based on a radio frequency signal;” PNG media_image1.png 244 535 media_image1.png Greyscale Fig. 13 of Snelgrove reproduced for ease of reference. Snelgrove discloses a controlled power supply (623, §0114-§0116) configured to generate and provide operating power that is dynamically controlled and modulated in accordance with amplitude variations of an input radio frequency signal (signal corresponding to an envelope of input signal 602 is provided by envelope detector 1341 and conditioned by signal conditioner 1343 is an input to the control circuitry 619 or controller, §0114); “a cascade amplifier module configured to amplify the radio frequency signal when powered at least by the supply voltage, the cascade amplifier module including a first amplifier stage and a second amplifier stage configured to operate in respective operation modes;” Snelgrove discloses a multi-stage radio frequency gain path (including driver 609 is Fig. 13 and multiple gain stages 1171 in see Fig. 11, configured to receive and amplify an RF input signal). However, Snelgrove does not explicitly state that individual stages run in distinct "respective operation modes" simultaneously under a shared topology (§0047), Savicki details the exact structural implementation of an adjustable, switch-controlled capacitance network (switching branches in/out to alter capacitance parameters, col. 6, lines 6-45), but implements this within a generic capacitive load driving application rather than a dedicated dual-mode (APT/ET) cascaded RF power amplifier . It would be obvious to a person having ordinary skill in the art (PHOSITA) to configure Snelgrove's cascading stages to select modes based on localized power demands. “ The first amplifier stage having a first supply node floated from a ground by a first adjustable capacitance, the second amplifier stage having a second supply node floated from the ground by a second adjustable capacitance, the supply voltage being applied to the second supply node ” Snelgrove details routing the modulated tracking supply voltage to the second/final radio frequency stage, §0047. While Snelgrove utilizes standard bypass filters, §0046), Savicki explicitly teaches the structural limitation of floating an active node from ground using an adjustable capacitance network consisting of a fixed capacitor in parallel with an additional capacitor segment that can be actively cut in or out of the line using an integrated switch (col. 3, lines 20-60). It would be obvious to a PHOSITA to place Savicki's switchable capacitor branch at both the first and second stage supply nodes of Snelgrove to allow independent scaling of localized node capacitance and bandwidth. “ and a switch configured to connect or disconnect the first supply node and the second supply node depending on the respective operation modes of the first amplifier stage and the second amplifier stage ” Snelgrove details supply routing configurations, and Savicki teaches utilizing a dedicated switch architecture to isolate or link circuit segments depending on the targeted electrical state. It would be obvious to an artisan to include an inter-node isolation switch between the first and second supply nodes of Snelgrove's cascaded stages. When the stages operate in identical modes (e.g., both sharing the tracking rail), the switch is closed to route the tracking voltage; when they diverge, the switch is opened to decouple them so each stage can be supplied appropriately, yielding a highly predictable system performance improvement. Regarding Claim 2 , Snelgrove teaches a dynamic controlled power supply configured to modulate voltage in accordance with amplitude variations of the RF input signal. This dynamic modulation of the supply based on the signal envelope is the functional equivalent of envelope tracking and average power tracking. It would have been obvious to a person having ordinary skill in the art (PHOSITA) to classify and operate the cascaded stages of Snelgrove in ET or APT modes based on this teaching. Regarding Claim 3 , Snelgrove explicitly details routing the modulated tracking supply voltage to the second/final radio frequency stage. Because the supply voltage is dynamically controlled to track the amplitude requirements of this final output stage, the generation of the supply voltage inherently depends on the active operation mode of that second stage. Regarding Claim 4 , As established in the base rejection for Claim 1, Savicki teaches a dedicated switch architecture used to link circuit segments depending on the targeted electrical state. It would have been an obvious and predictable configuration to utilize this architecture as an inter-node isolation switch. When the cascaded stages of Snelgrove are operating in identical tracking modes, a PHOSITA would find it obvious to close this switch to route the shared tracking voltage to both the first and second supply nodes simultaneously. Regarding Claim 5 , Following the logic applied to Claim 4, when the operational modes of the cascaded stages diverge, it would be obvious to a PHOSITA to open the inter-node isolation switch taught by Savicki to decouple them. This allows each amplifier stage to be supplied appropriately without cross-node interference, yielding a predictable system-level improvement. Regarding Claim 6 , Once the inter-node switch opens to isolate the first supply node from the second node's tracking supply (as argued in Claim 5), the first stage requires independent power to continue amplifying. It is a well-known, predictable design choice in RF multi-stage amplifiers to utilize a constant supply voltage for earlier driver stages while utilizing dynamic tracking voltage for final stages. Thus, it would have been an obvious modification to add an additional fixed power supply for the isolated first node. Regarding Claim 7 , Savicki teaches floating an active node from ground using an adjustable, switch-controlled capacitance network. A PHOSITA understands that Envelope Tracking (ET) mode requires a high tracking bandwidth on the supply line to match the rapid amplitude variations of the RF envelope. Large bypass capacitances inherently filter and degrade this necessary high-frequency tracking signal. Therefore, it would have been an obvious, predictable modification to actuate Savicki's switchable network to reduce the total capacitance on the first supply node when engaging ET mode, thereby preserving the required tracking bandwidth. Regarding Claim 8 , Savicki explicitly teaches this exact structural limitation. Specifically, Savicki discloses an adjustable capacitance network consisting of a fixed (default) capacitor in parallel with an additional capacitor segment that can be actively cut in or out of the line using an integrated switch. Claim 9 is rejected under the same rationale as Claim 7. To maintain the necessary high-frequency tracking bandwidth at the second supply node during ET mode, it would be obvious to a PHOSITA to actuate the switchable capacitor network taught by Savicki to reduce the parallel bypass capacitance. Claim 10 is rejected under the exact same rationale as Claim 8. Savicki explicitly discloses the parallel combination of a fixed default capacitor, and an additionally switched capacitor branch routed to ground . 07-21-aia AIA Claim s 11-18 are rejected under 35 U.S.C. 103 as being unpatentable over Snelgrove et al. (US 2007/0249304 A1) , hereinafter "Snelgrove" in view of Savicki (US 5,264,752), hereinafter "Savicki" and further in view of Lehtola (US 2016/0241208 A1) , hereinafter "Lehtola" . Claim 11 is an independent apparatus claim directed to a "radio frequency module". It incorporates all the internal circuit assembly constraints of Claim 1, but structurally requires that the assembly be implemented upon a physical "packaging substrate configured to receive a plurality of components" . The combined teachings of Snelgrove and Savicki render the complete internal elements of the amplifier circuit assembly fully obvious, including the tracking power supply module, the first/second cascaded amplifier stages operating in respective operation modes, the first/second adjustable capacitances floating the respective supply nodes, and the inter-node isolation switch. the obviousness of the circuit architecture as discussed earlier in claim 1. The remaining structural difference is the literal placement of this circuit layout within a modular packaging substrate environment. Lehtola explicitly details this missing structural implementation step by teaching the consolidation of cascaded PAs and power tracking supply components onto a singular packaging substrate to create a front-end module (100, Fig. 5, §0115). Lehtola explicitly teaches a physical packaging substrate (Fig. 25, §0241) configured to receive and structurally anchor a plurality of constituent hardware components. Lehtola teaches the exact structural limitation of physically fabricating and implementing this type of power amplification and power tracking circuitry directly onto a single, cohesive packaging substrate (302, Fig. 25). A person of ordinary skill in the art designing a compact wireless transmission device would be strongly motivated to combine the circuit architecture rendered obvious by Snelgrove and Savicki with the packaging teachings of Lehtola. In the highly competitive field of mobile RF engineering, minimizing physical board space and reducing parasitic trace interconnect lengths between high-speed power modulators and power amplifier stages are paramount engineering objectives. Lehtola explicitly provides the solution to these spacing constraints by teaching that mounting cascaded power amplifiers and their associated power tracking routing networks onto a single shared packaging substrate successfully yields a highly dense, space-optimized frontend module. The PHOSITA would implement this combination with a high expectation of success, as migrating a known power amplifier circuit onto a standard packaging substrate represents a routine, predictable deployment of conventional manufacturing techniques to achieve miniaturization. Regarding Claim 12 Claims 11 and 12 are rejected under 35 U.S.C. 103 as being unpatentable over Snelgrove in view of Savicki and Lehtola. The base combination renders the physical packaging substrate environment obvious. Furthermore, Lehtola explicitly details this structural implementation step by teaching the consolidation of cascaded PAs and power tracking supply components onto a singular packaging substrate specifically to create a "front-end module". Therefore, the limitation is explicitly met by the addition of Lehtola. Regarding Claim 13, Snelgrove teaches a dynamic controlled power supply configured to modulate voltage in accordance with amplitude variations of the RF input signal. This dynamic, amplitude-based modulation is the functional equivalent of envelope tracking (ET) and average power tracking (APT). It would have been obvious to a person having ordinary skill in the art (PHOSITA) to classify and operate the cascaded stages of the Snelgrove/Savicki/Lehtola front-end module in ET or APT modes. Regarding Claim 14, Snelgrove details routing the modulated tracking supply voltage to the second/final radio frequency stage. Because the generated supply voltage dynamically tracks the amplitude requirements of this final output stage, the generation of the supply voltage inherently depends on the active operation mode of that specific second stage within the packaged module. Regarding Claim 15 , Savicki teaches a dedicated switch architecture utilized to isolate or link circuit segments depending on the targeted electrical state. When the cascaded stages of the front-end module operate in identical tracking modes (e.g., both sharing the tracking rail), it would be an obvious and predictable configuration to close the inter-node isolation switch to route the shared tracking voltage to both the first and second supply nodes simultaneously. Regarding Claim 16, Following the logic applied to Claim 15, when the operational modes of the cascaded stages diverge, it would be obvious to a PHOSITA to open the inter-node isolation switch taught by Savicki to decouple them. This allows each amplifier stage on the packaging substrate to be supplied appropriately without cross-node interference. Regarding Claim 17, Once the inter-node switch opens to isolate the first supply node from the second node's dynamic tracking supply (as argued in Claim 16), the first stage requires independent power to continue amplifying. It is a well-known, conventional design choice in RF engineering to utilize a constant supply voltage for earlier driver stages while utilizing dynamic tracking voltage for final stages. Thus, it would have been an obvious modification to provision an additional fixed power supply for the isolated first node within the module. Regarding Claim 18, Savicki teaches floating an active node from ground using an adjustable, switch-controlled capacitance network. A PHOSITA understands that Envelope Tracking (ET) mode requires a high tracking bandwidth on the supply line to match the rapid amplitude variations of the RF envelope. Large bypass capacitances inherently filter and degrade this necessary high-frequency tracking signal. Therefore, it would have been an obvious, predictable modification to actuate Savicki's switchable network to reduce the total capacitance on the first supply node when engaging ET mode, thereby preserving the required tracking bandwidth for the module. PNG media_image2.png 475 586 media_image2.png Greyscale Fig. 13 of Sharma reproduced for ease of reference . 07-21-aia AIA Claim s 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Snelgrove et al. (US 2007/0249304 A1) , hereinafter "Snelgrove" in view of Savicki (US 5,264,752), hereinafter "Savicki" and further in view of Sharma et al. (US2018/0198424 A1), hereinafter "Sharma" . Claim 19 is directed to an entire "mobile device". It incorporates all the internal circuit assembly constraints of Claim 1, but explicitly adds the macro system-level constraints of: (1) a "transceiver configured to generate a radio frequency signal" , and (2) a "front end system including an amplifier circuit assembly" . The underlying amplifier circuit logic is rendered obvious by the core Snelgrove and Savicki combination. The remaining structural difference is the literal integration of this circuit configuration into a complete handheld transceiver/antenna system loop. Sharma explicitly discloses this exact environment, teaching a mobile wireless device, (1300, Fig. 13) where an active transceiver block (1320) generates the primary RF signal and routes it directly into an adjacent front-end module (1321) housing multi-stage tracking amplifier (1312, 1314). Sharma teaches a mobile front-end system (1321) configured to house a power amplification system that receives the transceiver's (1320) generated RF signal (§0090-§0094). A person of ordinary skill in the art designing a mobile communication terminal would be highly motivated to place the circuit architecture rendered obvious by Snelgrove and Savicki within the standard system-level mobile layout taught by Sharma. The circuit assembly of Snelgrove/Savicki does not operate in a vacuum; its explicit fundamental utility is to amplify wideband radio frequency signals while conserving battery power. A PHOSITA looking to implement this architecture would naturally seek out a standard, non-inventive system framework. Sharma provides this exact conventional system blueprint by demonstrating that an RF frontend processing block must be coupled to an upstream signal source (the transceiver) and a downstream radiation element (the antenna) to form a functional mobile device. Combining these references is a highly predictable application of known components to their intended end-use environment, creating a predictable system-level result with a guaranteed expectation of success. Regarding claim 20 , Snelgrove teaches a dynamic controlled power supply configured to provide power that is controlled in accordance with amplitude variations of the input signal. This dynamic, amplitude-based modulation of the supply voltage is the functional equivalent of envelope tracking (ET) and average power tracking (APT). It would have been obvious to a person having ordinary skill in the art (PHOSITA) to configure the cascaded amplifier stages within the mobile device of the base combination (Snelgrove/Savicki/Sharma) to operate specifically in ET or APT modes. Doing so is a predictable application of Snelgrove's core tracking teachings, implemented to maximize power efficiency and performance within the mobile device environment. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to HAFIZUR RAHMAN whose telephone number is (571)270-0659. The examiner can normally be reached M-F: 10-6. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jessica Han can be reached on (571) 272-2078 . The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /HAFIZUR RAHMAN/Primary Examiner, Art Unit 2843. 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