DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
35 USC 112(b). The rejections of claims 1, and 17-31 are withdrawn based on amendment to claims.
35 USC 101.
Applicant asserts, that under the Step 2A prong 1 analysis, the claimed invention does not recite a mathematical concept, but rather a technological computing technique that uses a processor to execute a specific, structured process flow: (i) initialize state variables near an initial stable fixed point (origin), (ii) repeat a loop of variable updates, (iii) perform an in-loop parameter update of p that induces bifurcation so that multiple stable fixed points exist after bifurcation, and (iv) output a post-bifurcation result derived from the evolved state (Remarks p. 16). Applicant further asserts this is not an abstract “equation”, but a concrete computational procedure that uses controlled parameter evolution to induce bifurcation and drive the system state toward stable solution states, which goes beyond abstract concepts as it recites specific “calculating device” including a “processor” that the repeats the processing procedure and outputs results (Remarks p. 16 bottom-17 top). Furthermore, the mathematical concepts are tools utilized within a larger, concrete process designed to address a technical problem in the field of computational optimization, as opposed to being claimed in isolation, wherein the core advance is mathematical formula itself but its specific application with a computer-implemented simulation process to overcome a known technical hurdle (Remarks, p. 11).
Examiner respectfully disagrees. The claim recites mathematical relationships and mathematical calculations for solving an optimization problem, solveable by iterating equations such as the Ising energy formula:
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implemented in steps, repeated as in figures 3-5, and as claimed. See, e.g. specification p. 1 Background, p. 7 lines 14-34, p. 9 lines 16 - p. 10 eqn (8), and figure 3. Figure 3-5 depicts variations of the steps claimed; x, and y of figure 3 are the first and second variables updated in S130, repeated in step S106; steps S110, S121, and S122 comprise the first, second functions. Furthermore see p. 7 line 30 – p 9 line 15, which describes bifurcation in terms of mathematical equations, mathematical calculations, and mathematical relationships. Specifically see eqns 2-5. Furthermore, bifurcation is defined by mathematical equations. See specification equations 2-4. For these reasons, the claims recite steps in a mathematical calculation using mathematical relationships. See also MPEP 2106.04(a)(2).I.A. “A mathematical relationship may be expressed in words or using mathematical symbols”. Furthermore, what is specifically recited in the claims is the mathematical concepts, not an implementation in technology. The technology claimed is merely generically recited processing in a computer, such that the claim recites “apply it” as to the mathematical concepts in a generic computer. Furthermore, any technical problem that is addressed in the field of computational optimization, is in itself a mathematical problem, not one in technology itself. A generic computer is merely “applied” to use arguably a better mathematical algorithm to solve a mathematical optimization problem. “It is important to keep in mind that an improvement in the abstract idea itself (e.g. a recited fundamental economic concept) is not an improvement in technology” (MPEP 2106.05(a)(II)).
Applicant further asserts, under the Step 2A prong 2 analysis, the claims integrate into a practical application because the claims recite additional elements that amount to a technological improvement in the operation of digital computing systems executing large-scale optimization computations (e.g., Ising/combinatorial optimization), including reduced computational burden and improved parallelizability and numerical stability, consistent with Desjardins. (Remarks p. 19). In support of the purported improvement, Applicant points to sections of the specification citing that the claimed invention addresses conventional simulated annealing issues that use a sequential update algorithm, in which multiple spins are updated one by one at a time, which is not suitable for parallel computation, and prior bifurcation models, which require large amounts of calculations(Remarks p. 19-20). Applicant further asserts that the claimed invention implements a specific bifurcation-based computing procedure as also discussed with respect to the Step 2A prong 1 analysis, that corresponds to a particular technical mechanism that transforms the state variables into discrete solution states, as a result the output is not an insignificant extra solution activity, nor is it a generic “apply it" step (Remarks p. 20-22).
Examiner respectfully disagrees. The purported improvement is in the math itself, not as a result of technology, additional elements in the claim as was present in Desjardins. The outputting steps is merely outputting the math result using a generic computer. What is particularly claimed is the mathematical steps; what is generic is the additional elements. What is new over conventional methods is the mathematical steps for solving an Ising equation, using bifurcation equations, as disclosed in the specification, and as claimed in words. Furthermore, math that may not be well understood, routine, or conventional remains an abstract idea and is not statutory.
Applicant further asserts under the Step 2B analysis that the claimed invention recites specific technical improvements that go beyond merely implementing an abstract idea on generic computer components, citing claim elements as set forth both in the Step 2A prong 1 and Step 2A prong 2 analysis (Remarks p. 22). Applicant further asserts, that as a result large-scale combinatorial optimization problems (Ising problems) efficiently using bifurcation-driven evolution and output a post-bifurcation solution can be solved (Remarks p. 23). Applicant further asserts this reflects an inventive concept that is not well-understood, routine, or conventional in the field as evidenced by the specification, wherein prior approaches were sequential-not suitable for parallel computation, or require computation intensive operations (Remarks p. 23). Applicant further asserts that the approach is not a conventional “apply it” on a generic computer but a specific computing technique designed to improve computational efficiency, numerical stability, and parallelizability (Remarks p. 24).
Examiner respectfully disagrees. As stated above, what is specific is in the math itself, what is generic is the computer. The stated improvement is merely an improvement in math, and that math that may not be well understood, routine, or conventional remains an abstract idea and is not statutory. The 'inventive concept cannot be furnished by the unpatentable law or nature (or natural phenomenon or abstract idea) itself. MPEP 2106.05.I.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1, and 17-27, and 30-31 are rejected under 35 U.S.C. § 101 because the claimed invention is directed to a judicial exception (i.e., a law of nature, a natural phenomenon, or an abstract idea) without significantly more.
Regarding claim 1, under the Alice framework Step 2A prong 1, the claim recites Mathematical concepts. The claim recites mathematical calculations and mathematical relationships for solving an optimization problem. Specifically, the claim recites the following:
repeat a procedure,
the procedure including:
a first variable update including updating the ith entry of the first variable x, by adding a first function to the ith entry of the first variable x, which is obtained before the first variable update (i being an integer not less than 1 and not more than N, and N being an integer of 2 or more), the ith entry of the first variable x, being one of a first variable set {x}, a variable of the first function including the ith entry of the second variable yi, the ith entry of the second variable y, being one of a second variable set {y},
a second variable update including updating the ith entry of the second variable y, by adding a second function and a third function to the ith entry of the second variable y, which is obtained before the second variable update, a variable of the second function being the ith entry of the first variable xi, variables of the third function including at least a part of a first parameter set {J} and at least a part of the first variable set {x}, and
a parameter update including updating an operation parameter after the first variable update and the second variable update, such that bifurcation is induced by changing p and multiple stable fixed points after the bifurcation; and
output at least one of the ith entry of the first variable x, obtained after the repeating of the procedure or a function of the ith entry of the first variable x, obtained after the repeating of the procedure,
the first variable x, being configured to leave an initial value through bifurcation induced by repeating the procedure.
See, e.g. specification p. 1 Background, p. 7 lines 14-34, p. 9 lines 16 - p. 10 eqn (8), and figure 3. Figure 3-5 depicts variations of the steps claimed; x, and y of figure 3 are the first and second variables updated in S130, repeated in step S106; steps S110, S121, and S122 comprise the first, second functions. Furthermore see p. 7 line 30 – p 9 line 15, which describes bifurcation in terms of mathematical equations, mathematical calculations, and mathematical relationships. Specifically see eqns 2-5. For these reasons, these are steps in a mathematical calculation using mathematical relationships.
Under the Alice framework Step 2A prong 2 analysis, additional elements not reciting Mathematical equations and mathematical calculations thereof include: a calculating device, comprising a processor configured to perform repeating a processing procedure, and a processor configured to output. This additional element does no more than generally link the additional element to the mathematical calculations in a manner that in effect merely recites “apply it” to the math, or recite mere instructions to apply the exception using generic computer components. Furthermore, the processor configured to output is merely an insignificant extra solution activity. For this reason the claim is not integrated into a practical application.
Moreover, under the Alice Framework Step 2B analysis, the claim, considered individually and as an ordered combination does not include additional elements that are sufficient to amount to significantly more than the abstract idea. As discussed in the Step 2A prong 2 analysis, the claim merely generally links the additional element to the math. Furthermore, the processor configured to output comprises well understood, routine and conventional activity. See e.g., D.A. Patterson et al., Computer Organization and Design: The Hardware/Software Interface, Elsevier Science and Technology, 5th edition, 2017, (hereinafter “Patterson”), ch 1 fig 1.5 depicting the classic computer components including outputting from a processor. What is new is in the mathematical relationships and calculations, i.e., in the specific bifurcation algorithm comprising steps to update variables to solve an optimization problem, not in a technological solution within the processor itself. The specification supports this assertion, stating “a general-purpose computer may be used as the calculating device”. See specification p. 5 lines 32-34. Furthermore as stated in the Step 2A prong 2 analysis, the claims recite mere instructions to apply the exception using generic computer components. Mere instructions to apply an exception using generic computer components cannot provide an inventive concept. For these reasons claim 1 elements considered individually and as an ordered combination does not amount to significantly more than the abstract idea.
Claims 17-27 are rejected for at least the reasons cited with respect to the claim 1 analysis. Under the Step 2A prong 1 analysis, claims 18-21 merely further mathematically limit the claim 17 mathematical elements recited.
Claims 17-22, and 24 contain no further additional elements that would require further consideration under Step 2A prong 2 or Step 2B.
Claim 23 further recites the following additional elements: acquiring, from a storage, and storing. Under the Step 2A prong 2 analysis, acquiring from a storage and storing comprise an insignificant extra solution activity. For this reason, the claim is not integrated into a practical application. Under the Step 2B analysis, acquiring from a storage, and storing comprises well understood, routine, and conventional activity. See MPEP 2106.05(d).II.iv. For these reasons, claim 23 considered individually and as an ordered combination does not amount to significantly more than the abstract idea.
Claim 25 further recites the following additional element: a storage. Under the step 2A prong 2 analysis, this limitation merely generically recites a computing component. For this reason, the claim is not integrated into a practical application. Under the step 2B analysis the storage is well understood, and conventional. See Patterson, fig 1.5, wherein one of the classic five components of a computer is the memory (storage). For this reason, claim 24 considered individually and as an ordered combination does not amount to significantly more than the abstract idea.
Claim 26 further recites the following additional elements: the processor includes a first calculator and a second calculator, at least a part of the performing of the part of the calculation of the third function in the first calculator and at least a part of the performing of the other part of the calculation of the third function in the second calculator are performed simultaneously. Under the step 2A prong 2 analysis the first and second calculator are merely generically recited computing components. Furthermore the performing of at least part of the calculation of the third function of the first calculator and at least part of the performing of the other part of the calculation of the third function in the second calculator comprises an insignificant extra solution activity. The claim merely generally recites parts of functions being performed simultaneously, which includes nominal parts of the functions such as input/output of element or organizing the function data. For these reasons claim 26 is not integrated into a practical application. Under the step 2B analysis, as stated above, the first and second calculator are merely generically recited. Furthermore the performing of at least part of the calculation of the third function of the first calculator and at least part of the performing of the other part of the calculation of the third function in the second calculator is well understood, routine and conventional activity. See J.L. Hennessy et al., Computer Architecture: A quantitative approach, Elsevier 2014 (hereinafter “Hennessy”), which discloses various plural processor architectures some of which have been in use since the earlies electronic computers, and that support multi-programmed processors running many tasks simultaneously, p. 528-532. For these reasons claim 26 considered individually and as an ordered combination, does not amount to significantly more that the abstract idea.
Claim 27 recites the following further additional elements: the device includes a storage, the storage includes a first storage region and a second storage region, and the first calculator stores the first-calculation-used part in the first storage region, and the second calculator stores the second-calculation used part in the second storage region. Under the step 2A prong 2 analysis, the claim merely generically recites first and second storage regions. Furthermore storing in first and second storage regions comprises an insignificant extra solution activity. For these reasons claim 27 is not integrated into a practical application. Under the step 2B analysis, as stated above the claim merely generically recites first and second storage regions. Furthermore storing in a storage region is well understood, routine, and conventional activity. See MPEP 2106.05(d).II.iv. See also D.A. Patterson and J.L. Hennessy, Computer Organization and Design, The Hardware/Software Interface, Elsevier, 3rd Edition, 2005, (hereinafter “Patterson and Hennessy), p. 468 -472 , fig 7.2 describing storage regions in blocks in description of basis memory structure. For these reasons, claim 27 considered individually and as an ordered combination does not amount to significantly more than the abstract idea.
Claim 30 is directed to a recording medium being computer-readable with a calculation program recorded thereon that would execute the calculation program recited in claim 29. All steps performed in claim 30 would be executed by the calculation program of 29. The analysis with respect to claim 29 applies equally to claim 30.
Claim 31 is directed to a method that would be practiced by the execution of the calculation program of claim 29. All steps performed in the method of claim 31 would be executed by the calculation program of claims 29. The analysis with respect to claim 29 applies equally to claim 31.
Allowable Subject Matter
For reasons set forth in the office action dated 01/13/26, claim 28 is allowed, and claims 1, 17-27, and 30-31 would be allowable if rewritten to overcome the rejections under 35 USC 101.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to EMILY E LAROCQUE whose telephone number is (469)295-9289. The examiner can normally be reached on 10:00am - 1200pm, 2:00pm - 8pm ET M-F.
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/EMILY E LAROCQUE/Primary Examiner, Art Unit 2182
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