Prosecution Insights
Last updated: May 29, 2026
Application No. 18/595,248

ELECTROCHEMICAL IMPEDANCE SPECTROSCOPY CURRENT MEASUREMENT SYSTEM

Final Rejection §103
Filed
Mar 04, 2024
Priority
Mar 06, 2023 — provisional 63/488,598 +1 more
Examiner
GONZALEZ, MILTON
Art Unit
2852
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Analog Devices, Inc.
OA Round
2 (Final)
78%
Grant Probability
Favorable
3-4
OA Rounds
2m
Est. Remaining
90%
With Interview

Examiner Intelligence

Grants 78% — above average
78%
Career Allowance Rate
500 granted / 642 resolved
+9.9% vs TC avg
Moderate +12% lift
Without
With
+12.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
12 currently pending
Career history
656
Total Applications
across all art units

Statute-Specific Performance

§101
0.8%
-39.2% vs TC avg
§103
73.5%
+33.5% vs TC avg
§102
9.6%
-30.4% vs TC avg
§112
8.7%
-31.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 642 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 136, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 2, 4, 7, 8, 11, 12, 14, 15, 18, and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Schramme et al. (US 2020/0116764) in view of Hammerschmidt et al. (DE 102017222967 A1). Regarding claim 1, Schramme et al. discloses a current measurement system (element 10, Fig. 1) for measuring a current through a cell arrangement (element 14, Fig. 1) including one or more electrochemical cells, the current measurement system comprising: a parallel arrangement of a plurality of sense resistors (elements 20, 36, Fig. 1), configured to be placed in series with the cell arrangement (see Fig. 1); and voltage measurement circuitry (elements 24, 48, Fig. 1), configured to measure respective voltages across corresponding ones of the sense resistors (see par. [0060]). Although Schramme et al. does not appear to disclose the current measurement system being calibrated, Hammerschmidt et al. shows that this feature is well known in the art. Hammerschmidt et al. discloses an impedance standard (element 10, Fig. 1) for calibrating an impedance spectroscopic device (element 11, Fig. 1) for electrochemical energy storage (see Abstract). Therefore, it would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to apply a known technique to a known device ready for improvement to yield predictable results, such as improved accuracy of impedance detection during post-calibration operation. Regarding claim 2, Schramme et al. discloses a current measurement system, comprising processor circuitry, coupled to the voltage measurement circuitry, configured to calculate direct current (DC) current through the cell arrangement (see Fig. 1). Regarding claim 4, Schramme et al. discloses a current measurement system, wherein the processor circuitry (i.e., non-shown evaluation circuit) (see par. [0038]) is configured to calculate the current through the cell arrangement by calculating respective currents through corresponding ones of the sense resistors (see par. [0060]) and summing the respective currents (see pars. [0030-0034]). Regarding claim 7, Schramme et al. discloses a current measurement system, wherein the voltage measurement circuitry comprises a plurality of voltage measurement devices, respectively coupled to corresponding individual ones of the sense resistors (see par. [0060]). Regarding claim 8, Schramme et al. discloses a current measurement system, wherein the cell arrangement includes at least one of a battery cell (see par. [0048]). Regarding claims 11 and 12, even assuming, arguendo without conceding, that Schramme et al. does not disclose the plurality of sense resistors in combination being capable of dissipating over 100 watts of power or the parallel arrangement of sense resistors being capable of handling a current that exceeds 300 amperes, since the applicant did not traverse the examiner’s assertion of official notice, the examiner is hereby indicating that the common knowledge or well-known in the art statement is taken to be admitted prior art because applicant failed to traverse the examiner’s assertion of official notice. Utilizing these values of power dissipation and current would have been simply a matter of design choice based on, for example, the specific parameters of the battery to be measured. Regarding claims 14 and 19, Schramme et al. discloses a method for measuring a current through a cell arrangement (element 14, Fig. 1) including one or more electrochemical cells, the method comprising: measuring respective voltages corresponding to respective ones of a plurality of sense resistors (elements 20, 36, Fig. 1), the sense resistors in a parallel arrangement, the parallel arrangement in series with the cell arrangement (see Fig. 1); calculating respective current values corresponding to respective ones of the plurality of sense resistors using the measured respective voltages and specified resistances of the respective ones of the plurality of sense resistors (see par. [0060]); and summing the calculated respective current values to determine the current through the cell arrangement (see pars. [0030-0034]). Although Schramme et al. does not appear to disclose the current measurement system being calibrated, Hammerschmidt et al. shows that this feature is well known in the art. Hammerschmidt et al. discloses an impedance standard (element 10, Fig. 1) for calibrating an impedance spectroscopic device (element 11, Fig. 1) for electrochemical energy storage (see Abstract), the method comprising using the determined current through the cell arrangement in an electrochemical impedance spectroscopy (EIS) system (see Abstract). Therefore, it would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to apply a known technique to a known device ready for improvement to yield predictable results, such as improved accuracy of impedance detection during post-calibration operation. Regarding claim 15, Schramme et al. discloses a method, wherein the measuring respective voltages includes measuring at least two voltages at least partially concurrently (see par. [0060]). Regarding claim 18, Schramme et al. discloses a method, comprising recurrently determining the current through the cell arrangement at a specified interval (see par. [0060]). Claims 3, 5, 9, 10, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Schramme et al. (US 2020/0116764) in view of Hammerschmidt et al. (DE 102017222967 A1) and Yoon et al. (US 6,160,382). Regarding claims 3, 5, 9, and 10, although Schramme et al. does not disclose a test current source, Yoon et al. shows that this feature is well known in the art. Yoon et al. discloses a test current source (see col. 10, lines 59-67) of an electrochemical impedance spectroscopy (EIS) system, configured to provide a test current to the cell arrangement and to the sense resistor (see col. 10, lines 59-67), wherein the processor circuitry is configured to measure an AC current through the cell arrangement across a range of frequencies (see col. 2, lines 43-56), wherein the cell arrangement includes at least one of a series arrangement or parallel arrangement of at least two electrochemical cells (see col. 3, line 66 through col. 4, line 2), wherein the cell arrangement includes a combination of series and parallel arrangements of at least four electrochemical cells (see col. 3, line 66 through col. 4, line 2). Therefore, it would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to apply a known technique to a known device ready for improvement to yield predictable results, such as, providing a method and apparatus for characterizing internal parameters of cell arrangement based on a wide frequency range of impedance measurements and a non-linear equivalent circuit model, which can be used for quality control of battery products and testing of batteries by analyzing or predicting the operational properties of cell arrangement as taught by Yoon et al. (see col. 2, lines 43-56). Regarding claim 20, Schramme et al. discloses a current measurement system (element 10, Fig. 1) for measuring a current through a cell arrangement (element 14, Fig. 1) including one or more electrochemical cells, the current measurement system comprising: a parallel arrangement of a plurality of sense resistors (elements 20, 36, Fig. 1), configured to be placed in series with the cell arrangement (see Fig. 1); and voltage measurement circuitry (elements 24, 48, Fig. 1), configured to measure respective voltages across corresponding ones of the sense resistors (see par. [0060]). Although Schramme et al. does not appear to disclose the current measurement system being calibrated, Hammerschmidt et al. shows that this feature is well known in the art. Hammerschmidt et al. discloses an impedance standard (element 10, Fig. 1) for calibrating an impedance spectroscopic device (element 11, Fig. 1) for electrochemical energy storage (see Abstract). Therefore, it would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to apply a known technique to a known device ready for improvement to yield predictable results, such as improved accuracy of impedance detection during post-calibration operation. Although Schramme et al. does not disclose a test current source, Yoon et al. shows that this feature is well known in the art. Yoon et al. discloses a test current source of an electrochemical impedance spectroscopy (EIS) system, configured to provide a test current to the cell arrangement and to the sense resistor (see col. 10, lines 59-67). Therefore, it would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to apply a known technique to a known device ready for improvement to yield predictable results, such as, providing a method and apparatus for characterizing internal parameters of cell arrangement based on a wide frequency range of impedance measurements and a non-linear equivalent circuit model, which can be used for quality control of battery products and testing of batteries by analyzing or predicting the operational properties of cell arrangement as taught by Yoon et al. (see col. 2, lines 43-56). Claims 6, 16, and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Schramme et al. (US 2020/0116764) in view of Hammerschmidt et al. (DE 102017222967 A1) and Shimomura et al. (US 9,496,861). Regarding claim 6, although Schramme et al. does not appear to disclose a multiplexer, Shimomura et al. shows that this feature is well known in the art. Hamaoka et al. discloses a measurement system, wherein the voltage measurement circuitry comprises a multiplexer (element 2, Fig. 1), coupled to respective individual ones of the sense resistors, the multiplexer configured to couple a selected individual one of the sense resistors to a voltage measurement device (element 3, Fig. 1). Therefore, it would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to apply a known technique to a known device ready for improvement to yield predictable results, such as, suppressing the increase in the circuit area while realizing the highly accurate voltage measurements. Regarding claims 16 and 17, although Schramme et al. does not appear to disclose a multiplexer, Shimomura et al. shows that this feature is well known in the art. Hamaoka et al. discloses a measurement system, wherein the voltage measurement circuitry comprises a multiplexer (element 2, Fig. 1), wherein the measuring respective voltages includes measuring at least two voltages using a shared voltage measurement device (element 3, Fig. 1), and wherein the shared voltage measurement device includes a single voltage measurement device to measure a voltage corresponding to each of the plurality of sense resistors before the summing of the calculated respective current values (see Fig. 1). Therefore, it would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to apply a known technique to a known device ready for improvement to yield predictable results, such as, suppressing the increase in the circuit area while realizing the highly accurate voltage measurements. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Shen et al. (US 8,723,526) discloses a device and method of testing an internal resistance of a battery pack. Allowable Subject Matter No art has been found for a prior art rejection of claim 13 at this time. Response to Arguments The argued limitation of amended claims 1 and 14 is now rejected over Schramme et al. in view of newly discovered Hammerschmidt et al. (DE 102017222967 A1). The argued limitation of amended claim 20 is now rejected over Schramme et al. in view of newly discovered Hammerschmidt et al. (DE 102017222967 A1) and Yoon et al. (US 6,160,382). Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Contact Information Any inquiry concerning this communication or earlier communications from the examiner should be directed to MILTON GONZALEZ whose telephone number is (571)270-7914. The examiner can normally be reached 8:00 AM - 5:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, WALTER LINDSAY can be reached at (571) 272-1674. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /WALTER L LINDSAY JR/Supervisory Patent Examiner, Art Unit 2852 /M.G/Examiner, Art Unit 2852 4/30/2026
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Prosecution Timeline

Mar 04, 2024
Application Filed
Oct 02, 2025
Non-Final Rejection mailed — §103
Dec 30, 2025
Response Filed
May 11, 2026
Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
78%
Grant Probability
90%
With Interview (+12.2%)
2y 5m (~2m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 642 resolved cases by this examiner. Grant probability derived from career allowance rate.

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