Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
The instant application having Application No. 18595673 has a total of 8 claims pending in the application, all of which are ready for examination by the examiner.
I. ACKNOWLEDGEMENT OF REFERENCES CITED BY APPLICANT
Information Disclosure Statement
As required by M.P.E.P 609(c), the applicant’s submissions of the Information Disclosure Statement dated 3/5/24 is acknowledged by the examiner and the cited references have been considered in the examination of the claims now pending. As required by M.P.E.P 609 C(2), a copy of the PTOL-1449 initialed and dated by the examiner is attached to the instant office action.
II. REJECTIONS NOT BASED ON PRIOR ART
Claim Rejections – 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-8 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more.
Step 1: Claim 1 is a process type claim. Claim 7 is a machine type claim. Claim 8 is a manufacture type claim. Therefore, claims 1-8 are directed to either a process, machine, manufacture or composition of matter.
As per claim 1,
2A Prong 1:
“Ascertaining, from a set of implementation variants of the neural network, a subset with a plurality of implementation variants of the neural network, wherein each implementation variant of the subset cannot be improved with respect to any of main memory requirement, non-volatile memory requirement, and execution time” A neural network designer mentally or with pencil and paper looks at options for their neural network and selects them, performing the necessary calculations to determine the optimal build.
“Without impairing at least one of the other two of the main memory requirement, the non-volatile memory requirement, and execution time” The neural network designer mentally or with pencil and paper performs the calculations to determine selections for the neural network without affecting other constraints.
“and the subset, for each of the main memory requirement, the non-volatile memory requirement, and the execution time,… contains at least one particular implementation variant that is optimal in this respect from the set of implementation variants” The neural network designer mentally or with pencil and paper calculates and considers various optimized designs.
“Selecting one of the ascertained implementation variants according to a user input that specifies a selection from the subset” The neural network designer mentally or with pencil and paper selects a preferred design based upon their calculations.
2A Prong 2: This judicial exception is not integrated into a practical application.
Additional elements:
A data processing device, (mere instructions to apply the exception using a generic computer component);
“Storing the selected implementation variant in the data processing device” (Adding insignificant extra-solution activity to the judicial exception - see MPEP 2106.05(g)).
2B: The claim does not include additional elements individually or in combination that are sufficient to amount to significantly more than the judicial exception.
Additional elements:
A data processing device (mere instructions to apply the exception using a generic computer component)
“Storing the selected implementation variant in the data processing device” (MPEP 2106.05(d)(II) indicate that merely “storing and retrieving information in memory” is a well‐understood, routine, conventional function when it is claimed in a merely generic manner (as it is in the present claim). Thereby, a conclusion that the claimed storing step is well-understood, routine, conventional activity is supported under Berkheimer).
As per claims 2-4, these claims contain similar mental steps to claim 1, and are rejected for similar reasons.
As per claim 5, this claim contains similar mental steps to claim 1, and is rejected for similar reasons.
2A Prong 2: This judicial exception is not integrated into a practical application.
Additional elements:
“Receiving a specification of a restriction of the data processing device with respect to at least one of non-volatile memory and main memory” (Adding insignificant extra-solution activity to the judicial exception - see MPEP 2106.05(g)).
2B: The claim does not include additional elements individually or in combination that are sufficient to amount to significantly more than the judicial exception.
Additional elements:
“Receiving a specification of a restriction of the data processing device with respect to at least one of non-volatile memory and main memory” (MPEP 2106.05(d)(II) indicate that merely “receiving or transmitting data” is a well‐understood, routine, conventional function when it is claimed in a merely generic manner (as it is in the present claim). Thereby, a conclusion that the claimed receiving step is well-understood, routine, conventional activity is supported under Berkheimer).
As per claim 6, this claim contains similar mental steps to claim 1, and is rejected for similar reasons.
2A Prong 2: This judicial exception is not integrated into a practical application.
Additional elements:
“Receiving a specification of an application request with respect to at least one of a maximum computing time, a maximum non-volatile memory requirement, and a maximum main memory requirement” (Adding insignificant extra-solution activity to the judicial exception - see MPEP 2106.05(g)).
2B: The claim does not include additional elements individually or in combination that are sufficient to amount to significantly more than the judicial exception.
Additional elements:
“Receiving a specification of an application request with respect to at least one of a maximum computing time, a maximum non-volatile memory requirement, and a maximum main memory requirement” (MPEP 2106.05(d)(II) indicate that merely “receiving or transmitting data” is a well‐understood, routine, conventional function when it is claimed in a merely generic manner (as it is in the present claim). Thereby, a conclusion that the claimed receiving step is well-
As per claim 7,
2A Prong 1:
“Ascertain, from a set of implementation variants of the neural network, a subset with a plurality of implementation variants of the neural network, wherein each implementation variant of the subset cannot be improved with respect to any of main memory requirement, non-volatile memory requirement, and execution time” A neural network designer mentally or with pencil and paper looks at options for their neural network and selects them, performing the necessary calculations to determine the optimal build.
“Without impairing at least one of the other two of the main memory requirement, the non-volatile memory requirement, and execution time” The neural network designer mentally or with pencil and paper performs the calculations to determine selections for the neural network without affecting other constraints.
“and the subset, for each of the main memory requirement, the non-volatile memory requirement, and the execution time,… contains at least one particular implementation variant that is optimal in this respect from the set of implementation variants” The neural network designer mentally or with pencil and paper calculates and considers various optimized designs.
“Select one of the ascertained implementation variants according to a user input that specifies a selection from the subset” The neural network designer mentally or with pencil and paper selects a preferred design based upon their calculations.
2A Prong 2: This judicial exception is not integrated into a practical application.
Additional elements:
A computer system, a data processing device, (mere instructions to apply the exception using a generic computer component);
“Store the selected implementation variant in the data processing device” (Adding insignificant extra-solution activity to the judicial exception - see MPEP 2106.05(g)).
2B: The claim does not include additional elements individually or in combination that are sufficient to amount to significantly more than the judicial exception.
Additional elements:
A computer system, a data processing device, (mere instructions to apply the exception using a generic computer component)
“Store the selected implementation variant in the data processing device” (MPEP 2106.05(d)(II) indicate that merely “storing and retrieving information in memory” is a well‐understood, routine, conventional function when it is claimed in a merely generic manner (as it is in the present claim). Thereby, a conclusion that the claimed storing step is well-understood, routine, conventional activity is supported under Berkheimer).
understood, routine, conventional activity is supported under Berkheimer).
As per claim 8,
2A Prong 1:
“Ascertaining, from a set of implementation variants of the neural network, a subset with a plurality of implementation variants of the neural network, wherein each implementation variant of the subset cannot be improved with respect to any of main memory requirement, non-volatile memory requirement, and execution time” A neural network designer mentally or with pencil and paper looks at options for their neural network and selects them, performing the necessary calculations to determine the optimal build.
“Without impairing at least one of the other two of the main memory requirement, the non-volatile memory requirement, and execution time” The neural network designer mentally or with pencil and paper performs the calculations to determine selections for the neural network without affecting other constraints.
“and the subset, for each of the main memory requirement, the non-volatile memory requirement, and the execution time,… contains at least one particular implementation variant that is optimal in this respect from the set of implementation variants” The neural network designer mentally or with pencil and paper calculates and considers various optimized designs.
“Selecting one of the ascertained implementation variants according to a user input that specifies a selection from the subset” The neural network designer mentally or with pencil and paper selects a preferred design based upon their calculations.
2A Prong 2: This judicial exception is not integrated into a practical application.
Additional elements:
A non-transitory computer readable medium, a data processing device, a computer (mere instructions to apply the exception using a generic computer component);
“Storing the selected implementation variant in the data processing device” (Adding insignificant extra-solution activity to the judicial exception - see MPEP 2106.05(g)).
2B: The claim does not include additional elements individually or in combination that are sufficient to amount to significantly more than the judicial exception.
Additional elements:
A non-transitory computer readable medium, a data processing device, a computer (mere instructions to apply the exception using a generic computer component)
“Storing the selected implementation variant in the data processing device” (MPEP 2106.05(d)(II) indicate that merely “storing and retrieving information in memory” is a well‐understood, routine, conventional function when it is claimed in a merely generic manner (as it is in the present claim). Thereby, a conclusion that the claimed storing step is well-understood, routine, conventional activity is supported under Berkheimer).
III. REJECTIONS BASED ON PRIOR ART
Examiners Note: Some rejections will be followed by an ‘EN’ that will denote an examiners note. This will be placed to further explain a rejection.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-8 are rejected under 35 U.S.C. 103 as being unpatentable over Tan et al (US 20200143227 A1) in view of Dettmers (“A Full Hardware Guide to Deep Learning”).
As per claims 1, and 7-8, Tan discloses, “A method for providing a neural network” (Abstract; EN: this denotes the design of neural networks). “on a data processing device, comprising the following steps” (pg.2, particularly paragraph 0013; EN: This denotes the hardware used to run the system).
“Ascertaining, from a set of implementation variants of the neural network” (Pg.5, particularly paragraph 0054; EN: this denotes a search space of different network layers (i.e. implementation variants)). “a subset with a plurality of implementation variants of the neural network, wherein each implementation variant of the subset cannot be improved” (Pg.4, particularly paragraph 0045; EN: this denotes looking for pareto optimal solutions, which are solutions where improvements can only be made by detracting from other aspect of the solutions). “with respect to any of … memory requirement” (pg.5, particularly paragraph 0048; EN: this denotes solving for memory). “… and execution time” (Pg.4, particularly paragraph 0045; EN: this denotes latency as a goal (i.e. execution time)). “without impairing at least one of the other two of the … memory requirement, … and execution time….” (Pg.4, particularly paragraph 0045; EN: this denotes looking for pareto optimal solutions, which are solutions where improvements can only be made by detracting from other aspect of the solutions). “and the subset, for each of the … memory requirement … and the execution time, when executed on the data processing device, contains at least one particular implementation variant that is optimal in this respect from the set of implementation variants” (pg.5, particularly paragraphs 0047-0048; EN: this denotes finding solutions along the pareto-optimal curve for the constraints).
“selecting one of the ascertained implementation variants according to a user input that specifies a selection from the subset” (Pg.10, particularly paragraph 0103; EN: this denotes the user interacting with and evaluating the networks in order to find the optimal one).
“storing the selected implementation variant in the data processing device” (pg.9, particularly paragraph 0096; EN: this denotes storing the neural networks in the system).
However, Tan fails to explicitly disclose, “main memory requirement”, “non-volatile memory requirement.”
Dettmers discloses, “main memory requirement” (Pg.5-7; EN: this denotes the discussion of RAM in relation to deep learning).
“non-volatile memory requirement” (Pg.13; EN: this denotes non-volatile needs like hard drives).
Tan and Dettmers are analogous art because both involve neural networks.
Before the effective filing date it would have been obvious to one skilled in the art of neural networks to combine the work of Tan and Dettmers in order to include both nonvolatile and volatile memory considerations to neural network design.
The motivation for doing so would be because: “The hard drive is not usually a bottleneck for deep learning. However, if you do stupid things it will hurt you” (Dettmers, Pg.13, Hard Drive/SSD section) and because “You should have enough RAM to comfortable work with your GU. That means you should have at least he amount of RAM that matches your biggest GPU” (Dettmers, Pg.7) or in the case of Tan, allow the system to make use of different memory considerations when optimizing for memory in their design process.
Therefore before the effective filing date it would have been obvious to one skilled in the art of neural networks to combine the work of Tan and Dettmers in order to include both nonvolatile and volatile memory considerations to neural network design.
As per claim 2, Tan discloses, “Ascertaining a set of layers of the neural network that, when the neural network is implemented according to a reference implementation, have a longer execution time than other layers of the neural network on the data processing device” (Pg.5-6, particularly paragraphs 0054-0056; EN: this denotes looking at layers and how long they take to execute).
“ascertaining different layer implementation variants for each layer of the set of layers” (Pg.6, particularly paragraph 0065; EN: this denotes doing the search for each layer).
“ascertaining implementation variants of the neural network by combining the ascertained layer implementation variants to form an implementation variant of the neural network, wherein a corresponding predefined standard implementation is used for layers that are not part of the set” (pg.5, particularly paragraphs 0047-0048; EN: this denotes finding solutions along the pareto-optimal curve for the constraints, with not included layers not being manipulated or changed, and thus having standard implementation).
“ascertaining the subset of implementation variants by ascertaining the .. memory requirement … and the execution time for each of the ascertained implementation variants” (pg.5, particularly paragraphs 0047-0048; EN: this denotes finding solutions along the pareto-optimal curve for the constraints).
Dettmers discloses, “main memory requirement” (Pg.5-7; EN: this denotes the discussion of RAM in relation to deep learning).
“non-volatile memory requirement” (Pg.13; EN: this denotes non-volatile needs like hard drives).
As per claim 3, Tan discloses, “wherein all implementation variants of the set of implementation variants supply the same output from the output layer of the neural network for the same input to the input layer of the neural network” (pg.3, particularly paragraph 0036; EN: this denotes designing the neural network for a particular task, and this means it will receive the same type of inputs and provide the same type of outputs).
As per claim 4, Tan discloses, “wherein the implementation variants differ in at least one of: a set of layers that are each implemented for the same calculation function; a set of layers that are each implemented for of a respective calculation function adapted to an input variable, and /or an output variable, and/or one or more quantization parameters of the layer; a data type with which weights are stored in the main memory; a set of layers whose calculations are implemented using a lookup table” (pg.6, particularly paragraph 0065; EN: this denotes looking at the calculation of layers such as the different strides, input/output resolutions, filter sizes, etc. This meets calculation functions adapted to inputs and outputs as it denotes how it handles the input and what kind of outputs it provides).
As per claim 5, Tan discloses, “receiving a specification of a restriction of the data processing device with respect to at least one of … memory” (pg.5, particularly paragraph 0048; EN: this denotes solving for memory). “and ascertaining the subset of implementation variants such that the implementation variants of the subset comply with the restrictions” (pg.5, particularly paragraphs 0047-0048; EN: this denotes finding solutions along the pareto-optimal curve for the constraints).
Dettmers discloses, “main memory requirement” (Pg.5-7; EN: this denotes the discussion of RAM in relation to deep learning).
“non-volatile memory requirement” (Pg.13; EN: this denotes non-volatile needs like hard drives).
As per claim 6, Tan discloses, “receiving a specification of an application request with respect to at least one of a maximum computing time, a maximum … memory requirement… and ascertaining the subset of implementation variants such that the implementation variants of the subset satisfy the application requires” (Pg.3, particularly paragraph 0034; EN: this denotes setting up the neural network for resource constrained environments).
Conclusion
The examiner requests, in response to this Office action, support be shown for language added to any original claims on amendment and any new claims. That is, indicate support for newly added claim language by specifically pointing to page(s) and line no(s) in the specification and/or drawing figure(s). This will assist the examiner in prosecuting the application.
When responding to this office action, Applicant is advised to clearly point out the patentable novelty which he or she thinks the claims present, in view of the state of the art disclosed by the references cited or the objections made. He or she must also show how the amendments avoid such references or objections See 37 CFR 1.111(c).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BEN M RIFKIN whose telephone number is (571)272-9768. The examiner can normally be reached Monday-Friday 9 am - 5 pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Alexey Shmatov can be reached at (571) 270-3428. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/BEN M RIFKIN/Primary Examiner, Art Unit 2123
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