Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 3, and 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chang (US 20110156249 A1), in view of Schustereder (US 20210159115 A1).
Regarding independent claim 1, Chang teaches a method of manufacturing a semiconductor device comprising: forming a bonded substrate including an effective chip area by bonding a first chip including a first device layer on a first substrate via a porous layer and a second chip including a second device layer on a second substrate (Fig. 2B, 12, 22, 14, 24 18; [0028], "Specifically, the first and the second wafers 10, 20 further include a first and a second substrates 12, 22 as well as a first and a second device layers 14, 24, respectively...Typically, the low-k layers 18, 28 are made of the conventional low-k material, such as silicon dioxide, or the porous materials.").
However, Chang does not teach irradiating the porous layer in an ineffective chip area surrounding the effective chip area of the bonded substrate with laser light from the first substrate side; and separating the first substrate from the bonded substrate from the porous layer in the ineffective chip area.
However, in the same field of endeavor, Schustereder teaches irradiating the porous layer in an ineffective chip area surrounding the effective chip area of the bonded substrate with laser light from the first substrate side ([0042], "Forming the separation layer into a porous part of the semiconductor substrate may increase the absorption capability of this layer...For example, splitting (e.g. by light irradiation, e.g. laser light irradiation) may be enabled…"); and separating the first substrate from the bonded substrate from the porous layer in the ineffective chip area ([0052], "For example, separating the semiconductor substrate along the separation layer may comprise concurrently irradiating the semiconductor substrate with superposed electromagnetic radiation from at least two radiation sources, the superposed electromagnetic radiation having intensity peaks at two or more wavelengths.").
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the manufacturing method of Chang with the laser irradiation and separation of the substrate of Schustereder so as to separate the substrate "into a first substrate part and a second substrate part" (Schustereder, [0002]).
Regarding dependent claim 3, Chang, as previously modified by Schustereder, teaches the method of manufacturing the semiconductor device according to claim 1. However, as previously combined, they do not teach wherein an absorption coefficient of the porous layer in the wavelength of the laser light is larger than an absorption coefficient of the first substrate in the wavelength of the laser light.
However, Schustereder further teaches wherein an absorption coefficient of the porous layer in the wavelength of the laser light is larger than an absorption coefficient of the first substrate in the wavelength of the laser light ([0030], "Due to the higher absorption coefficient of the separation layer, a larger portion of the light of the target wavelength may be absorbed within the separation layer than in the material of the semiconductor substrate outside the separation layer.").
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the manufacturing method as described by the combination of Chang and Schustereder with the absorption coefficients of Schustereder so that "a larger portion of the light of the target wavelength may be absorbed within the separation layer than in the substrate" (Schustereder, [0030]).
Regarding dependent claim 4, Chang, as previously modified by Schustereder, teaches the method of manufacturing the semiconductor device according to claim 1. However, as previously combined, they do not teach wherein the porous layer includes a silicon layer with lower resistance than the first substrate.
However, Schustereder further teaches wherein the porous layer includes a silicon layer with lower resistance than the first substrate ([0043], “…of the development of the porous part (e.g. a porous silicon carbide layer)…”, [0038], "The porous part may be formed in the semiconductor substrate, for example, by anodization…" (As said in the present application, "the substrate 10 may be a P-type single-crystal Si substrate with a specific resistance of 0.01Ω.Math.cm, and the low resistance porous layer 14 may be formed by performing the anodization in an HF solution.", therefore, since the porous layer is made in the same manner in this source, it is of a lower resistance than the substrate)).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the manufacturing method as described by the combination of Chang and Schustereder with the porous layer of lower resistance of Schustereder so that it "electrochemically decomposes, to a certain extent, the semiconductor substrate crystal in the region of the porous part" (Schustereder, [0038]).
Claim(s) 7, 9, and 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Schustereder (US 20210159115 A1), in view of Chang (US 20110156249 A1).
Regarding independent claim 7, Schusterder teaches a method for separating a substrate comprising: irradiating a porous layer in an ineffective chip area surrounding an effective chip area of a bonded substrate with laser light from a first substrate side ([0042], "Forming the separation layer into a porous part of the semiconductor substrate may increase the absorption capability of this layer...For example, splitting (e.g. by light irradiation, e.g. laser light irradiation) may be enabled…"), and separating the first substrate from the bonded substrate starting from the ineffective chip area of the porous layer ([0052], "For example, separating the semiconductor substrate along the separation layer may comprise concurrently irradiating the semiconductor substrate with superposed electromagnetic radiation from at least two radiation sources, the superposed electromagnetic radiation having intensity peaks at two or more wavelengths.").
However, Schustereder does not teach the bonded substrate including the effective chip area and obtained by bonding the first substrate including the porous layer and the second substrate.
However, in the same field of endeavor, Chang teaches the bonded substrate including the effective chip area and obtained by bonding the first substrate including the porous layer and the second substrate (Fig. 2B, 12, 22, 14, 24 18; [0028], "Specifically, the first and the second wafers 10, 20 further include a first and a second substrates 12, 22 as well as a first and a second device layers 14, 24, respectively...Typically, the low-k layers 18, 28 are made of the conventional low-k material, such as silicon dioxide, or the porous materials.", [0030], "...the supporting structure 25 is arranged on the location of the circuit devices (i.e. the chip area in the device layer)...").
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to combine the method of Schustereder with the components of a bonded substrate of Chang so that "the interconnection distance between the circuit devices (or chips) 16, 26 in the respective device layers 14, 24 can be remarkably reduced" (Chang, [0032]).
Regarding dependent claim 9, Schustereder, as previously modified by Chang, teaches the method for separating a substrate according to claim 7, and further teaches wherein an absorption coefficient of the porous layer in the wavelength of the laser light is larger than an absorption coefficient of the first substrate in the wavelength of the laser light ([0030], "Due to the higher absorption coefficient of the separation layer, a larger portion of the light of the target wavelength may be absorbed within the separation layer than in the material of the semiconductor substrate outside the separation layer.").
Regarding dependent claim 10, Schustereder, as previously modified by Chang, teaches the method for separating a substrate according to claim 7, and further teaches wherein the porous layer includes a silicon layer with lower resistance than the first substrate ([0038], "The porous part may be formed in the semiconductor substrate, for example, by anodization…" (As said in the present application, "the substrate 10 may be a P-type single-crystal Si substrate with a specific resistance of 0.01Ω.Math.cm, and the low resistance porous layer 14 may be formed by performing the anodization in an HF solution.", therefore, since the porous layer is made in the same manner in this source, it is of a lower resistance than the substrate)).
Claim(s) 2 and 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Schustereder (US 20210159115 A1) and Chang (US 20110156249 A1), in view of Takagi (US 20220069159 A1).
Regarding dependent claim 2, Chang, as previously modified by Schustereder, teaches the method of manufacturing the semiconductor device according to claim 1. However, as previously combined, they do not teach wherein a wavelength of the laser light is a wavelength that transmits through the first substrate.
However, in the same field of endeavor, Takagi teaches wherein a wavelength of the laser light is a wavelength that transmits through the first substrate (Fig. 8, 20, 110; [0102], "The laser-light transparent substrate 20 transmits the laser light 110 of a certain wavelength.").
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to combine the manufacturing method as described by the combination of Chang and Schustereder with the laser wavelength of Takagi so as to "to separate the semiconductor layer from the substrate" (Takagi, [0092]).
Regarding dependent claim 8, Schustereder, as previously modified by Chang, teaches the method for separating a substrate according to claim 7. However, as previously combined, they do not teach wherein a wavelength of the laser light is a wavelength that transmits through the first substrate.
However, in the same field of endeavor, Takagi teaches wherein a wavelength of the laser light is a wavelength that transmits through the first substrate (Fig. 8, 20, 110; [0102], "The laser-light transparent substrate 20 transmits the laser light 110 of a certain wavelength.").
Therefore, it would have ben obvious to one of ordinary skill in the art before the effective filing date to combine the method as described by the combination of Schustereder and Chang with the laser wavelength of Takagi so as to "to separate the semiconductor layer from the substrate" (Takagi, [0092]).
Claim(s) 5 and 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Schustereder (US 20210159115 A1) and Chang (US 20110156249 A1), in view of Wang (US 20130240962 A1).
Regarding dependent claim 5, Chang, as previously modified by Schustereder, teaches the method of manufacturing the semiconductor device according to claim 1. However, as previously combined, they do not teach wherein the first device layer includes a memory cell array and the second device layer includes a CMOS circuit.
However, in the same field of endeavor, Wang teaches wherein the first device layer includes a memory cell array and the second device layer includes a CMOS circuit ([0115], "Accordingly, the first device layer may be a drive circuit array including CMOS read and write circuits, and the second device layer may be a memory array including NAND memory units or NOR memory units.").
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to combine the manufacturing method as described by the combination of Chang and Schustereder with the devices of Wang so as to "simplify the manufacturing process, improve the device performance and shorten the production cycle" (Wang, [0116]).
Regarding dependent claim 11, Schustereder, as previously modified by Wang, teaches the method for separating a substrate according to claim 7. However, as previously combined, they do not teach wherein the first device layer includes a memory cell array and the second device layer includes a CMOS circuit.
However, in the same field of endeavor, Wang teaches wherein the first device layer includes a memory cell array and the second device layer includes a CMOS circuit ([0115], "Accordingly, the first device layer may be a drive circuit array including CMOS read and write circuits, and the second device layer may be a memory array including NAND memory units or NOR memory units.").
Therefore, it would have ben obvious to one of ordinary skill in the art before the effective filing date to combine the method as described by the combination of Schustereder and Chang with the devices of Wang so as to "simplify the manufacturing process, improve the device performance and shorten the production cycle" (Wang, [0116]).
Claim(s) 6 and 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Schustereder (US 20210159115 A1) and Chang (US 20110156249 A1), in view of Na (US 20140347776 A1) and Yamamoto (US 20230054800 A1).
Regarding dependent claim 6, Chang, as previously modified by Schustereder, teaches the method of manufacturing the semiconductor device according to claim 1. However, as previously combined, they do not teach wherein the effective chip area includes a device that is electrically connected and the ineffective chip are includes a device that is not electrically connected.
However, in the same field of endeavor, Na teaches wherein the effective chip area includes a device that is electrically connected ([0015], "...the sixth conductive line may be disposed on the device area, may extend to the chip area, and may be electrically connected…"), and Yamamoto teaches the ineffective chip are includes a device that is not electrically connected ([0027], "...semiconductor chips cut out of the ineffective chip areas 210 are not determined as products.", [0029], "...the second electrode pads 230 in the ineffective area 200..." (Since the area is ineffective, the devices on it are not electrically connected)).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to combine the manufacturing method as described by the combination of Chang and Schustereder with the electrically connected device of Na so that the device "may be formed as one package module" (Na, [0019]), and with the ineffective chip area with an unconnected device of Yamamoto so as to make it "easier to reduce the remaining of the resist layer 300, which is used to form the first conductive bumps 135 and the second conductive bumps 235" (Yamamoto, [0055]).
Regarding dependent claim 12, SChustereder, as previously modified by Chang, teaches the method of manufacturing the semiconductor device according to claim 7. However, as previously combined, they do not teach wherein the effective chip area includes a device that is electrically connected and the ineffective chip are includes a device that is not electrically connected.
However, in the same field of endeavor, Na teaches wherein the effective chip area includes a device that is electrically connected ([0015], "...the sixth conductive line may be disposed on the device area, may extend to the chip area, and may be electrically connected…"), and Yamamoto teaches the ineffective chip are includes a device that is not electrically connected ([0027], "...semiconductor chips cut out of the ineffective chip areas 210 are not determined as products.", [0029], "...the second electrode pads 230 in the ineffective area 200..." (Since the area is ineffective, the devices on it are not electrically connected)).
Therefore, it would have ben obvious to one of ordinary skill in the art before the effective filing date to combine the method as described by the combination of Schustereder and Chang with the electrically connected device of Na so that the device "may be formed as one package module" (Na, [0019]), and with the ineffective chip area with an unconnected device of Yamamoto so as to make it "easier to reduce the remaining of the resist layer 300, which is used to form the first conductive bumps 135 and the second conductive bumps 235" (Yamamoto, [0055]).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
US 20220037520 A1, pertaining to a porous silicon layer on a substrate that is doped..
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/TIMOTHY JAMES MATTABONI/Examiner, Art Unit 2897 /CHAD M DICKE/Supervisory Patent Examiner, Art Unit 2897
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