DETAILED ACTION
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 2, 6, 11-16 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by U.S. PGPub 2019/0384002 A1 by Lambert.
Regarding claim 1, Lambert teaches a photonic integrated apparatus (the process by which it is made is illustrated in Figs. 2-10) comprising: a substrate (wafer base layer 210); a dielectric layer (BOX layer 220 and insulating layer 260 having a common, flush upper surface) on the substrate, the dielectric layer defining an opening (a filled recess 204 as illustrated in the first step in Fig. 2) exposing a part of the substrate (a portion of a surface 212); a photonic source (semiconductor optical device 250, with an active region for generating light) contacting a partial area of the substrate through the opening (partially disposed on the substrate 210, as illustrated in Fig. 10); a waveguide (230) on the dielectric layer (220); and a photonic steering device (optical bridge 290) on the dielectric layer and configured to steer light emitted from the photonic source to the waveguide.
Regarding claim 2, Lambert further teaches a partial area of at least one side surface of the photonic source (250) is in contact with the dielectric layer (260-1, indirectly, via a spacer layer 260-2).
Regarding claim 6, Lambert further teaches the photonic source (250) includes: a first semiconductor layer in contact with a partial area of the substrate; a second semiconductor layer above the first semiconductor layer; and an active layer between the first semiconductor layer and the second semiconductor layer, and wherein a portion of the first semiconductor layer protrudes from the dielectric layer (a III-V active region 252 is sandwiched between top and bottom layers of a semiconductor substrate 251 as illustrated in Fig. 10).
Regarding claim 11, Lambert further teaches the photonic steering device (290) is in contact with at least one of an upper surface or a side surface of the waveguide (in contact with both an upper and a right surface of an end of the waveguide 230-1).
Regarding claim 12, Lambert further teaches the waveguide overlaps a part of the photonic steering device in a thickness direction of the substrate (between two portions of the waveguide and the bridge 230-1 and 290-1, respectively).
Regarding claim 13, Lambert further teaches a refractive index of the photonic steering device (e.g., GaN semiconductor 251) is less than or equal to a refractive index of the waveguide (Si waveguide 230).
Regarding claim 14, Lambert further teaches the substrate (210) includes a semiconductor (silicon).
Regarding claim 15, Lambert further teaches the substrate, the dielectric layer, the photonic source, and the waveguide have a monolithic structure (as illustrated in Fig. 10 and formed by various deposition techniques).
Regarding claim 16, Lambert further teaches the substrate, the dielectric layer, and the waveguide are patterned from a silicon on insulator (SOI) substrate (a silicon layer 210 with a BOX layer 220 and a crystalline silicon layer 230).
Claim(s) 1, 9, 10 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by U.S. PGPub 2009/0135861 A1 by Webster et al.
Regarding claim 1, Webster teaches a photonic integrated apparatus (Fig. 4) comprising: a substrate (silicon substrate 20); a dielectric layer (22) on the substrate, the dielectric layer defining an opening (between sidewalls 26, 28) exposing a part of the substrate; a photonic source (gain medium, SOA 14 transmitting light forward and rearward to waveguides 40, 46) contacting a partial area of the substrate (on a portion of top surface of the substrate in the opening) through the opening; a waveguide (40) on the dielectric layer; and a photonic steering device (lens 34) on the dielectric layer and configured to steer light emitted from the photonic source to the waveguide.
Regarding claim 9, Webster further teaches the photonic steering device is configured to focus the light emitted from the photonic source toward the waveguide (34 is a focusing lens).
Regarding claim 10, Webster further teaches the light emitted from the photonic source is incident on a curved surface (inherent to a focusing lens, also illustrated in Fig. 1 as reference numeral 7) of the photonic steering device.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 3-5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lambert as applied to claim 1 above, and further in view of U.S. PGPub 2023/0238246 by Bayram et al.
Regarding claims 3-5, Lambert teaches disposing the semiconductor optical device (photonic source 250) in the etched recessed area (204) on the Si substrate (210) but does not specify the recess to be a groove that exposes a (111) plane of the Si substrate. Bayram teaches a method of etching a silicon wafer to form a plurality of grooves on which GaN active regions (815) are disposed, wherein the grooves include silicon sidewalls oriented on {111} planes, while a bottom of the groove is oriented in a silicon plane of {100}. The etching may occur preferentially in a way such as to create silicon sidewalls of the (111) direction holding up the patterned oxide layer, yet still retaining a bottom portion (100) of the buried substrate 204, thus defining a U-shaped groove. Such etching may be performed with potassium hydroxide (KOH), for example, which attacks the silicon sidewalls (111), until leaving the angled faces within the U-shaped grooves. It would have been obvious to one having ordinary skill in the art, before the effective filing date of the claimed invention, to modify Lambert’s invention, to use the preferential etching method to form the groove on which the photonic source is disposed, wherein the one or more grooves expose a (111) surface of the substrate as its sidewall, as suggested by Bayram, since doing so creates a known shape of the recess or groove with well-defined bottom and/or side walls for said recess or groove.
Claim(s) 17-18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lambert as applied to claim 1 above, and further in view of U.S. PGPub 2002/0136254 by Yoshida et al. Lambert teaches the semiconductor optical device 250 may be a gain medium for a laser but does not further specify its structure containing reflective and antireflective layers. However, such an arrangement is commonly known in the art for amplifying optical signal of a laser device prior to outputting. Yoshida also teaches a semiconductor laser device (Figs. 3, 4) comprising a MQW structure adopted for active layer 450, an anti-reflective layer (310) on at least a part of a surface of the laser device, a reflective layer (320) on at least a part of the surface of the laser device. It would have been obvious to one having ordinary skill in the art, before the effective filing date of the claimed invention, to modify Lambert’s invention, by disposing a reflective layer and a non-reflective layer on opposing sides of the optical device (250), with the reflective layer on a back facet as suggested by Yoshida (i.e., opposite from output facet or not facing the photonic steering device/bridge 290). The reasons for the reflective coating and antireflective coating are to confine /amplify light for the laser device and to reduce interfacial optical losses, respectively, which are commonly known in the art.
Claim(s) 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lambert or Webster et al. as applied to claim 1 above, and further in view of U.S. PGPub 2017/01391472 A1 by Patel et al. Lambert or Webster teaches the photonic apparatus including the dielectric layer and the waveguide layer but not an additional dielectric layer over the waveguide; and an additional waveguide over the additional dielectric layer and configured to transmit the light emitted from the photonic steering device to the waveguide through light coupling. Patel teaches a photonic apparatus (Fig. 3) comprising a photonic source (modulator 215) coupled to a silicon waveguide (220) and used to output an optical signal (e.g., a modulated signal) from the modulator (215) to the waveguide (220), an additional dielectric layer (insulator 230) over the waveguide (220); and an additional waveguide (340A) over the additional dielectric layer and configured to transmit the light emitted from the photonic steering device to the waveguide through light coupling (see at least description in ¶[0035]). It would have been obvious to one having ordinary skill in the art, before the effective filing date of the claimed invention, to modify Lambert or Webster’s invention, by using multiple layers of waveguides to evanescently couple the apparatus to an external optical device (235) as suggested by Patel, so as to allow coupling between optical modes of different sizes with minimized optical loss.
Allowable Subject Matter
Claims 7, 8 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Relevant prior art fails to teach or fairly suggest any reason or rationale that the first semiconductor layer includes: a first sub-semiconductor layer surrounded by the dielectric layer and a second sub-semiconductor layer on the first sub-semiconductor layer and having a width different from a width of the first sub-semiconductor layer, when considered in view of the rest of the limitations of the claimed invention.
Claim 19 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Relevant prior art fails to teach or suggest the photonic steering device and the waveguide, both of which are disposed on the dielectric layer, and a reflector on the photonic steering device and configured to reflect incident light emitted from the photonic source (to the waveguide), when considered in view of the rest of the limitations of the claimed invention.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. WO2007082059 discloses an SOI photonic integrated circuit.
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/CHARLIE Y PENG/Primary Examiner, Art Unit 2874