DETAILED ACTION
This Office action is in response to the application filed on 06 March 2024.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 6 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
In claim 6, the recitations of, “the proportional integral controller” and “the adaptive gain factor” lack antecedent basis. Moreover, it appears that claim 6 may have been intended to depend from claim 2, where these elements were properly introduced, instead of from claim 1 as filed. Because of the nature of the limitations and the invention in general, the exact scope of these recitations within claim 6 is indefinite as it is not clear which further limitations would need to be imported from the specification in order to clarify their meaning and their relationships to other claim elements.
For purposes of examination, claim 6 has been interpreted as though it depends from claim 2, which appears to be the simplest and broadest manner of correcting this issue.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1 and 7-10 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by “A three-sample-based PLL-less hysteresis current control and stability analysis of a single-phase active distribution system” by Prakash et al. (hereinafter “Prakash”).
In re claim 1, Prakash discloses a method of controlling a voltage sourced converter (VSC) (converter and its controller shown in Fig. 5) electrically connected to an alternating current (AC) electrical power system (active distribution network as taught in section “1) Control for three-phase active distribution network” at p. 7048 left column) to operate in a grid-following mode with respect to the AC electrical power system (Abstract and sec. I. Introduction on p. 7045: since the disclosed control is to ultimately regulate current of the VSC with synchronization to an existing grid, it is understood to be a grid-following scheme) without a phase locked loop operatively connected between the VSC and the AC electrical power system (Title, Abstract, etc.: the disclosed control is specifically taught as being “PLL-less”), wherein the VSC and the AC electrical power system are electrically interconnected by an AC bus bar (Fig. 5: PCC), wherein the AC electrical power system has three phases (Fig. 5: phases a, b, c), the method comprising:
forming, for each phase of the AC electrical power system, direct-axis and quadrature-axis voltage signals based on a corresponding phase voltage measured at the AC bus bar (Fig. 5: Unit Vector Template Generation block (detail for a single phase as shown in Fig. 3) generates direct-axis signals UA, UB, UC and quadrature-axis signals WA, WB, WC (generically hereinafter “Ux” and “Wx” respectively) from measured phase voltages Van, Vbn, Vcn; see also paragraph at p. 7048, right column),
wherein the direct-axis reference voltage signal comprises a sinusoidal wave with a magnitude of one and in phase with a positive sequence component of the corresponding phase voltage at the AC bus bar (see eq. (7) at p. 7047, right column for an in-phase or direct-axis signal for example phase Ua, having magnitude of Vs/Vs=1; it is noted that it corresponds to a positive-sequence phase voltage due to the control scheme being applied for a balanced three-phase system per section “1) Control for three-phase active distribution network” at p. 7048 left column) and the quadrature-axis reference voltage signal comprises a sinusoidal wave with a magnitude of one and 90 degrees out of phase with the positive sequence component of said corresponding phase voltage (see eq. (9) at p. 7047, right column and previous explanation for the direct-axis signals);
using the direct-axis and quadrature-axis voltage signals associated with each phase of the AC electrical power system, determining, for each phase of the AC electrical power system, a reference voltage signal for output to a firing pulse modulator of the VSC to form an output voltage of the VSC associated with the phase (Fig. 5 and paragraph at p. 7048, right column: direct- and quadrature-axis signals Ux and Wx used to generate signals (unlabeled) to the hysteresis controllers and then to the PWM controller to generate the control signals for the VSC switches),
wherein determining the reference voltage signal for the phase comprises:
forming an instantaneous reference current signal for the phase (IAref, IBref, Icref output from summing blocks) based on multiplicative products of (i) the direct-axis voltage signal and a direct-axis reference current magnitude (Fig. 5: multiplication block providing the products of the direct-axis signals Ux and the direct-axis reference current magnitude Idref to the summing blocks), and (ii) the quadrature-axis voltage signal and a quadrature-axis reference current magnitude (Fig. 5: other multiplication block providing the products of quadrature-axis signals Wx and quadrature-axis current reference magnitude Iqref to the summing blocks);
forming a phase current error signal for the phase based on the instantaneous reference current signal, with a gain factor applied thereto, and an actual instantaneous phase current signal for the phase (Fig. 5: the error/subtraction blocks receiving the instantaneous reference current signals, in this case being considered to have a gain factor of 1 inherently applied, from the summing blocks and receiving the actual phase current measurements Ix to generate the phase current error signals to the hysteresis controllers); and
forming the reference voltage signal based on the phase current error signal and a proportional gain factor (Fig. 5: the reference voltage signals are the phase current error signals and thus considered to have a proportional gain factor of 1 inherently applied); and
for each phase, outputting the reference voltage signal to the firing pulse modulator of the VSC (as shown in Fig. 5 and described in right column paragraph of p. 7048).
In re claim 7, Prakash discloses measuring the phase voltages at the AC bus bar (Fig. 5: phase voltages Van, Vbn, Vcn measured at the point-of-common-coupliong (PCC) as shown and described under section “1) Control for three-phase active distribution network” at p. 7048 left column).
In re claim 8, Prakash discloses wherein the phase shift forming the quadrature-axis voltage signal is in a leading direction (as understood from the sine/cosine relationship between the direct-axis voltage signals Ux of eq. (7) and the quadrature-axis voltage signals Wx of eq. (8) on p. 7047).
In re claim 9, Prakash discloses wherein the direct-axis and the quadrature- axis reference current magnitudes are scalar values (as understood from the description of Idref and Iqref, see eq. (1) and accompanying text at pp. 7046-7047, as well as the disclosed generation thereof, shown in Fig. 3 in the active and reactive power outer loop sections as being based on a PI control of a scalar error signal derived from the DC and AC voltage magnitudes of the system).
In re claim 10, Prakash discloses wherein the direct-axis and quadrature-axis reference voltage signals are in the form of sinusoidal or sine waves (see eqs. (7) and (9) at p. 7047 teaching signals Ux and Wx to be sine waves (the cosine wave of (9) is understood to be a sine wave phase-shifted 90 degrees).
Allowable Subject Matter
Claims 2-5 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim 6 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
With respect to claims 2-4, Prakash as cited above is considered the closest prior art to the claimed invention, but does not disclose that the gain factor applied to the instantaneous reference current signal is an adaptive gain factor determined by a PI controller having the specific features as they are recited in claim 2. Further, the additional prior art of record does not suggest any modification to the control scheme of Prakash to apply such an adaptive gain factor.
It is noted that claim 6, if amended according to the interpretation given above in the rejection under 35 U.S.C. 112(b) to depend from claim 2 instead of from claim 1, would be indicated as allowable by virtue of such dependence for the same reasons as just explained for claim 2.
With respect to claim 5, Prakash as cited above is considered the closest prior art to the claimed invention, but does not disclose the specific and detailed features as recited with respect to forming the instantaneous reference current signals for the first, second, and third phases when the direct-axis and quadrature-axis reference current magnitudes respectively comprise a first component based on a positive sequence current signal and a second component based on a negative sequence current signal. To the contrary, Prakash specifically notes in section “1) Control for three-phase active distribution network” at p. 7048-7049 that the disclosed control scheme is applicable only to three-phase, four wire distribution systems and to balanced, three-phase, three-wire distribution systems, which would be understood to a person of ordinary skill in the art to comprise only positive sequence components. As such, it would not have been obvious based on the prior art of record to modify the control scheme in Prakash in a manner that would arrive at the invention as recited in claim 5.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
US Patent 10,027,253 discloses a control scheme for a VSC used in a high-voltage DC transmission system that uses a two-phase stationary reference frame to represent positive and negative sequence voltage sequence components to avoid the need for PLL synchronization;
US 2021/0249862 discloses a control scheme for grid-following power electronic converters that enables grid synchronization without use of a PLL;
CN 109950925 discloses a VSC control method based on the use of SOGI as a quadrature signal generator without use of a PLL; and
“Voltage type reversible rectifiers control methods in unbalanced and non-sinusoidal conditions” by P. Verdelho discloses several control systems for VSCs which do not require use of a PLL for phase/frequency locking to the grid phase voltages.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to FRED E FINCH III whose telephone number is (571)270-7883. The examiner can normally be reached Monday-Friday, 8:00 AM - 4:30 PM ET. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Monica Lewis can be reached at (571) 272-1838. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/FRED E FINCH III/Primary Examiner, Art Unit 2838