DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1–8, 20 are rejected under 35 U.S.C. 103 as being unpatentable over Dongho ET AL (An Ultra-Wideband and Compact Active Quasi-Circulator with Phase Alternated Differential Amplifier) in view of Lin (US 2023/0093489).
Regarding claim 1: Dongho (Fig. 2(b), Fig. 3), teaches a multi-stack power amplifier having a differential structure, the multi-stack power amplifier comprising (Dongho, Abstract, line 4, “The proposed active quasi-circulator is based on a differential two-stage distributed amplifier”; Page 287, section III: Differential active Quasi-Circulator Design- “positive (+) and negative (-) node of the second stage amplifier are connected to – and + node of the first stage amplifier”). This teaches a differential multi-stage amplifier structure with cross-coupled amplifier stages.
Dongho (Fig. 2(a)), Fig. 3 teaches first stack (including first and second amplifier elements implemented by transistors M1, M2 of the differential amplifier stage) comprising a first amplifier element (Fig. 3, M1), configured to amplify a first signal having a first phase (transistors M1-M2, M3-M4). Dongho (Fig. 1(b)), also teaches a second amplifier element (Fig. 3, M2 ) configured to amplify a second signal having a second phase opposite to the first phase (Yoo, (Abstract-“phase alternated differential amplifier”, Fig. 2(a), showing differential phase relationships, and Page 287,section III: Differential active Quasi-Circulator Design-“positive (+) and negative (-) node of the second stage amplifier are connected to – and + node of the first stage amplifier, respectively”);
Dongho ( Fig 3), teaches a second stack comprising a third amplifier element (Fig. 3, M3), connected to an output terminal of the first amplifier element (M1) through a first interconnection (between transistors M1-M3), and a fourth amplifier element (Fig. 3, M4) connected to an output terminal of the second amplifier element (M2) through a second interconnection between transistors (M2, M4).
However, Dongho does not disclose that the first and second interconnections physically intersect within the actual device layout. Lin (Fig. 8 and Fig. 9) discloses first and second interconnections that physically intersect/cross between differential amplifier elements.
It would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to modify the interstage interconnections of Dongho to physically intersect/cross as taught by Lin in order to reduce wiring length, improve compact layout implementation, and improve routing symmetry and phase matching in a different radio frequency amplifier structure.
Regarding claim 2: All the limitations of claim 1 have been discussed above except for, a phase of a first coupling signal, coupled to a first ground through the first amplifier element, and a phase of a second coupling signal, coupled to the first ground through the fourth amplifier element, are opposite to each other, and a phase of a third coupling signal, coupled to a second ground through the second amplifier element, and a phase of a fourth coupling signal, coupled to the second ground through the third amplifier element, are opposite to each other. Dongho (Abstract-“phase alternated differential amplifier”; Fig. 2(a); Page 287,section III: Differential active Quasi-Circulator Design-“positive (+) and negative (-) node of the second stage amplifier are connected to – and + node of the first stage amplifier, respectively”).
Regarding claim 3: All the limitations of claim 2 have been discussed above except for, wherein Dongho (Fig. 3) discloses the first ground comprises a ground of the first amplifier element (M1) and a ground of the fourth amplifier element (M4), connected to each other, and the second ground comprises a ground of the second amplifier element (M2) and a ground of the third amplifier element (M3), connected to each other (page 287, section III.C. ”The coupled inductors are considered to design in terms of symmetry which is important differential circuit”).
Regarding claim 4: All the limitations of claim 3 have been discussed above except for, wherein Dongho (Fig. 2 (a), and Fig. 3) discloses a first virtual ground, in which the first coupling signal and the second coupling signal cancel each other out, is formed in a region through which a ground of the first amplifier element (M1) and a ground of the fourth amplifier element (M4) are connected to each other (Page 286, section II, paragraph 1 “the two signals meet out-of-phase at the RX port and destructive interference occurs”).
Yoo further discloses a second virtual ground, in which the third coupling signal and the fourth coupling signal cancel each other out, is formed in a region through which a ground of the second amplifier element (M2) and a ground of the third amplifier element (M3) are connected to each other (Page 286,section II, paragraph 2, “the outputs of the two amplifier stages meet out-of phase at the RX port”; page 285, section I, paragraph 2, “cancellation of transmitter TX to RX leakage signal”).
Regarding claim 5: All the limitations of claim 1 have been discussed above except for, Dongho, (Fig. 1(a)) discloses, wherein each of the first and second interconnections is disposed within a layout space comprising the first to fourth amplifier elements , page 285, section I, paragraph 2: “cancellation of transmitter (TX) to RX leakage signal across a wide frequency range”, page 286, section II, paragraph 1: “the two signals meet out-of-phase at the RX port and destructive interference occurs”).
Regarding claim 6: All the limitations of claim 1 have been discussed above except for, Dongho (Fig. 3), discloses wherein the first interconnection (conductive interstage path between M1 and M3) includes an inductance configured to compensate for a phase difference between an output signal of the first amplifier element (M1) and an output signal of the third amplifier element (m3), and the second interconnection (conductive interstage path between M2 and M4) includes an inductance configured to compensate for a phase difference between an output signal of the second amplifier element (M2) and an output signal of the fourth amplifier element (M4), (Page 286, section II, paragraph 2, “additional 180° phase shift in the second stage”; Page 287, section III.A: Inserting interstage inductor between the drain of common source stage and source of stacked FET solves this problem”; section C: “The coupled inductors are considered to design in terms of symmetry which is important in differential circuit”).
Regarding claim 7: All the limitations of claim 6 have been discussed above except for wherein Dongho (Fig. 3) discloses the inductance of the first interconnection has a value causing the output signal of the first amplifier element (M1) and the output signal of the third amplifier element (M3) to be in phase, and the inductance of the second interconnection has a value causing the output signal of the second amplifier element (M2) and the output signal of the fourth amplifier element (M4) to be in phase (page 286, section II, paragraph 2: “additional 180° phase shift in the second stage”, also, “therefore, the two TX to ANT signals meet in-phase at the ANT port and constructive interference occurs; page 287, section III.A., paragraph 2, “Inserting interstage inductor between the drain of common source stage and source of stacked FET solves this problem”).
Regarding claim 8: All the limitations of claim 1 have been discussed above except for wherein Dongho, (Fig. 3), discloses wherein the first to fourth amplifier elements (M1, M2, M3, M4) are disposed on a substrate comprising a plurality of layers, and the first interconnection and the second interconnection intersect each other through different layers of the plurality of layers (page 287, section III.C: “The coupled inductors are considered to design in terms of symmetry which is important in differential circuit”; and section B: “The inductors in synthetic line are implemented using coupled inductor”)
Regarding claim 20: Dongho (Fig. 3), teaches a multi-stack power amplifier having a differential structure, the multi-stack power amplifier comprising: a first amplifier stage comprising a first amplifier element (M1), configured to amplify a first signal having a first phase, and a second amplifier element (M2) configured to amplify a second signal having a phase opposite to the first phase; and a second amplifier stage comprising a third amplifier element (M3), connected to an output terminal of the first amplifier element (M1) through a first interconnection, and a fourth amplifier element (M4) connected to an output terminal of the second amplifier element (M2) through a second interconnection intersecting the first interconnection. Yoo further teaches cross-coupled interconnections between the amplifier stages (Abstract, line 4 – 9).
However, Dongho does not teach configuring inductance of the intersecting interconnections such that signals between amplifier stages are caused to be in phase.
Lin (Fig. 8, (paragraph [0050], [0061]), teaches that inductors L1 and L2 are incorporated into the differential amplifier signal paths and are used to affect signal characteristics within the amplifier, wherein inductance of the first interconnection has a value causing an output signal of the first amplifier element (M1) and an output signal of the third amplifier element to be in phase, and inductance of the second interconnection has a value causing an output signal of the second amplifier element (M2) and an output signal of the fourth amplifier element to be in phase.
Therefore, it would have been obvious to one having ordinary skill in the art at the time of the invention was effectively filed to modify the cross-coupled interconnections of Dongho in view of Lin such that the inductances of the interconnections are selected to cause amplifier-stage output signals to be in phase in order to improve inter-stage phase matching and signal combining performance, and overall amplifier operation, as taught by Lin’s use of inductive compensation elements within differential amplifier signal paths.
Claims 9-18 are rejected under 35 U.S.C. 103 as being unpatentable over Dongho ET AL (An Ultra-Wideband and Compact Active Quasi-Circulator with Phase Alternated Differential Amplifier) in view of Lin (US 2023/0093489) in further view of Soohyun ET AL (26 GHz 2-stacked Power Amplifier Using 28 nm Bulk CMOS).
Regarding claim 9: All the limitations of claim 3 have been discussed above with respect to Dongho in view of Lin except for, Dongho (Fig. 3) does not disclose a third stack comprising a fifth amplifier element configured to amplify a first input signal of a differential input signal and generate the first signal, and a sixth amplifier element configured to amplify a second input signal of the differential input signal and generate the second signal, wherein each of the fifth and sixth amplifier elements is a common source amplifier, and each of the first to fourth amplifier elements is a common gate amplifier.
Lin does not cure the deficiency of Dongho with respect to the third stack and common source/common gate amplifier configuration.
Soohyun (Fig. 1(a)) discloses a stacked differential amplifier structure including common-source (CS) stages and common-gate (CG) stages, where M1 and M3 are common-source stages and M2 and M4 are common-gate stages (page 48, section II.A.: “A degeneration capacitor (Cd) is used in common-gate (CG) stage to ensure the voltage swings across M2,4 for CG stage and M1,3 for common-source (CS stage”).
It would have been obvious to one having ordinary skill in the art at the time of the invention was effectively filed to modify Dongho in view of Lin to incorporate the stacked common-source and common-gate amplifier configuration as taught by Soohyun in order to improve gain, stability, and voltage handling in a stacked differential amplifier structure.
Regarding claim 10: Dongho and Lin, as applied to claim 9 above, collectively teach the limitations of claim 10 except for, a first feedback capacitor connected between a ground of the first amplifier element and a gate terminal of the first amplifier element; a second feedback capacitor connected between a ground of the second amplifier element and a gate terminal of the second amplifier element; a third feedback capacitor connected between a ground of the third amplifier element and a gate terminal of the third amplifier element; and a fourth feedback capacitor connected between a ground of the fourth amplifier element and a gate terminal of the fourth amplifier element.
Soohyun (Fig. 1(a), capacitors Cn1 and Cn2 coupled with transistors M1-M4) teaches feedback capacitors coupled between transistor terminals and ground nodes, including cross-coupled capacitors Cn1 and Cn2 associated with the amplifier stages (page 48, section II.A: “A cross-coupled capacitor (CCC), Cn1,2, was used in this design”).
It would have been obvious to one having ordinary skill in the art at the time of the invention was effectively filed to modify Dongho in view of Lin to include the feedback capacitor arrangement taught by Soohyun in order to improve gain stability and amplifier performance, because Soohyun expressly teaches that the cross-coupled capacitor arrangement improves both gain and stability of the power amplifier (page 48, right column, “been popularly used to improve both gain and stability of the power amplifiers”).
Regarding claim 11: Dongho, Lin and Soohyun, as applied to claim 10 above, collectively teach the limitations of claim 11 except, wherein the first coupling signal comprises an output signal of the first amplifier element, coupled to the ground of the first amplifier element through a parasitic capacitance component of the first amplifier element and the first feedback capacitor, the second coupling signal comprises an output signal of the fourth amplifier element, coupled to the ground of the fourth amplifier element through a parasitic capacitance component of the fourth amplifier element and the fourth feedback capacitor, the third coupling signal comprises an output signal of the second amplifier element, coupled to the ground of the second amplifier element through a parasitic capacitance component of the second amplifier element and the second feedback capacitor, and the fourth coupling signal comprises an output signal of the third amplifier element, coupled to the ground of the third amplifier element through a parasitic capacitance component of the third amplifier element and the third feedback capacitor.
Soohyun (Fig. 1(a)) teaches coupling signals through parasitic capacitance components and feedback capacitors associated with amplifier stages M1-M4, including cross-coupled capacitor structures Cn1 and Cn2 and associated capacitance coupling paths (page 48, section II.B: “The CCCs make a feedback path for the second-harmonic current”; section II.A “A cross-coupled capacitor (CCC), which has been popularly used to improve both gain and stability of the power amplifier, was used in this CS stage”).
It would have been obvious to one having ordinary skill in the art at the time of the invention was effectively filed to modify Dongho in view of Lin to include the parasitic capacitance coupling and feedback capacitor arrangement taught by Soohyun in order to improve gain stability and suppress second harmonic current effects, because Soohyun expressly teaches that the cross-coupled capacitor feedback paths improve amplifier stability and harmonic behavior.
Regarding claim 12: Dongho, Lin and Soohyun, as applied to claim 11 above, collectively teach the limitations of claim 12 except, wherein the first input signal is input to a gate terminal of the fifth amplifier element, the second input signal is input to a gate terminal of the sixth amplifier element, the first signal, output from a drain terminal of the fifth amplifier element, is input to a source terminal of the first amplifier element, and the second signal, output from a drain terminal of the sixth amplifier element, is input to a source terminal of the second amplifier element.
Soohyun (Fig. 1(a)) teaches input signals applied to gate terminals of common source amplifier transistors M1 and M3, and output signals routed from drain terminals into subsequent amplifier stages including common gate stages M2 and m4 (page 48, section II.A: “A degeneration capacitor(Cd) is used in common-gate (CG) stage to ensure the voltage swings across M2,4 for CG stage and M1,3 for common-source (CS) stage do not exceed the breakdown voltage”; Fig. 1 (a) showing transistor interconnection routing between the CS and CG stages).
It would have been obvious to one having ordinary skill in the art at the time of the invention was effectively filed to modify Dongho in view of Lin to include the signal routing and terminal interconnection arrangement taught by Soohyun in order to improve stacked amplifier operation and voltage distribution between common source and common gate amplifier stages, because Soohyun expressly teaches routing signals between CS and CG transistor stages within the stacked power amplifier structure.
Regarding claim 13: Dongho, Lin and Soohyun, as applied to claim 9 above, collectively teach the limitations of claim 13 except, a first neutralization capacitor having one end, connected to a gate terminal of the fifth amplifier element, and the other end commonly connected to a drain terminal of the sixth amplifier element and a source terminal of the second amplifier element; and a second neutralization capacitor having one end, connected to a gate terminal of the sixth amplifier element, and the other end commonly connected to a drain terminal of the fifth amplifier element and a source terminal of the fifth amplifier element.
Soohyun (Fig. 1(a)) teaches cross-coupled capacitor structures connected between amplifier transistor stages, including cross-coupled capacitors Cn1 and Cn2 coupled between transistor terminals within the stacked amplifier arrangement (page 48, section II.A: “A cross-coupled capacitor (CCC), Cn1,2, was used in this design”; Fig. 1 (a) illustrates cross-coupled capacitor connections between transistor stages M1-M4).
It would have been obvious to one having ordinary skill in the art at the time of the invention was effectively filed to modify Dongho in view of Lin to include the neutralization capacitor arrangement taught by Soohyun in order to improve amplifier gain stability and reduce undesired harmonic effect, because Soohyun expressly teaches that the cross-coupled capacitor structures provide feedback paths used to improve amplifier stability and harmonic behavior.
Regarding claim 14: Dongho, Lin and Soohyun, as applied to claim 9 above, collectively teach the limitations of claim 14 except, an input matching unit configured to perform impedance matching with an external circuit providing the differential input signal; and an output matching unit configured to adjust impedance viewed at a side of a load from output terminals of the third and fourth amplifier elements.
Soohyun teaches input and output matching structures associated with the stacked power amplifier arrangement, including input/output transformers and impedance matching circuitry (page 48, section II, paragraph 2: “The overall PA was designed including the input and output transformers as shown in Fig. 1 (b)”; page 49, section II.B: “For the L-C second-harmonic termination circuit, only shunt inductor is shown in the fundamental frequency for the inter-stage impedance matching due to the virtual ground at the junction [5]. For the C-L second-harmonic termination circuit, shunt capacitor is shown in the fundamental frequency for the load impedance matching”).
It would have been obvious to one having ordinary skill in the art at the time of the invention was effectively filed to modify Dongho in view of Lin to include the impedance matching arrangement taught by Soohyun in order to improve signal transfer efficiency and amplifier performance between amplifier stages and external load circuity, because Soohyun expressly teaches impedances matching structures used with the stacked power amplifier architecture.
Regarding claim 15: Dongho and Lin, as applied to claim 3 above, collectively teach the limitations of claim 15 except for wherein:
Soohyun (Fig.1(a)) teaches a differential stacked power amplifier including common source amplifier stages M1 and M3 and common gate amplifier stages M2 and M4 (page 48, section II.A: “A degeneration capacitor (Cd) is used in common-gate (CG) stage… M2,4… and M1,3 for common-source (CS) stage”; Fig. 1(a) showing differential input signals IN(+) and IN(-) applied to the common source stages).
It would have been obvious to one having ordinary skill in the art at the time of the invention was effectively filed to modify Dongho in view of Lin to incorporate the common source/common gate amplifier arrangement taught by Soohyun in order to improve voltage distribution and amplifier performance within a stacked differential amplifier architecture, because Soohyun expressly teaches the use of CS and CG stages within a differential stacked power amplifier.
Regarding claim 16: Dongho, Lin, and Soohyun, as applied to claim 15 above, collectively teach the limitations of claim 16 except for wherein Soohyun (Fig. 1 (a)), teaches a source terminal of the first amplifier element (M1) and a source terminal of the second amplifier element (M3 )are connected to a ground of the first amplifier element (page 48, section II.A) and a ground of the second amplifier element (M3), respectively, and the multi-stack power amplifier comprising: a first feedback capacitor (Cd) connected between a ground of the third amplifier element (M2) and a gate terminal of the third amplifier element (M2); and a second feedback capacitor (Cd) connected between a ground of the fourth amplifier element (M4) and a gate terminal of the fourth amplifier element (M4), (page 48, section II.A: “A degeneration capacitor (Cd) is used in common-gate (CG) stage M2,4”).
It would have been obvious to one having ordinary skill in the art at the time of the invention was effectively filed to incorporate the degeneration capacitor structures taught by Soohyun into the stacked amplifier architecture of Dongho and Lin to improve voltage distribution and amplifier stability as taught by Soohyun.
Regarding claim 17: All the limitations of claim 16 have been discussed above except for wherein Lin (page 5, paragraph [0043], line 9-10, Page 6, lines 1-5) teaches drain parasitic capacitance of input transistors M1 and M2 and parasitic capacitance neutralization transistors M3 and M4. However, Lin does not teach that the first, second, third, and fourth coupling signals are provided through cross-coupled feedback capacitors forming feedback paths between the amplifier elements.
Soohyun, (Fig. 1(a), page 48, section II.A and B) teaches cross-coupled capacitors Cn1 and Cn2 provide a feedback path whereas, the first coupling signal comprises an output signal of the first amplifier element (M1), coupled to the ground of the first amplifier element through a parasitic capacitance component of the first amplifier element, the second coupling signal comprises an output signal of the fourth amplifier element (M4), coupled to the ground of the fourth amplifier element through a parasitic capacitance component of the fourth amplifier element and the second feedback capacitor (Cn2), the third coupling signal comprises an output signal of the second amplifier element (M3), coupled to the ground of the second amplifier element through a parasitic capacitance component of the second amplifier element, and the fourth coupling signal comprises an output signal of the third amplifier element (M2), coupled to the ground of the third amplifier element through a parasitic capacitance component of the third amplifier element and the first feedback capacitor (Cn1).
It would have been obvious to one having ordinary skill in the art at the time of the invention was effectively filed to incorporate the parasitic capacitance and feedback path structures taught by Lin (paragraph [0043]and Soohyun in order to improve gain and stability, and to mitigate performance degradation associated with parasitic capacitances (Soohyun, page 48, section II.A: “A cross-coupled capacitor (CCC), Cn1,2, which has been popularly used to improve both gain and stability of the power amplifiers, was used in this CS stage”,).
Regarding claim 18: All the limitations of claim 15 have been addressed above except for wherein, Soohyun (page 49, section II.B) teaches an input matching unit configured to perform impedance matching with an external circuit providing the differential input signal (“For the L-C second-harmonic termination circuit, only shunt inductor is shown in the fundamental frequency for the inter-stage impedance matching”); and an output matching unit configured to adjust impedance viewed at a side of a load from output terminals of the third and fourth amplifier elements (“For the C-L second-harmonic termination circuit, shunt capacitor is shown in the fundamental frequency for the load impedance matching”).
It would have been obvious to one having ordinary skill in the art at the time of the invention was effectively filed to modify Yoo in view of Lin and Soohyun to incorporate the impedance matching structures in order to improve signal transfer between amplifier stages and between the amplifier and a load, because Soohyun teaches inter-stage impedance and load impedance matching designing structures without degrading gain and efficiency.
Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Dongho ET AL (An Ultra-Wideband and Compact Active Quasi-Circulator with Phase Alternated Differential Amplifier)
Regarding claim 19: Dongho, Fig. 1(b); Fig. 2(a); Fig. 3 teaches a multi-stack power amplifier having a differential structure, the multi-stack power amplifier comprising (Abstract, line 4: “The proposed active quasi-circulator is based on a differential two-stage distributed amplifier”; Page 287, section III: Differential active Quasi-Circulator Design- “positive (+) and negative (-) node of the second stage amplifier are connected to – and + node of the first stage amplifier”). A first stack comprising a first amplifier element (M1), configured to amplify a first signal having a first phase (Dongho, Fig. 2(a); Fig. 3), and a second amplifier element (M2) configured to amplify a second signal having a phase opposite to the first phase (Dongho, Fig. 2(a); Fig. 3); and a second stack comprising a third amplifier element (M3), configured to amplify an output signal of the first amplifier element (M1) (Dongho, Fig. 3), and a fourth amplifier element (M4) configured to amplify an output signal of the second amplifier element (M2) (Dongho, Fig. 3), wherein the first amplifier element (M1) and the second amplifier element (M2) are cross-coupled to the third amplifier element (M3) and the fourth amplifier element (M4) to form a virtual ground between the first stack and the second stack.
Dongho teaches that “the differential outputs of the phase alternated amplifier in second stage are cross-connected to the differential outputs of the amplifier in first stage”, (Abstract, line 5-8). Furthermore, Yoo discloses (page 286, section II) “the two TX to ANT signals meet in-phase at the ANT port and constructive interference occurs”.
Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to configure the cross-coupled amplifier stages of Dongho such that a virtual ground region is formed between the first stack and the second stack in order to improve signal cancellation, isolation performance, and differential amplifier operation, because Dongho teaches destructive interference of opposite-phase signals and constructive interference of desired signals within the cross-coupled differential architecture.
Conclusion
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NATASHA Y. MARANO
Examiner
Art Unit 2843
/JOHN W POOS/Primary Examiner, Art Unit 2843
Prosecution Insights