DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continuation
The instant application is a continuation of application 17/428,131, now patent 11,953,632.
Information Disclosure Statement
The only document listed in the Information Disclosure Statement (IDS) filed 21 January 2026 was previously listed in the IDS filed 14 November 2025. If a different document was intended, Applicant should file a new IDS listing the document. If a different document was not intended, but was merely unnecessarily listed a second time, no further action is needed.
Response to Amendment
Examiner acknowledges the amendment filed 21 January 2026 wherein: claims 13 and 19 are amended; claim 20 is canceled; claims 1-19 are pending.
Response to Arguments
Applicant’s arguments filed 21 January 2026 have been fully considered but are not persuasive.
Double Patenting Rejections
Regarding the non-statutory double patenting rejections, see the below response regarding the rejection of claim 1 under 35 U.S.C. § 103.
35 U.S.C. § 112(f) Interpretation
Regarding the 35 U.S.C. § 112(f) interpretation of claim 2, Applicant again argues the term “detector elements” is a sufficiently defines a structure to avoid invoking 35 U.S.C. § 112(f). Examiner respectfully disagrees. An “element” is not a specific structure, but rather a generic placeholder. Applicant has not addressed the previous response to arguments in the rejection issued 23 October 2025, which expressly described the three-prong analysis followed to determine interpretation under 35 U.S.C. § 112(f). Accordingly, the claim interpretation under 35 U.S.C. § 112(f) is maintained for the same reasons previously set forth.
35 U.S.C. § 112(d) Rejections
Claim 3
Regarding claim 3, Applicant argues the claim is improperly rejected under 35 U.S.C. § 112(d) because of different claim language. However, the claim language in claim 1, upon which claim 3 depends, inherently requires all of the claim language in claim 3 to be true, as described in more detail in the rejection. Therefore, claim 3 does not further limit the subject matter of a claim upon which it depends, and the rejection is maintained.
35 U.S.C. § 103 Rejections
Claim 1
Regarding claim 1, claim 1 was previously rejected as unpatentable over Spartiotis-’089 (US 6,188,089 B1) in view of Spartiotis-2003 (US 2003/0173522 A1) of Garcia-Sciveres (Garcia-Sciveres, M. and Wermes, N., “A review of advances in pixel detectors for experiments with high rate and radiation”, 2018, Rep. Prog. Phys. 81, 066101 (43pp); a copy is attached to the Notice of Allowance issued 20 December 2023 in parent application 17/428,131).
In response to applicant’s argument that Spartiotis-’089 discloses a non-silicon detector is preferred over a different example of a silicon detector, non-preferred and alternative embodiments constitute prior art. See MPEP § 2123. In this case, while one of ordinary skill in the art may have chosen a non-silicon detector for the cited advantages, Spartiotis-’089 specifically describes a working example of using a silicon detector, reasonable suggesting both embodiments to one of ordinary skill in the art.
In response to applicant's arguments against the references individually, one cannot show nonobviousness by attacking references individually where the rejections are based on combinations of references. See MPEP § 2145(IV). The test for obviousness is not whether the features of a secondary reference may be bodily incorporated into the structure of the primary reference; nor is it that the claimed invention must be expressly suggested in any one or all of the references. Rather, the test is what the combined teachings of the references would have suggested to those of ordinary skill in the art. See MPEP § 2145(III). Applicant identifies features (electrode configuration) in the cited prior art invention which differ from those of the claimed invention or from each other, or that the specific configurations incompatible with each other. However, bodily incorporation of incompatible features is not required. The combined teachings of the references suggest the claimed invention as described in the rejection, including hybrid bonding. Accordingly, the rejection is maintained.
Claims 2-19
Regarding claims 2-19, see the above response regarding claim 1.
Claim Interpretation
The following is a quotation of 35 U.S.C. § 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. § 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
Claim(s) 2 is/are interpreted under 35 U.S.C. § 112(f) or pre-AIA 35 U.S.C. § 112, sixth paragraph.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. § 112(f) or pre-AIA 35 U.S.C. § 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. § 112(f) or pre-AIA 35 U.S.C. § 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. § 112(f) or pre-AIA 35 U.S.C. § 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. § 112(f) or pre-AIA 35 § U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. § 112(f) or pre-AIA 35 U.S.C. § 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. § 112(f) or pre-AIA 35 U.S.C. § 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. § 112(f) or pre-AIA 35 U.S.C. § 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 § U.S.C. 112(f) or pre-AIA 35 U.S.C. § 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. § 112(f) or pre-AIA 35 U.S.C. § 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. § 112(f) or pre-AIA 35 U.S.C. § 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. § 112(f) or pre-AIA 35 U.S.C. § 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. § 112(f) or pre-AIA 35 U.S.C. § 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. § 112(f) or pre-AIA 35 U.S.C. § 112, sixth paragraph.
Regarding claim 2, the claim recites the limitation “detector elements” which uses a generic placeholder (“elements”) that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Accordingly, this limitation is interpreted under 35 U.S.C. § 112(f) as corresponding to pixels (Applicant’s specification, page 7, lines 17-20) and equivalents thereof.
Claim Rejections — 35 U.S.C. § 112
The following is a quotation of 35 U.S.C. 112(d):
(d) REFERENCE IN DEPENDENT FORMS.—Subject to subsection (e), a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers.
Claim 3
Claim 3 rejected under 35 U.S.C. § 112(d) as being of improper dependent form for failing to further limit the subject matter of the claim upon which it depends, or for failing to include all the limitations of the claim upon which it depends.
Regarding claim 3, the only further recitation in the claim beyond its dependence on claim 1 is “wherein the X-ray detector chip and the CMOS read-out circuit chip are connected by at least one hybrid bond.” However, claim 1 recites “the charge collecting electrodes [of the X-ray detector chip] and the connection electrodes [of the CMOS read-out circuit chip] are connected by hybrid bonding of their flat surfaces”. Accordingly, claim 3 fails to further limit the subject matter of the claim upon which it depends (claim 1) because the claimed hybrid bonding in claim 3 is necessarily present in the claimed hybrid bonding in claim 1.
Applicant may cancel the claim(s), amend the claim(s) to place the claim(s) in proper dependent form, rewrite the claim(s) in independent form, or present a sufficient showing that the dependent claim(s) complies with the statutory requirements.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-5, 8, 14-15, and 17-19
Claims 1-5, 8, 14-15, and 17-19 are rejected under 35 U.S.C. 103 as being unpatentable over Spartiotis-’089 (US 6,188,089 B1) in view of Spartiotis-2003 (US 2003/0173522 A1) and Garcia-Sciveres (Garcia-Sciveres, M. and Wermes, N., “A review of advances in pixel detectors for experiments with high rate and radiation”, 2018, Rep. Prog. Phys. 81, 066101 (43pp); a copy is attached to the Notice of Allowance issued 20 December 2023 in parent application 17/428,131).
Claim 1
Regarding claim 1, Spartiotis-’089 discloses an X-ray detector component comprising: an X-ray detector chip (10) made from a silicon substrate (11) and comprising charge collecting electrodes (13); the X-ray detector chip (10) being suitable for providing an X-ray-dependent current at the charge collecting electrodes (11); a CMOS read-out circuit chip (32) comprising connection electrodes (40), wherein the X-ray detector chip (10) and the CMOS read-out circuit chip (32) are mechanically and electrically connected (via 42) in such a manner that the charge collecting electrodes (11) and the connection electrodes (40) are electrically connected (by solder 42; silicon substrate: col. 1 ln. 50-56; configuration of elements: col. 5 ln. 51 - col. 6 ln. 19, fig. 3), wherein the X-ray-detector chip is free of GaAs, CdTe, and CdZnTe, (i.e., the X-ray detector component uses silicon for the detection material as described above; Spartiotis-’089 does not disclose use of GaAs, CdTe, or CdZnTe).
Spartiotis-’089 does not expressly disclose the charge collecting electrodes are larger than and overlap the connection electrodes. However, such a configuration is routine and conventional in the art. For example, Spartiotis-2003 discloses charge collecting electrodes (116) are larger than and overlap connection electrodes (134; ¶¶ 40-41, Fig. 4).
It would have been obvious to one of ordinary skill in the art at the time Applicant’s invention was filed to have modified the invention of Spartiotis-’089 in view of the teachings of Spartiotis-2003 so that the charge collecting electrodes are larger than and overlap the connection electrodes. However, such a configuration is routine and conventional in the art.
One would have been motivated to do so to gain an advantage recited in Spartiotis-2003 of “having an effective charge collecting surface at least as large as the area of the pixel surface” (Spartiotis-2003, ¶ 41).
Spartiotis-’089 modified further teaches the X-ray detector chip (10) and the CMOS read-out circuit chip (32) are connected by solder (42; silicon substrate: Spartiotis-’089, col. 1 ln. 50-56; configuration of elements: col. 5 ln. 51 - col. 6 ln. 19, fig. 3).
Spartiotis-’089 modified does not expressly disclose the charge-collecting electrodes of the X-ray detector chip and the connection electrodes of the CMOS read-out circuit chip are connected hybrid bonding of their flat surfaces.
However, various connection means, including hybrid bonding, were known bonding techniques in the art. For example, Garcia-Sciveres discloses various bonding techniques were known for hybrid pixel detectors (section 3 “Pixel sensors and hybridization”, section 3.3 “Bonding techniques”), including using indirect contact (via solder bumps; section 3.3.1 “Solder bumps and bonding”; fig. 13 and caption) and direct contact (3.3.4 “Cu-Cu direct bonding”), with the hybrid bonding by bringing flat surfaces into contact as disclosed by Garcia-Sciveres corresponding to the description of hybrid bonding in Applicant’s specification, page 12, lines 5-16).
Therefore, it would have been obvious to one of ordinary skill in the art at the time Applicant’s invention was filed to have further modified the invention of Spartiotis-’089 in view of the teachings of Garcia-Sciveres so that the charge-collecting electrodes of the X-ray detector chip and the connection electrodes of the CMOS read-out circuit chip are connected hybrid bonding of their flat surfaces.
The simple substitution of one known element for another to obtain predictable results has been held to be obvious. See MPEP 2143(I)(B) and 2144.06. In this case, the simple substitution of indirect bonding for direct bonding achieves the predictable result of providing an alternate means for mechanical and electrical bonding. One would have been motivated to perform the substitution to avoid the need for intermediate material, as disclosed by Garcia-Sciveres (section 3.3.4 “Cu-Cu direct bonding”, first two paragraphs: “Metal-metal adhesion (Cu-Cu or Au-Au) of flat and polished surfaces has been known for a long time … Two mirror-polished wafers are put into contact and held together by adhesive forces without any intermediate material”).
Claim 2
Regarding claim 2, Spartiotis-’089 modified teaches the X-ray detector component according to claim 1, wherein the X-ray detector chip (10) comprises a plurality of detector elements (34; Spartiotis-’089, col. 5 ln. 51 - col. 6 ln.19, fig. 3).
Claim 3
Regarding claim 3, see the rejection of claim 1 above.
Claim 4
Regarding claim 4, Spartiotis-’089 modified teaches the X-ray detector component according to claim 1, wherein the X-ray detector chip (10) and the CMOS read-out circuit chip (32) are connected by solder means (42; silicon substrate: col. 1 ln. 50-56; configuration of elements: Spartiotis-’089, col. 5 ln. 51 - col. 6 ln. 19, fig. 3).
Claim 5
Regarding claim 5, Spartiotis-’089 modified teaches the X-ray detector component according to claim 1, wherein the X-ray detector chip (10) comprises a direct X-ray detector (i.e., using silicon substrate 11; Spartiotis-’089, col. 1 ln. 22-56).
Claim 8
Regarding claim 8, Spartiotis-’089 modified teaches the X-ray detector component according to claim 1, wherein the charge collecting electrodes (13) are formed in such a manner that field lines between a top electrode (12) of the X-ray detector chip (10) and the charge collecting electrodes (13) are curved towards the charge collecting electrodes (13; the field lines are inherent to the structure shown in fig. 3 of Spartiotis-’089 and the operation described in col. 5 ln. 51 - col. 6 ln.19 of Spartiotis-’089; that is, with the described voltages and configuration of elements in Spartiotis-’089, the field lines between 12 and 13 are necessarily curved towards 13).
Claim 14
Regarding claim 14, Spartiotis-’089 modified teaches the X-ray detector component according to claim 1, wherein the X-ray-detector chip (10) comprises a top electrode (12) arranged on a top side of the detector chip and the charge collecting electrodes (13) are arranged on a bottom side of the detector chip (Spartiotis-’089, col. 5 ln. 51 - col. 6 ln.19, fig. 3).
Claim 15
Regarding claim 15, Spartiotis-’089 modified teaches the X-ray detector component according to claim 1, wherein the silicon substrate is fully depleted (Garcia-Sciveres discloses pixel detectors (section 3 “Pixel sensors and hybridization”), wherein a silicon substrate is fully depleted (section 6)).
It would have been obvious to one of ordinary skill in the art at the time Applicant’s invention was filed to have further modified the invention of Spartiotis-’089 in view of the further teachings of Garcia-Sciveres so that the silicon substrate is fully depleted.
One would have been motivated to do so to gain an advantage recited in Garcia-Sciveres of achieving high speed and high collection efficiency (Garcia-Sciveres, section 6, second paragraph).
Claim 17
Regarding claim 17, Spartiotis-’089 modified teaches an X-ray detection module comprising a multitude of X-ray detector components (34) according to claim 1 (Spartiotis-’089, col. 5 ln. 51 - col. 6 ln. 19, fig. 3).
Claim 18
Regarding claim 18, Spartiotis-’089 modified teaches an imaging device (30) comprising an X-ray detection module according to claim 17 (Spartiotis-’089, col. 5 ln. 51 - col. 6 ln. 19, fig. 3).
The further limitation of claim 19 “the imaging device being an imaging medical device for mammography or dental X-raying, or a screening device for material failure analysis or baggage scanning or packet scanning” does not carry patentable weight as only intended use (medical imaging or screening) is recited which imparts no specific further structure to the imaging device. See MPEP § 2111.02(II).
Claim 19
Regarding claim 19, Examiner refers to the rejections of claim 1 and 17 above, mutatis mutandis.
Claims 6-7
Claims 6-7 are rejected under 35 U.S.C. 103 as being unpatentable over Spartiotis-’089 in view of Spartiotis-2003 and Garcia-Sciveres as applied to claim 1 above, and further in view of Arendonl (US 2016/0141318 A1).
Regarding claims 6-7, Spartiotis-’089 modified teaches the X-ray detector component according to claim 1, but does not expressly disclose the X-ray detector chip comprises a single-photon avalanche photodiode (which is a single-photon detector).
Arendonl discloses an x-ray detector comprising a single-photon avalanche photodiode (¶ 18-19, 29, fig. 2).
It would have been obvious to one of ordinary skill in the art at the time Applicant’s invention was filed to have further modified the invention of Spartiotis-’089 in view of the teachings of Arendonl so that the X-ray detector chip comprises a single-photon avalanche photodiode.
One would have been motivated to do so to use a detector structure with relatively high sensitivity as compared to other detector structures.
Claims 9-10
Claims 9-10 are rejected under 35 U.S.C. 103 as being unpatentable over Spartiotis-’089 in view of Spartiotis-2003 and Garcia-Sciveres as applied to claim 1 above, and further in view of Hosack (US 5,159,419).
Regarding claims 9-10, Spartiotis-’089 modified teaches the X-ray detector component according to claim 1, but does not expressly disclose trenches extend between the charge collecting electrodes, wherein the trenches are filled with a non-conducting material.
Hosack discloses an x-ray detector wherein trenches extend between detector cells, wherein the trenches are filled with a non-conducting material (silicon dioxide; Abstract, claims 1-2, 6).
It would have been obvious to one of ordinary skill in the art at the time Applicant’s invention was filed to have further modified the invention of Spartiotis-’089 in view of the further teachings of Hosack so that trenches extend between the charge collecting electrodes, wherein the trenches are filled with a non-conducting material.
One would have been motivated to do so to gain an advantage recited in Hosack of providing isolation between detector cells (Hosack, col. 2 ln. 33-41).
Claims 11-13
Claims 11-13 are rejected under 35 U.S.C. 103 as being unpatentable over Spartiotis-’089 in view of Spartiotis-2003 and Garcia-Sciveres as applied to claim 1 above, and further in view of Jin (US 2018/0192977 A1).
Claims 11 and 13
Regarding claims 11 and 13, Spartiotis-’089 modified teaches the X-ray detector component according to claim 1, wherein the X-ray-detector chip uses silicon (see rejection of claim 1 above), wherein the X-ray detector chip is configured to detect X-ray energies greater than 10 keV (Spartiotis-’089, col. 1 ln. 50-56).
Spartiotis-’089 modified not expressly disclose using silicon to detect X-ray energies in a range between 25 keV and 35 keV (which are energies less than 100 keV). That is, while Spartiotis-’089 modified teaches detecting X-ray energies greater than 10 keV as described above, Spartiotis-’089 modified does not expressly recite an example energy in the range of 25 to 35 keV.
However, detecting energies in a range of 25 to 35 keV was well-known and commonly performed in the art. For example, Jin discloses an X-ray detector which uses silicon to detect an X-ray energy of between 25 keV and 35 keV (all energies between 13 keV and 40 keV; ¶ 43, fig. 5)
It would have been obvious to one of ordinary skill in the art at the time Applicant’s invention was filed to have further modified the invention of Spartiotis-’089 in view of the teachings of Jin so that to detect X-ray in a range between 25 keV and 35 keV.
One would have been motivated to do so to gain an advantage recited in Jin of being able to detect scattered high-energy photons (Jin, ¶ 43).
Claim 12
Regarding claim 12, Spartiotis-’089 modified teaches the X-ray detector component according to claim 1, but does not expressly disclose the CMOS read-out circuit chip comprises a photon counter circuit.
Jin discloses an X-ray detector component performs photon counting (¶ 25).
It would have been obvious to one of ordinary skill in the art at the time Applicant’s invention was filed to have further modified the invention of Spartiotis-’089 in view of the teachings of Jin so that the CMOS read-out circuit chip comprises a photon counter circuit.
One would have been motivated to do so to gain an advantage recited in Jin of providing spectral information that is not available with conventional energy-integrating detectors (Jin, ¶ 25).
Claim 16
Claims 16 is rejected under 35 U.S.C. 103 as being unpatentable over Spartiotis-’089 in view of Spartiotis-2003 and Garcia-Sciveres as applied to claim 1 above, and further in view of Deptuch (Deptuch, G.W. et al., "Fully 3-D Integrated Pixel Detectors for X-Rays", 2016, IEEE TRANSACTIONS ON ELECTRON DEVICES, vol. 63, no. 1, pages 205-214; a copy is included with the Information Disclosure Statement filed 03 August 2021 issued in parent application 17/428,131).
Regarding claim 16, Spartiotis-’089 modified teaches the X-ray detector component according to claim 1, but does not expressly disclose a back end of line of the CMOS read-out circuit chip faces the X-ray detector chip.
Deptuch discloses an X-ray detector component comprising an X-ray detector chip made from a silicon substrate and comprising charge collecting electrodes; the X-ray detector chip being suitable for providing an X-ray-dependent current at the charge collecting electrodes; a CMOS read-out circuit chip comprising connection electrodes, wherein the X-ray detector chip and the CMOS read-out circuit chip are mechanically and electrically connected in such a manner that the charge collecting electrodes and the connection electrodes are electrically connected (Abstract, pp. 206-207, fig. 1a, 2; Deptuch discloses in fig. 2 a silicon based X-ray detector chip ("SENSOR") connected to a CMOS read out chip ("ROIG" page 206 right col. Sect. C second sentence) via sensor and ROIG direct bonding interface ("DBI")),
wherein a back end of line of the CMOS read-out circuit chip faces the X-ray detector chip (see fig. 1a: top BIAS plane and opposing collecting electrodes).
It would have been obvious to one of ordinary skill in the art at the time Applicant’s invention was filed to have further modified the invention of Spartiotis-’089 in view of the further teachings of Deptuch so that a back end of line of the CMOS read-out circuit chip faces the X-ray detector chip.
One would have been motivated to do so to avoid the need for etching through the CMOS read-out circuit chip (by staying at the top side in fig. 3 of Spartiotis-’089).
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-3 and 5-19
Claims 1-3 and 5-19 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-18 of U.S. Patent No. 11,953,632 in view of Spartiotis-’089 (US 6,188,089 B1), Spartiotis-2003 (US 2003/0173522 A1), and Garcia-Sciveres (Garcia-Sciveres, M. and Wermes, N., “A review of advances in pixel detectors for experiments with high rate and radiation”, 2018, Rep. Prog. Phys. 81, 066101 (43pp); a copy is attached to the Notice of Allowance issued 20 December 2023 in parent application 17/428,131).
Although the claims at issue are not identical, they are not patentably distinct from each other because the reference claims anticipate or render obvious, in view of Spartiotis-’089, Spartiotis-2003, and Garcia-Sciveres (see 35 U.S.C. § 103 rejection of claim 1 above) the instant claims as follows:
Instant claim(s)
Reference claim(s)
1
1 in view of Spartiotis-’089, Spartiotis-2003 and Garcia-Sciveres
2-3
2-3
5-12
4-11
13-18
13-18
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Spivey (US 5,528,043 A) discloses an x-ray detector comprised of a radiation-absorbing layer sandwiched between an array of CMOS integrated circuits (pixel circuits) and a surface electrode layer transparent to the radiation, wherein each of the pixel circuits in the array has a charge collecting electrode, an external voltage applied between the surface electrode layer and the charge collecting electrodes produces an electric field across the thickness of the absorbing layer, radiation passing through the transparent surface electrode layer is absorbed in the absorbing layer creating electron/hole pairs in the absorbing layer, a portion of the liberated holes (or electrons) migrates under the influence of the electric field toward the charge collecting electrodes, which collect the holes and store them as charges on small capacitors located within each circuit, wherein this process results in a discrete distribution of stored voltages across the array proportional to the distribution of radiation photons incident on the absorbing layer, circuitry in each pixel provides for the voltage on each pixel capacitor to be recorded via readout circuitry and permits the resetting of the pixel capacitors (Abstract).
Spartiotis-2015 (US 2017/0285190 A1) discloses a direct conversion, semiconductor x-ray imaging device where the detector substrate is bump bonded to the readout substrate, wherein X-rays (or other type of radiation) impinges upon the detector and electron-holes pairs are created inside the detector substrate (thus the term “direct conversion”) in response to the absorbed energy, wherein under the influence of an electric field applied across the detector these electrons (holes) are transferred to charge collection electrodes, wherein the charge collection electrodes are connected to corresponding readout electrodes on a readout substrate, which act as the input to a readout pixel on the readout substrate, wherein the connection is made via bumps and the known flip-chip bonding technique (¶ 1).
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Blake C. Riddick, Ph.D.
Primary Examiner
Art Unit 2884
/BLAKE C RIDDICK/Primary Examiner, Art Unit 2884