Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 02/20/2025, 03/07/2024 was filed. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
This office action is in response to the application serial number 18/599,014 filed on 03/07/2024.
Claims 1-10, 11, 12-16, 17-20 are pending.
Claim Objections
Claim 16 is objected to because of the following informalities: “a length of the at least on second synchronization sequence;” should be replaced by ---- a length of the at least on second synchronization sequence. ------. Clarification and Appropriate correction is required.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 2, 7, 11, 12, 13, 17, 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Fong et al. ( US 20210050988, hereinafter, Fong’s 988) in view of Li et al. ( US 20230224057, hereinafter, Li’s 057 ).
Regarding to the claim 1, US 20210050988 teaches a method for wireless communication, comprising:
transmitting, by a terminal device, a data frame, wherein at least one synchronization sequence (synchronization messages, synchronization sequence, clock synchronization ) [see Paragraphs 0141 & 0136 & 0132 & 0137 & 0142 ] is received during a process of transmitting the Ethernet frame (transmitting the Ethernet frame) [see Paragraph 0091 & 0092 ] .
However, US 20210050988 does not explicitly teach the data frame.
US 20230224057, from the same or similar fields of endeavor, teaches transmitting, by a master node, a data frame ( information frame ) , wherein at least one clock synchronization is received during a process of transmitting the information frame [see Paragraph 0093].
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing data of the claimed invention to modify the system of US 20210050988 in view of US 20230224057 because US 20230224057 suggests that it is desirable that clock synchronization be made among the 100 host machines so that all 100 machines are synchronized to the same clock.
Regarding to the claim 2, US 20210050988 further teaches wherein transmitting, by the terminal device, the data frame comprises: sending, by the terminal device, a first data frame, wherein at least one first synchronization sequence is received during a process of sending the first data frame ( wherein transmitting, by the terminal device, the data frame comprises: sending, by the terminal device, a first data frame, wherein at least one first synchronization sequence is received during a process of sending the first data frame) [see Paragraphs 0086 & 0091 & 0132 & 0134 & 0136 & 0104 & 0115 & 0123 & 0131 & 0141 & 0137 & 0142 ].
Regarding to the claim 7, US 20210050988 further teaches wherein there is a first time interval between a time position corresponding to data in the first data frame and a time position corresponding to the first synchronization sequence; wherein the first time interval is configured by a network device or pre-configured (wherein there is a first time interval between a time position corresponding to data in the first data frame and a time position corresponding to the first synchronization sequence; wherein the first time interval is configured by a network device or pre-configured ) [see Paragraphs 0086 & 0091 & 0132 & 0134 & 0136 & 0104 & 0115 & 0123 & 0131 & 0141 & 0137 & 0142 ].
Regarding to the claim 11, US 20210050988 teaches a method for wireless communication, comprising:
sending, by a network device, at least one synchronization sequence (synchronization messages, synchronization sequence, clock synchronization ) [see Paragraphs 0141 & 0136 & 0132 & 0137 & 0142 ] during a process of transmitting the Ethernet frame (transmitting the Ethernet frame) [see Paragraph 0091 & 0092 ] .
However, US 20210050988 does not explicitly teach the data frame.
US 20230224057, from the same or similar fields of endeavor, teaches sending , by a master node, at least one clock synchronization is received during a process of transmitting the data frame ( information frame ) [see Paragraph 0093].
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing data of the claimed invention to modify the system of US 20210050988 in view of US 20230224057 because US 20230224057 suggests that it is desirable that clock synchronization be made among the 100 host machines so that all 100 machines are synchronized to the same clock.
Regarding to the claim 12, US 20210050988 teaches a terminal device, comprising: a memory, configured to store a computer program; and a processor, configured to call and run the computer program stored in the memory to:
Transmit a data frame, wherein at least one synchronization sequence (synchronization messages, synchronization sequence, clock synchronization ) [see Paragraphs 0141 & 0136 & 0132 & 0137 & 0142 ] is received during a process of transmitting the Ethernet frame (transmitting the Ethernet frame) [see Paragraph 0091 & 0092 ] .
However, US 20210050988 does not explicitly teach the data frame.
US 20230224057, from the same or similar fields of endeavor, teaches transmitting a data frame ( information frame ) , wherein at least one clock synchronization is received during a process of transmitting the information frame [see Paragraph 0093].
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing data of the claimed invention to modify the system of US 20210050988 in view of US 20230224057 because US 20230224057 suggests that it is desirable that clock synchronization be made among the 100 host machines so that all 100 machines are synchronized to the same clock.
Regarding to the claim 13, US 20210050988 further teaches send a first data frame, wherein at least one first synchronization sequence is received during a process of sending the first data frame (send a first data frame, wherein at least one first synchronization sequence is received during a process of sending the first data frame
) [see Paragraphs 0086 & 0091 & 0132 & 0134 & 0136 & 0104 & 0115 & 0123 & 0131 & 0141 & 0137 & 0142 ].
Regarding to the claim 17, US 20210050988 teaches A network device, comprising: a memory, configured to store a computer program; and a processor, configured to call and run the computer program stored in the memory to:
Send at least one synchronization sequence (synchronization messages, synchronization sequence, clock synchronization ) [see Paragraphs 0141 & 0136 & 0132 & 0137 & 0142 ] during a process of transmitting the Ethernet frame (transmitting the Ethernet frame) [see Paragraph 0091 & 0092 ] .
However, US 20210050988 does not explicitly teach the data frame.
US 20230224057, from the same or similar fields of endeavor, teaches send at least one clock synchronization is received during a process of transmitting the data frame ( information frame ) [see Paragraph 0093].
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing data of the claimed invention to modify the system of US 20210050988 in view of US 20230224057 because US 20230224057 suggests that it is desirable that clock synchronization be made among the 100 host machines so that all 100 machines are synchronized to the same clock.
Regarding to the claim 18, US 20210050988 further teaches send at least one first synchronization sequence during a process of receiving a first data frame (send at least one first synchronization sequence during a process of receiving a first data frame) [see Paragraphs 0086 & 0091 & 0132 & 0134 & 0136 & 0104 & 0115 & 0123 & 0131 & 0141 & 0137 & 0142 ].
Allowable Subject Matter
Claims 3, 4, 5, 6 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is an examiner’s statement of reasons for allowance:
The prior art fails to disclose wherein the configuration information of the at least one first synchronization sequence is used to configure at least one of the following: a position of the at least one first synchronization sequence in the process of sending the first data frame; a number of the at least one first synchronization sequence; or a length of the at least one first synchronization sequence.
Claims 8, 9 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is an examiner’s statement of reasons for allowance:
The prior art fails to disclose wherein the configuration information of the at least one second synchronization sequence is used to configure at least one of the following: a position of the at least one second synchronization sequence in the process of receiving the second data frame; a number of the at least one second synchronization sequence; or a length of the at least one second synchronization sequence; wherein the position of the at least one second synchronization sequence in the process of receiving the second data frame comprises: an initial position of the second synchronization sequence in the process of receiving the second data frame; and/or a middle position of the second synchronization sequence in the process of receiving the second data frame.
Claim 10 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is an examiner’s statement of reasons for allowance:
The prior art fails to disclose wherein the synchronization capability information of the terminal device comprises at least one of the following: synchronization error information of the terminal device, or a maximum transmission duration corresponding to a maximum time error range allowed by the terminal device; wherein the terminal device obtains power for transmission through power harvesting.
Claims 14, 15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is an examiner’s statement of reasons for allowance:
The prior art fails to disclose wherein the configuration information of the at least one first synchronization sequence is used to configure at least one of the following: a position of the at least one first synchronization sequence in the process of sending the first data frame; a number of the at least one first synchronization sequence; or a length of the at least one first synchronization sequence.
Claim 16 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is an examiner’s statement of reasons for allowance:
The prior art fails to disclose wherein the configuration information of the at least one first synchronization sequence is used to configure at least one of the following: a position of the at least one first synchronization sequence in the process of sending the first data frame; a number of the at least one first synchronization sequence; or a length of the at least one first synchronization sequence.
Claims 19, 20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is an examiner’s statement of reasons for allowance:
The prior art fails to disclose wherein the configuration information of the at least one first synchronization sequence is used to configure at least one of the following: a position of the at least one first synchronization sequence in a process of sending the first data frame; a number of the at least one first synchronization sequence; or a length of the at least one first synchronization sequence.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHUONG T HO whose telephone number is (571)272-3133. The examiner can normally be reached 7:30-4:00.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Charles C Jiang can be reached at 571-270-7191. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/CHUONG T HO/Examiner, Art Unit 2412