Prosecution Insights
Last updated: April 19, 2026
Application No. 18/599,360

Arrangement For Current Sharing Of Parallel-Connected Inverters

Non-Final OA §103§112
Filed
Mar 08, 2024
Examiner
HAUSMAN, JARED RAYMOND
Art Unit
2838
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
ABB Schweiz AG
OA Round
1 (Non-Final)
100%
Grant Probability
Favorable
1-2
OA Rounds
2y 8m
To Grant
99%
With Interview

Examiner Intelligence

Grants 100% — above average
100%
Career Allow Rate
2 granted / 2 resolved
+32.0% vs TC avg
Minimal +0% lift
Without
With
+0.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
11 currently pending
Career history
13
Total Applications
across all art units

Statute-Specific Performance

§103
45.8%
+5.8% vs TC avg
§102
22.9%
-17.1% vs TC avg
§112
31.3%
-8.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 2 resolved cases

Office Action

§103 §112
DETAILED ACTION This action is in response to the application filed 03/08/2024. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statement (IDS) was submitted on 03/08/2024. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Specification The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification. Claim Objections Claim 1 objected to because of the following informalities: Regarding claim 1, it appears that “each of the inverters” should read “each of the two or more inverters” Appropriate correction is required. A series of singular dependent claims is permissible in which a dependent claim refers to a preceding claim which, in turn, refers to another preceding claim. A claim which depends from a dependent claim should not be separated by any claim which does not also depend from said dependent claim. It should be kept in mind that a dependent claim may refer to any preceding independent claim. In general, applicant's sequence will not be changed. See MPEP § 608.01(n). Regarding claim 7, claim 7 depends on claim 11 which does not precede it. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-10, are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Regarding claim 1, it’s not clear if “a commutation” (line 12) refers to “commutations” (line 6). Regarding claim 1, it’s not clear if “switching instants” (lines 15 & 20) refer to “switching instants” (line 9). Regarding claim 2, it’s not clear if “switching instants” (lines 3 & 7) refer to “switching instants” (claim 1, line 9). Regarding claim 3, it’s not clear if “the switching instant” (lines 3, 6, 8, & 9) refer to “switching instants” (claim 1, line 9). Regarding claim 3, it’s not clear if “at least one other parallel-connected inverter leg” (line 10) refers to “the other parallel-connected inverter leg” (line 21). Regarding claim 4, it’s not clear if “all commutations” (line 3) refers to “commutations” (claim 1, line 6). Regarding claim 6, it’s not clear if “the commutation” (line 3) and “an individual commutation” (lines 4 & 6) refer to “commutations” (claim 1, line 6). Regarding claim 7, it’s not clear if “the commutation” (line 3) and “an individual commutation” (lines 4 & 7) refer to “commutations” (claim 1, line 6). Regarding claim 16, it’s not clear if “all commutations” (line 3) refers to “commutations” (claim 11, line 6). Regarding claim 18, it’s not clear if “the commutation” (line 3) and “an individual commutation” (lines 4 & 6) refer to “commutations” (claim 11, line 6). Regarding claim 19, it’s not clear if “the commutation” (line 3) and “an individual commutation” (lines 4 & 7) refer to “commutations” (claim 11, line 6). Claims 8, 9 and 13 are also rejected to under 35 U.S.C. 112(b), for being dependent on a rejected claim under 35 U.S.C. 112(b). There is insufficient antecedent basis in claims 1-5, 10-12, & 14-17 below: Regarding claim 1, it appears that “the respective parallel-connected inverter leg” (lines 18 & 20) lacks antecedent basis. Regarding claim 1, it appears that “the other parallel-connected inverter leg” (line 21) lacks antecedent basis. Regarding claim 1, it appears that “the main switches” (line 21) lacks antecedent basis. Regarding claim 2, it appears that “the negative difference” (line 4) lacks antecedent basis. Regarding claim 2, it appears that “the positive difference” (line 8) lacks antecedent basis. Regarding claims 3 and 14, it appears that “the sign” (line 1) lacks antecedent basis. Regarding claims 4, 5, 16, and 17, it appears that “the sensing” (line 2) lacks antecedent basis. Regarding claim 10, it appears that “the autonomous adjustment” (line 4) lacks antecedent basis. Regarding claim 11, it appears that “the duration” (line 15) and “the sense” (line 15) lacks antecedent basis. Regarding claim 12, it appears that “the integral” (line 1) lacks antecedent basis. Regarding claim 15, it appears that “the sign” (line3) lacks antecedent basis. Claims 6-9, 13, 18 and 19 are also rejected to under 35 U.S.C. 112(b), for being dependent on a rejected claim under 35 U.S.C. 112(b). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-7, 9, 11, & 16-19 are rejected under 35 U.S.C. 103 as being unpatentable over US. Doc. ID 9281761B2 (hereinafter Wagoner) in view of CN Doc. ID 107346947A (hereinafter Li). Regarding claim 1, Wagoner discloses a power inverter system [e.g. Fig 1, element 120], comprising: two or more switching mode inverter legs [e.g. Fig. 2, elements 136 & 138] connected in parallel [e.g. abstract, “parallel bridge circuits in a power converter system”] between a common DC input [e.g. Fig. 2, element 124] and a common phase output [e.g. Fig. 1, phase connections to element 160] to feed a phase output current [e.g. paragraph 0002,”a power generation system can include a power converter for producing alternating current (AC)”] to a common load [e.g. Fig. 2, element 160], the phase output current being formed by combined leg output currents of the parallel-connected inverter legs [e.g. Fig. 2, current flowing through elements L1-L6 into phase input of element 160], wherein commutations of the parallel-connected inverter legs are initiated by essentially simultaneous commutation commands [e.g. paragraph 0009, “The control system further includes a control circuit configured to adjust the nominal switch time for the one or more control commands based at least in part on a timing difference adjustment determined for at least one of the switching elements of the plurality of bridge circuits”], a control arrangement configured to balance current sharing between the parallel-connected inverter legs [e.g. abstract, “a control scheme for reducing current imbalance between the parallel bridge circuits”] by means of adjusting switching instants of main switches of the parallel-connected inverter legs [e.g. paragraph 0008, ”The method includes … analyzing the switch timing of each switching element to determine a timing difference adjustment for one or more of the switching elements of the plurality of bridge circuits”], wherein the control arrangement is configured to sense the leg output current in each of the parallel-connected inverter legs[e.g. Fig. 2, element 150], and wherein the control arrangement is configured to adjust switching instants of the main switches for subsequent commutation autonomously in each of the parallel-connected inverter legs based on a difference between the pre-commutation and the post-commutation current values of the respective parallel-connected inverter leg to control the difference towards zero [e.g. paragraph 0051, “The nominal switch time specified by the control command can be further adjusted based on the bridge current of the plurality of bridge circuits ( 368 ). For instance, the nominal switch time can be adjusted to reduce or minimize a difference between the bridge current of the plurality of bridge circuits coupled in parallel”], the difference being representative of a timing difference between switching instants of the respective parallel-connected inverter leg and at least one of the other parallel-connected inverter legs [e.g. paragraph 0051, “the nominal switch time can be adjusted to reduce or minimize a difference between the bridge current of the plurality of bridge circuits coupled in parallel”]. Wagoner fails to disclose a control arrangement configured to sense the leg output current before and after a commutation to obtain a pre-commutation current value and a post-commutation current value. Li teaches a control arrangement [abstract, “The invention discloses an inverter control circuit with constant pulse width output and an operation mode thereof used for realizing the unipolar operation of an inverter”; ] configured to sense the leg output current before and after a commutation to obtain a pre-commutation current value and a post-commutation current value [e.g. paragraph 0029, “inverter control circuit of the present invention operates in the following modes: start → sampling voltage pulse, inductor current, capacitor voltage → voltage pulse inversion → microprocessor sampling, calculation → overcurrent overvoltage? - No → Generate a sinusoidal reference voltage → Summation of integral operation → Compare XOR operation → Trigger monostable trigger → Generate drive signal, drive inverter → Return to sample voltage pulse, inductor current, capacitor voltage”]. It would be obvious to one having ordinary skill in the art, before the effective filing date of the claimed invention, to modify Wagoner by wherein the power inverter system further includes a control arrangement configured to sense the leg output current before and after a commutation to obtain a pre-commutation current value and a post-commutation current value as taught by Li in order to suppress load variation and improve input voltage regulation. Regarding claim 2, Wagoner discloses the power inverter system as claimed in claim 1, wherein the control arrangement [e.g. Fig. 2, element 115] is configured to adjust switching instants for subsequent commutation so as to increase the negative current difference towards zero, and wherein the control arrangement is configured to adjust switching instants for subsequent commutation so as to decrease the positive current difference towards zero [e.g. paragraph 0051, “the nominal switch time can be adjusted to reduce or minimize a difference between the bridge current of the plurality of bridge circuits coupled in parallel”]. Wagoner fails to disclose wherein the pre-commutation and post-commutation current values are measured. Li teaches an inverter system wherein the pre-commutation and post-commutation current values are measured [e.g. paragraph 0029, “inverter control circuit of the present invention operates in the following modes: start → sampling voltage pulse, inductor current, capacitor voltage → voltage pulse inversion → microprocessor sampling, calculation → overcurrent overvoltage? - No → Generate a sinusoidal reference voltage → Summation of integral operation → Compare XOR operation → Trigger monostable trigger → Generate drive signal, drive inverter → Return to sample voltage pulse, inductor current, capacitor voltage”]. It would be obvious to one having ordinary skill in the art, before the effective filing date of the claimed invention, to modify Wagoner by wherein the power inverter system further includes a control arrangement configured to sense the leg output current before and after a commutation to obtain a pre-commutation current value and a post-commutation current value as taught by Li in order to suppress load variation and improve input voltage regulation. Regarding claim 3, Wagoner discloses the power inverter system as claimed in claim 1, wherein the sign of the difference between current values indicates whether the switching instant of the parallel-connected inverter leg is earlier or later relative to a corresponding switching instant of at least one of the other parallel-connected inverter legs [e.g. paragraph 0051, “the nominal switch time can be adjusted to reduce or minimize a difference between the bridge current of the plurality of bridge circuits coupled in parallel”], and wherein the control arrangement is configured to advance the switching instants of the main switch [e.g. paragraph 0009, “The control system further includes a control circuit configured to adjust the nominal switch time”], if the sign of the difference between the pre-commutation and the post-commutation current values indicates the switching instant of the parallel-connected inverter leg is later relative to a corresponding switching instants of at least one other parallel-connected inverter leg. Wagoner fails to disclose wherein the pre-commutation and post-commutation current values are measured. Li teaches an inverter system wherein the pre-commutation and post-commutation current values are measured [e.g. paragraph 0029, “inverter control circuit of the present invention operates in the following modes: start → sampling voltage pulse, inductor current, capacitor voltage → voltage pulse inversion → microprocessor sampling, calculation → overcurrent overvoltage? - No → Generate a sinusoidal reference voltage → Summation of integral operation → Compare XOR operation → Trigger monostable trigger → Generate drive signal, drive inverter → Return to sample voltage pulse, inductor current, capacitor voltage”]. It would be obvious to one having ordinary skill in the art, before the effective filing date of the claimed invention, to modify Wagoner by wherein the power inverter system further includes a control arrangement configured to sense the leg output current before and after a commutation to obtain a pre-commutation current value and a post-commutation current value as taught by Li in order to suppress load variation and improve input voltage regulation. Regarding claim 4, Wagoner discloses the power inverter system as claimed in claim 1, wherein the control arrangement is configured to carry out the sensing and adjustment of the switching instants during all commutations or during a selected portion of the commutations [e.g. paragraph 0060, “Other feedback from other sensors can also be used by the controller 474 to control the power converter 120, including, for example, stator and rotor bus voltages and current feedbacks”]. Regarding claim 5, Wagoner fails to disclose the power inverter system, wherein the control arrangement is configured to carry out the sensing at each turn-on and turn-off of the main switches. Li teaches a power inverter system wherein the control arrangement is configured to carry out the sensing at each turn-on and turn-off of the main switches [e.g. paragraph 0029, “inverter control circuit of the present invention operates in the following modes: start → sampling voltage pulse, inductor current, capacitor voltage → voltage pulse inversion → microprocessor sampling, calculation → overcurrent overvoltage? - No → Generate a sinusoidal reference voltage → Summation of integral operation → Compare XOR operation → Trigger monostable trigger → Generate drive signal, drive inverter → Return to sample voltage pulse, inductor current, capacitor voltage”]. It would be obvious to one having ordinary skill in the art, before the effective filing date of the claimed invention, to modify Wagoner wherein the power inverter system further includes a control arrangement configured to carry out the sensing at each turn-on and turn-off of the main switches as taught by Li in order to suppress load variation and improve input voltage regulation. Regarding claim 6, Wagoner discloses the power inverter system as claimed in claim 1, wherein the control arrangement is configured to adjust the switching instants of the main switches to control the commutation-induced current difference [e.g. paragraph 0051, “the nominal switch time can be adjusted to reduce or minimize a difference between the bridge current of the plurality of bridge circuits coupled in parallel”] or a timing difference in an individual commutation towards zero but not to zero thereby causing a stepwise swing of a phase output voltage of the inverter system during an individual commutation. Regarding claim 7, Wagoner discloses the power inverter system as claimed in claim 11, wherein the control arrangement is configured to adjust the switching instant of the main switches to control the commutation-induced current difference or a timing difference in an individual commutation towards zero to a non-zero value [e.g. paragraph 0051, “the nominal switch time can be adjusted to reduce or minimize a difference between the bridge current of the plurality of bridge circuits coupled in parallel”] or to a predetermined non-zero value that is equal for turn-on and turn-off of the main switches, thereby causing a stepwise swing of a phase output voltage of the inverter system during an individual commutation. Regarding claim 9, Wagoner discloses the power inverter system as claimed in claim 1, wherein the power inverter system comprises two or more inverters [e.g. Fig. 2, elements 136 & 138], each of the inverters having one or more inverter phase legs [e.g. Fig. 2, elements L1-L6], wherein the parallel-connected inverter legs are the corresponding inverter phase legs of the two or more inverters modules connected in parallel [e.g. Fig.2, pairs of elements L1 & L4, L2 & L5, & L3 & L6]. Regarding claim 11, Wagoner discloses a power inverter system [e.g. Fig 1, element 120], comprising: two or more switching mode inverter legs [e.g. Fig. 2, elements 136 & 138] connected in parallel [e.g. abstract, “parallel bridge circuits in a power converter system”] between a common DC input [e.g. Fig. 2, element 124] and, via leg output inductors [e.g. Fig. 2, elements L1-L6], a common phase output [e.g. Fig. 2, element 160] to feed a phase output current [e.g. paragraph 0002,”a power generation system can include a power converter for producing alternating current (AC)”] to a common load [e.g. paragraph 0058, “The converter 124 converts the DC power on the DC link 125 into AC output power suitable for the electrical grid”]the phase output current being formed by combined leg output currents of the parallel-connected inverter legs [e.g. Fig. 2, current flowing through elements L1-L6 into phase input of element 160], wherein commutations of the parallel-connected inverter legs are initiated by essentially simultaneous commutation commands [e.g. paragraph 0009, “The control system further includes a control circuit configured to adjust the nominal switch time for the one or more control commands based at least in part on a timing difference adjustment determined for at least one of the switching elements of the plurality of bridge circuits”], a control arrangement configured to balance current sharing between the parallel-connected inverter legs [e.g. abstract, “a control scheme for reducing current imbalance between the parallel bridge circuits”; Fig. 1, element 115] by means of adjusting switching instants of main switches of the parallel-connected inverter legs [e.g. paragraph 0008, ”The method includes … analyzing the switch timing of each switching element to determine a timing difference adjustment for one or more of the switching elements of the plurality of bridge circuits”] to control the magnitude and direction of a commutation-induced current difference towards zero. Wagoner fails to disclose wherein the control arrangement is configured to sense a voltage pulse over the leg output inductor in each of the parallel-connected inverter legs during the commutation, and wherein the control arrangement is configured to adjust the switching instants autonomously in each of the parallel-connected inverter legs based on the duration and/or sign of the sensed output inductor voltage pulse or an integral of the voltage pulse of the respective parallel-connected inverter leg. Li teaches wherein the control arrangement is configured to sense a voltage pulse over the leg output inductor in each of the parallel-connected inverter legs during the commutation, and wherein the control arrangement is configured to adjust the switching instants autonomously in each of the parallel-connected inverter legs [e.g. paragraph 0006, “The calculation method is: sampling the inverter output voltage pulse, the inductor current and the capacitor voltage, obtaining the error ΔVref by comparing with the ideal reference voltage Vref ', generating the reference voltage Vref through the reference voltage calculation program, and further comparing the inverter switching frequency Modulation, in order to achieve unipolar inverter operation.”] based on the duration and/or sign of the sensed output inductor voltage pulse or an integral of the voltage pulse of the respective parallel-connected inverter leg [e.g. paragraph 0006, “Integrating the difference between the output voltage and the reference voltage, when the integral value is zero, the inverter switch status changes.”]. It would be obvious to one having ordinary skill in the art, before the effective filing date of the claimed invention, to modify Wagoner wherein the power inverter system further includes a control arrangement configured to sense a voltage pulse over the leg output inductor in each of the parallel-connected inverter legs during the commutation, and wherein the control arrangement is configured to adjust the switching instants autonomously in each of the parallel-connected inverter legs based on the duration and/or sign of the sensed output inductor voltage pulse or an integral of the voltage pulse of the respective parallel-connected inverter leg as taught by Li in order to suppress load variation and improve input voltage regulation. Regarding claim 16, Wagoner discloses the power inverter system as claimed in claim 11, wherein the control arrangement is configured to carry out the sensing and adjustment of the switching instants during all commutations or during a selected portion of the commutations [e.g. paragraph 0006, “The calculation method is: sampling the inverter output voltage pulse, the inductor current and the capacitor voltage, obtaining the error ΔVref by comparing with the ideal reference voltage Vref ', generating the reference voltage Vref through the reference voltage calculation program, and further comparing the inverter switching frequency Modulation, in order to achieve unipolar inverter operation.”]. Regarding claim 17, Wagoner discloses the power inverter system as claimed in claim 11, wherein the control arrangement is configured to carry out the sensing at each turn-on and turn-off of the main switches. Wagoner fails to disclose a power inverter system wherein the control arrangement is configured to carry out the sensing at each turn-on and turn-off of the main switches. Li teaches a power inverter system wherein the control arrangement is configured to carry out the sensing at each turn-on and turn-off of the main switches [e.g. paragraph 0029, “inverter control circuit of the present invention operates in the following modes: start → sampling voltage pulse, inductor current, capacitor voltage → voltage pulse inversion → microprocessor sampling, calculation → overcurrent overvoltage? - No → Generate a sinusoidal reference voltage → Summation of integral operation → Compare XOR operation → Trigger monostable trigger → Generate drive signal, drive inverter → Return to sample voltage pulse, inductor current, capacitor voltage”]. It would be obvious to one having ordinary skill in the art, before the effective filing date of the claimed invention, to modify Wagoner wherein the power inverter system further includes a control arrangement configured to carry out the sensing at each turn-on and turn-off of the main switches as taught by Li in order to suppress load variation and improve input voltage regulation. Regarding claim 18, Wagoner discloses the power inverter system as claimed in claim 11, wherein the control arrangement is configured to adjust the switching instants of the main switches to control the commutation-induced current difference or a timing difference in an individual commutation towards zero but not to zero thereby causing a stepwise swing of a phase output voltage of the inverter system during an individual commutation [e.g. paragraph 0051, “The nominal switch time specified by the control command can be further adjusted based on the bridge current of the plurality of bridge circuits ( 368 ). For instance, the nominal switch time can be adjusted to reduce or minimize a difference between the bridge current of the plurality of bridge circuits coupled in parallel”]. Regarding claim 19, Wagoner discloses the power inverter system as claimed in claim 11, wherein the control arrangement is configured to adjust the switching instant of the main switches to control the commutation-induced current difference or a timing difference in an individual commutation towards zero to a non-zero value [e.g. paragraph 0051, “The nominal switch time specified by the control command can be further adjusted based on the bridge current of the plurality of bridge circuits ( 368 ). For instance, the nominal switch time can be adjusted to reduce or minimize a difference between the bridge current of the plurality of bridge circuits coupled in parallel”] or to a predetermined non-zero value that is equal for turn-on and turn-off of the main switches, thereby causing a stepwise swing of a phase output voltage of the inverter system during an individual commutation. Claims 8 & 10 are rejected under 35 U.S.C. 103 as being unpatentable over US. Doc. ID 9281761B2 (hereinafter Wagoner) in view of CN Doc. ID. 107346947A (hereinafter Li). and US Doc. ID 6285572B1 (hereinafter Onizuka). Regarding claim 8, Wagoner fails to disclose the power inverter system as claimed in claim 1, wherein the control arrangement comprises a leg-specific controller for each of the two or more parallel-connected inverter legs. Onizuka teaches a power inverter system in wherein the control arrangement comprises two or more inverter-specific controllers [e.g. Fig. 1, elements 50] for each parallel inverter leg [e.g. Fig. 1, elements 66]. It would be obvious to one having ordinary skill in the art, before the effective filing date of the claimed invention, to modify Wagoner wherein the power inverter system further includes a control arrangement comprises two or more inverter-specific controllers as taught by Onizuka in order to improve the conversion efficiency of the system. Regarding claim 10, Wagoner discloses a controller being configured to provide the autonomous adjustment of switching instants for each of the inverter phase legs of the respective inverter [e.g. paragraph 0009, “The control system includes a modulator configured to provide one or more control commands to the plurality of bridge circuits coupled in parallel. Each of the one or more control commands controls a nominal switch time for one of the switching elements of the plurality of bridge circuits coupled in parallel.”]. Wagoner fails to disclose the power inverter system as claimed in claim 9, wherein the control arrangement comprises a leg-specific controller for each of the two or more parallel-connected inverter legs. Onizuka teaches a power inverter system in wherein the control arrangement comprises two or more inverter-specific controllers [e.g. Fig. 1, elements 50] for each parallel inverter leg [e.g. Fig. 1, elements 66]. It would be obvious to one having ordinary skill in the art, before the effective filing date of the claimed invention, to modify Wagoner wherein the power inverter system further includes a control arrangement comprises two or more inverter-specific controllers as taught by Onizuka to improve the efficiency of the system. Claims 12 & 14 are rejected under 35 U.S.C. 103 as being unpatentable over US. Doc. ID 9281761B2 (hereinafter Wagoner) in view of CN Doc. ID 107346947A (hereinafter Li) and US Doc. ID 20230050348A1 (hereinafter Luger) Regarding claim 12, Wagoner fails to disclose that the integral of the sensed voltage pulse represents a magnitude of the commutation-induced current difference in the parallel-connected inverter leg. Luger teaches a power system wherein integral of the sensed voltage pulse represents a magnitude of the commutation-induced current difference in the parallel-connected inverter leg [e.g. 0039, “This means that by integrating the voltage u.sub.Ln at the choke L over time t a measurement can be obtained that corresponds to the leg current i.sub.Ln in the choke L”; Fig. 2 & Fig. 5] . It would be obvious to someone ordinary skilled in the art, before the effective filing date, to modify Wagoner wherein the power inverter system further includes that the integral of the sensed voltage pulse represents a magnitude of the commutation-induced current difference in the parallel-connected inverter leg as taught by Luger to improve the maximum switching frequency of the power inverter system. Regarding claim 14, Wagoner discloses wherein the sign of the difference between current values indicates whether the switching instant of the parallel-connected inverter leg is earlier or later relative to a corresponding switching instant of at least one of the other parallel-connected inverter legs [e.g. paragraph 0051, “the nominal switch time can be adjusted to reduce or minimize a difference between the bridge current of the plurality of bridge circuits coupled in parallel”]. Wagoner fails to disclose the sign of the sensed voltage pulse. Luger teaches a power system wherein the sign of the sensed voltage pulse indicates the sign of the difference in current [e.g. 0039, “This means that by integrating the voltage u.sub.Ln at the choke L over time t a measurement can be obtained that corresponds to the leg current i.sub.Ln in the choke L”; Fig. 2 shows the sign of the voltage indicates the sign of the change in current which indicates the sign of the difference in current]. (Examiner Note: The sign of the sensed voltage pulse indicates the change in current as shown in Fig. 2 of Luger, which is the sign of the current difference during that sensed voltage pulse. The sign of the sensed voltage pulse is equivalent to the sign of the current difference. Shown above, Wagoner discloses using the sign of the current difference to adjust the switching instants.) It would be obvious to someone ordinary skilled in the art, before the effective filing date, to modify Wagoner wherein the power inverter system further includes that that the sign of the sensed voltage pulse indicates whether the switching instant of the parallel-connected inverter leg is earlier or later relative to a corresponding switching instant of at least one other parallel-connected inverter leg as taught by Luger in order to improve the maximum switching frequency of the power inverter system. Allowable Subject Matter Claims 13 & 15 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action. The following is a statement of reasons for the indication of allowable subject matter: The primary reason for the indication of the allowability of claim 13 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “wherein the duration of the sensed voltage pulse represents a timing difference of a switching instant of the parallel-connected inverter leg relative to a corresponding switching instant of at least one other parallel-connected inverter leg”. The primary reason for the indication of the allowability of claim 15 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “further the control arrangement configured to advance the switching instant of the parallel-connected inverter leg, if the sign of the voltage pulse indicates the switching instant of the parallel-connected inverter leg is later relative to a corresponding switching instant of at least one other parallel-connected inverter leg; and wherein the control arrangement is configured to delay the switching instant of the parallel-connected inverter leg, if the sign of the voltage pulse indicates the switching instant of the parallel-connected inverter leg is earlier relative to a corresponding switching instant of at least one other parallel-connected inverter leg”. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US9236814B2– Kaneko – Parallel Inverter Device and Method for Control Thereof EP2408099B1 – Tallam – Parallel Power Inverter Motor Drive System US10560037B2– Nikolov – Apparatus and Method for Control of Multi-Inverter Power Converter KR20120058911A – Park – Multi-Level Inverter Having Dual Controller US8730700B2 – Yuzurihara – Current Source Inverter and Method for Controlling Current Source Inverter Any inquiry concerning this communication or earlier communications from the examiner should be directed to JARED RAYMOND HAUSMAN whose telephone number is (571)272-6139. The examiner can normally be reached M-F. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Monica Lewis can be reached at 571-272-1838. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MONICA LEWIS/Supervisory Patent Examiner, Art Unit 2838 /JARED RAYMOND HAUSMAN/Examiner, Art Unit 2838
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Prosecution Timeline

Mar 08, 2024
Application Filed
Jan 28, 2026
Non-Final Rejection — §103, §112 (current)

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Prosecution Projections

1-2
Expected OA Rounds
100%
Grant Probability
99%
With Interview (+0.0%)
2y 8m
Median Time to Grant
Low
PTA Risk
Based on 2 resolved cases by this examiner. Grant probability derived from career allow rate.

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