DETAILED ACTION
Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of Claims
2. Claims 1-18 are presented for examination.
Abstract
3. The abstract of the disclosure is acceptable for examination purposes.
Oath Declaration
4. The Oath complies with all the requirements set forth in MPEP 602 and therefore is accepted.
Specification
5. The disclosure is objected to because of the following informalities:
The feature of “the machine learning block 118” that states in paragraph [0098] needs to be corrected to “the neural network 118” to correspond the drawing of Figure 3B. Appropriate correction is required.
Drawings
6. The drawings are objected to because:
i) The Syndrome component of Fig. 3A should be labeled with number.
ii) The Syndrome component and the Data Qubits (error configuration) component of Fig. 4A both should be labeled with number.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
7. Claims 1-18 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more.
As per claim 1:
The claim recites “A method of error detection and correction in a quantum computing system, the method comprising: providing a qubit array having an encoding arrangement and a plurality of ancilla bits; extracting a plurality of syndrome codes from said plurality of ancilla bits; providing a plurality of low level decoders that operate in parallel on said plurality of syndrome codes; and utilizing a neural network to predict which of said plurality of low level decoders to use to minimize introducing logical errors in said qubit array.
In regards to claim 1:
At Step 1, is the claim directed to a processor, machine, manufacture or composition of matter? Yes, See MPEP 2106.03. The claim recites a series of steps and, therefore, is a process, and thus directed to a statutory category. At step 2A Prong One, Does the claim recite an abstract idea law of nature or natural phenomenon? Yes. MPEP 2106.04. The claim recites “--- extracting a plurality of syndrome codes from said plurality of ancilla bits; providing a plurality of low level decoders that operate in parallel on said plurality of syndrome codes; --- predict which of said plurality of low level decoders to use to minimize introducing logical errors in said qubit array” as drafted, is a process that, under the broadest reasonable interpretation, covers a mathematical relationship of the mathematical concept grouping. The terms of the claims are presumed to have their plain meaning consistent with the specification as it would be interpreted by one of ordinary skill in the art. Thus, if a claim limitation, under its broadest reasonable interpretation, covers mathematical concepts, then it falls into the mathematical relationship as part of the mathematical grouping of abstract idea. Accordingly, the claim recites an abstract idea. At step 2A Prong Two, Does the claim recite additional elements that integrate the judicial exception into a practical application? NO. See MPEP 2106.04(d). The claim recites additional limitations of “providing a qubit array having an encoding arrangement and a plurality of ancilla bits” does not integrate the abstract idea into a practical application because is generic computer function of data mere data gathering. These extra-solution activities do not provide practical application. At step 2B, Does the claim recite additional elements that amount to significantly more than judicial exception? NO. See MPEP 2106.05. The claim recites additional element of “error detection and correction,” “quantum computing system,” and “a neural network” are generic components that are well understood, routine and conventional and do not result in the claim as a whole amounting to significantly more than the abstract idea. Mere instructions to apply an exception using a generic computer component cannot provide an inventive concept. Therefore, the claim is not patent eligible.
In regards to claim 7:
The claim recites “A method for error detection and correction in a quantum computing system, the method comprising: receiving a plurality of syndromes from a qubit array having ancilla qubits; analyzing via a plurality of decoders said plurality of syndromes obtained from ancilla measurements to identify errors and propose corrections whereby each decoder independently and in parallel utilizes a different decoding strategy to propose respective qubit corrections; selecting a decoding strategy based on machine learning predictions; and correcting detected errors using the selected decoding strategy.
At Step 1, is the claim directed to a processor, machine, manufacture or composition of matter? Yes, See MPEP 2106.03. The claim recites a series of steps and, therefore, is a process, and thus directed to a statutory category. At step 2A Prong One, Does the claim recite an abstract idea law of nature or natural phenomenon? Yes. MPEP 2106.04. The claim recites “--- analyzing via a plurality of decoders said plurality of syndromes obtained from ancilla measurements to identify errors and propose corrections whereby each decoder independently and in parallel utilizes --- to propose respective qubit corrections; selecting a decoding strategy based on machine learning predictions; and correcting detected errors using the selected decoding strategy” as drafted, is a process that, under the broadest reasonable interpretation, covers a mathematical relationship of the mathematical concept grouping. The terms of the claims are presumed to have their plain meaning consistent with the specification as it would be interpreted by one of ordinary skill in the art. Thus, if a claim limitation, under its broadest reasonable interpretation, covers mathematical concepts, then it falls into the mathematical relationship as part of the mathematical grouping of abstract idea. Accordingly, the claim recites an abstract idea. At step 2A Prong Two, Does the claim recite additional elements that integrate the judicial exception into a practical application? NO. See MPEP 2106.04(d). The claim recites additional limitations of “receiving a plurality of syndromes from a qubit array having ancilla qubits” does not integrate the abstract idea into a practical application because is generic computer function of data mere data gathering. These extra-solution activities do not provide practical application. At step 2B, Does the claim recite additional elements that amount to significantly more than judicial exception? NO. See MPEP 2106.05. The claim recites additional element of “error detection and correction,” “quantum computing system,” and “a different decoding strategy” are generic components that are well understood, routine and conventional and do not result in the claim as a whole amounting to significantly more than the abstract idea. Mere instructions to apply an exception using a generic computer component cannot provide an inventive concept. Therefore, the claim is not patent eligible.
In regards to claim 13:
The claim recites “A system for error detection and correction in a quantum computing system, comprising: a quantum processing unit (QPU) comprising a two-dimensional encoding arrangement qubit array; a plurality of ancilla qubits for generating syndrome codes; a plurality of low level decoders operating in parallel on said syndrome codes to generate candidate qubit error correction vectors; a neural network trained to predict qubit errors and an optimal decoding strategy based on syndromes obtained from ancilla measurements; and a selector operative to choose one of said candidate qubit error correction vectors based on said optimal decoding strategy.
At Step 1, is the claim directed to a processor, machine, manufacture or composition of matter? Yes, See MPEP 2106.03. The claim is directed to a "system" and thus directed to a statutory category. At step 2A Prong One, Does the claim recite an abstract idea law of nature or natural phenomenon? Yes. MPEP 2106.04. The claim recites “--- plurality of ancilla qubits for generating syndrome codes,--- generate candidate qubit error correction vectors; --- trained to predict qubit errors and an optimal decoding strategy based on syndromes obtained from ancilla measurements; and a selector operative to choose one of said candidate qubit error correction vectors based on said optimal decoding strategy” as drafted, is a process that, under the broadest reasonable interpretation, covers a mathematical relationship of the mathematical concept grouping. The terms of the claims are presumed to have their plain meaning consistent with the specification as it would be interpreted by one of ordinary skill in the art. Thus, if a claim limitation, under its broadest reasonable interpretation, covers mathematical concepts, then it falls into the mathematical relationship as part of the mathematical grouping of abstract idea. Accordingly, the claim recites an abstract idea. At step 2A Prong Two, Does the claim recite additional elements that integrate the judicial exception into a practical application? NO. See MPEP 2106.04(d). The claim recites additional limitations of “a quantum processing unit (QPU) comprising a two-dimensional encoding arrangement qubit array” does not integrate the abstract idea into a practical application because is generic computer function of data mere data gathering. These extra-solution activities do not provide practical application. At step 2B, Does the claim recite additional elements that amount to significantly more than judicial exception? NO. See MPEP 2106.05. The claim recites additional element of “a system,” “error detection and correction,” and “quantum computing system,” are generic components that are well understood, routine and conventional and do not result in the claim as a whole amounting to significantly more than the abstract idea. Mere instructions to apply an exception using a generic computer component cannot provide an inventive concept. Therefore, the claim is not patent eligible. Dependent claims 2-6, 8-12, and 14-18 fail to remedy the exception by integrating it into a practical application or adding elements that amount to significantly more than the exception – the process steps all still comprise mathematical concepts. Accordingly, for the reasons provided above, claims 1-18 are directed to an abstract idea, hence, not patent eligible under 35 USC 101.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
8. Claims 1-18 are rejected under 35 U.S.C. 103 (a) as being unpatentable over Lucarelli (US 20200119748 A1) in view of Zheng et al. (US 2021/0399743 A1) "herein after as Zheng."
As per claim 1:
Lucarelli substantially teaches or discloses a method of error detection and correction in a quantum computing system, the method comprising (see Fig. 1, quantum system 101): providing a qubit array having an encoding arrangement and a plurality of ancilla bits (see paragraph [0036], herein the quantum system 101 includes a quantum encoder A, a logical parity encoder B, a measurement apparatus C, a logical parity decoder D, a quantum decoder E, and an action component F. As is apparent to those of ordinary skill in the art, a plurality of data qubits 102, a plurality of ancilla qubits 106, and Fig. 16 step 182); extracting a plurality of syndrome codes from said plurality of ancilla bits (see paragraph [0041], herein the resulting binary valued measurement outcomes (referred to as a “logical parity syndrome” in the following) and a binary matrix (e.g., a parity-check matrix, a sub-parity-check matrix, a parity-check matrix pre-multiplied by a generator matrix, and the like, and Fig. 16 step 184); providing a plurality of low level decoders that operate in parallel on said plurality of syndrome codes (see paragraph [0042], herein the logical parity encoder B, the measurement apparatus C, and the logical parity decoder D may be configured to construct a “full logical parity syndrome” by measuring multiple quantum check operators in a sequential or parallel configuration. Using the full logical parity syndrome, the logical parity decoder D may complete the identification of error types and locations, and Fig. 1). Lucarelli does not explicitly teach utilizing a neural network to predict which of said plurality of low level decoders to use to minimize introducing logical errors in said qubit array. However, Zheng in the same the field of endeavor teaches utilizing a neural network to predict which of said plurality of low level decoders to use to minimize introducing logical errors in said qubit array (see abstract; paragraph [0080], herein If error syndrome information is not perfect (which may be referred to as syndrome measurement with noise, and refers to a case that an error may occur in a measurement process), it is also expected that a neural network decoder can be used for decoding, thereby implementing fault tolerant and error correction decoding for the error syndrome information; paragraph [0086], herein A neural network decoder (which may be referred to as a neural network classifier) may be used for decoding the error syndrome information. Based on the framework protocol of fault tolerant and error correction decoding provided in this disclosure, a suitable neural network classifier may be freely selected according to an actual situation to complete fault tolerant and error correction decoding; and paragraph [0131], herein the logic error class corresponding to the actual error syndrome information is predicted by using a trained first decoder; and Figs. 15-17). Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the invention, to modify the quantum computing system of Lucarelli with the teachings of Zheng by utilizing a neural network to predict which of said plurality of low level decoders to use to minimize introducing logical errors in said qubit array. This modification would have been obvious to one of ordinary skill in the art, before the effective filing date of the invention, because one of ordinary skill in the art would have recognized the utilizing a neural network to predict which of said plurality of low level decoders to use to minimize introducing logical errors in said qubit array would have improved the fault tolerant and error correction decoding speed, and achieving real-time fault tolerant and error correction decoding (see paragraph [0020] of Zheng).
As per claim 2:
Zheng teaches that wherein a low level decoder is selected to ensure error correction occurs within a decoherence time of qubits in said qubit array, thereby preserving quantum information integrity (see paragraph [0134], herein the foregoing steps 1102a and 1102b may be performed in sequence or in parallel, and parallel execution of the two steps helps shorten the time required for executing the processes. To achieve real-time fault tolerant and error correction decoding, as many devices and suitable communicative connections as possible shall be selected to complete parallel execution).
As per claim 3:
Zheng teaches that wherein said plurality of low level decoders are configured to address specific qubit error scenarios (see paragraph [0077], herein As an error correction code, after an error occurs, error syndromes can be obtained through parity check; then a position in which the error occurs and an error class (the error is an X error, a Z error, or both of the two, that is, a Y error) are determined according to the syndromes by using a specific decoding algorithm for error correction codes).
As per claim 4:
Zheng teaches that wherein said neural network analyzes patterns in said plurality of syndrome codes to determine an optimal decoder for qubit error correction (see paragraph [0087], herein an optimal decoding algorithm if syndromes are perfect is first introduced herein. As an error correction code, after an error occurs, error syndromes can be obtained through parity check. A position in which the error occurs and an error class are determined according to the error syndromes by using a specific decoding algorithm for error correction codes).
As per claim 5:
Zheng teaches that providing training data to said neural network comprising syndromes obtained from ancilla measurements and corresponding error correction outcomes (see paragraph [0008], herein obtaining actual error syndrome information of a quantum circuit by performing a noisy error syndrome measurement on the quantum circuit using a QEC code); and training said neural network using said training data to identify patterns in syndromes and predict optimal error correction strategies (see paragraph [0128], herein the neural network decoder is a machine learning model that is constructed based on a neural network and configured to decode error syndrome information. If a neural network decoder is used to decode the actual error syndrome information, input data of the neural network decoder includes the actual error syndrome information, and output data of the neural network decoder includes a logic error class and perfect error syndrome information that correspond to the actual error syndrome information).
As per claim 6:
Zheng teaches that wherein said training data comprises syndromes obtained from ancilla measurements and corresponding error correction outcomes obtained from a known error-free qubit array (see paragraph [0086], herein A neural network decoder (which may be referred to as a neural network classifier) may be used for decoding the error syndrome information. Based on the framework protocol of fault tolerant and error correction decoding provided in this disclosure, a suitable neural network classifier may be freely selected according to an actual situation to complete fault tolerant and error correction decoding; and paragraph [0127]).
As per claim 7:
Lucarelli substantially teaches or discloses a method for error detection and correction in a quantum computing system, the method comprising (see Fig. 1, quantum system 101): receiving a plurality of syndromes from a qubit array having ancilla qubits (see paragraph [0036], herein the quantum system 101 includes a quantum encoder A, a logical parity encoder B, a measurement apparatus C, a logical parity decoder D, a quantum decoder E, and an action component F. As is apparent to those of ordinary skill in the art, a plurality of data qubits 102, a plurality of ancilla qubits 106, and Fig. 16 step 182); analyzing via a plurality of decoders said plurality of syndromes obtained from ancilla measurements to identify errors (see paragraph [0041], herein the resulting binary valued measurement outcomes (referred to as a “logical parity syndrome” in the following) and a binary matrix (e.g., a parity-check matrix, a sub-parity-check matrix, a parity-check matrix pre-multiplied by a generator matrix, and the like, and Fig. 16 step 184) and propose corrections whereby each decoder independently and in parallel utilizes a different decoding strategy to propose respective qubit corrections (see paragraph [0042], herein the logical parity encoder B, the measurement apparatus C, and the logical parity decoder D may be configured to construct a “full logical parity syndrome” by measuring multiple quantum check operators in a sequential or parallel configuration. Using the full logical parity syndrome, the logical parity decoder D may complete the identification of error types and locations, and Fig. 1). Lucarelli does not explicitly teach selecting a decoding strategy based on machine learning predictions; and correcting detected errors using the selected decoding strategy. However, Zheng in the same the field of endeavor teaches selecting a decoding strategy based on machine learning predictions; and correcting detected errors using the selected decoding strategy (see abstract; paragraph [0080], herein If error syndrome information is not perfect (which may be referred to as syndrome measurement with noise, and refers to a case that an error may occur in a measurement process), it is also expected that a neural network decoder can be used for decoding, thereby implementing fault tolerant and error correction decoding for the error syndrome information; paragraph [0086], herein A neural network decoder (which may be referred to as a neural network classifier) may be used for decoding the error syndrome information. Based on the framework protocol of fault tolerant and error correction decoding provided in this disclosure, a suitable neural network classifier may be freely selected according to an actual situation to complete fault tolerant and error correction decoding; and paragraph [0131], herein the logic error class corresponding to the actual error syndrome information is predicted by using a trained first decoder; and Figs. 15-17). Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the invention, to modify the quantum computing system of Lucarelli with the teachings of Zheng by selecting a decoding strategy based on machine learning predictions; and correcting detected errors using the selected decoding strategy. This modification would have been obvious to one of ordinary skill in the art, before the effective filing date of the invention, because one of ordinary skill in the art would have recognized the selecting a decoding strategy based on machine learning predictions; and correcting detected errors using the selected decoding strategy would have improved the fault tolerant and error correction decoding speed, and achieving real-time fault tolerant and error correction decoding (see paragraph [0020] of Zheng).
As per claim 8:
Zheng teaches that wherein a low level decoder is selected to ensure error correction occurs within a decoherence time of qubits in said qubit array, thereby preserving quantum information integrity (see paragraph [0134], herein the foregoing steps 1102a and 1102b may be performed in sequence or in parallel, and parallel execution of the two steps helps shorten the time required for executing the processes. To achieve real-time fault tolerant and error correction decoding, as many devices and suitable communicative connections as possible shall be selected to complete parallel execution).
As per claim 9:
Zheng teaches that, wherein said plurality of low level decoders are configured to address specific qubit error scenarios (see paragraph [0077], herein As an error correction code, after an error occurs, error syndromes can be obtained through parity check; then a position in which the error occurs and an error class (the error is an X error, a Z error, or both of the two, that is, a Y error) are determined according to the syndromes by using a specific decoding algorithm for error correction codes).
As per claim 10:
Zheng teaches that wherein said neural network analyzes patterns in said plurality of syndrome codes to determine an optimal decoder for qubit error correction (see paragraph [0087], herein an optimal decoding algorithm if syndromes are perfect is first introduced herein. As an error correction code, after an error occurs, error syndromes can be obtained through parity check. A position in which the error occurs and an error class are determined according to the error syndromes by using a specific decoding algorithm for error correction codes).
As per claim 11:
Zheng teaches that providing training data to said neural network comprising syndromes obtained from ancilla measurements and corresponding error correction outcomes (see paragraph [0008], herein obtaining actual error syndrome information of a quantum circuit by performing a noisy error syndrome measurement on the quantum circuit using a QEC code); and training said neural network using said training data to identify patterns in syndromes and predict optimal error correction strategies (see paragraph [0128], herein the neural network decoder is a machine learning model that is constructed based on a neural network and configured to decode error syndrome information. If a neural network decoder is used to decode the actual error syndrome information, input data of the neural network decoder includes the actual error syndrome information, and output data of the neural network decoder includes a logic error class and perfect error syndrome information that correspond to the actual error syndrome information).
As per claim 12:
Zheng teaches that wherein said training data comprises syndromes obtained from ancilla measurements and corresponding error correction outcomes obtained from a known error-free qubit array (see paragraph [0086], herein A neural network decoder (which may be referred to as a neural network classifier) may be used for decoding the error syndrome information. Based on the framework protocol of fault tolerant and error correction decoding provided in this disclosure, a suitable neural network classifier may be freely selected according to an actual situation to complete fault tolerant and error correction decoding; and paragraph [0127]).
As per claim 13:
Lucarelli substantially teaches or discloses a system for error detection and correction in a quantum computing system, comprising (see Fig. 17, quantum computing system 100): a quantum processing unit (QPU) (see Fig. 17, control processor plane 164) comprising a two-dimensional encoding arrangement qubit array (see Fig. 1, logical parity encoders B1 &B2); a plurality of ancilla qubits for generating syndrome codes (see paragraph [0030], herein Data qubits and ancilla qubits reside in the quantum data plane 160. The quantum data plane 160 provides any circuitry needed to measure states of the qubits and to perform operations on the qubits); a plurality of low level decoders operating in parallel on said syndrome codes to generate candidate qubit error correction vectors (see paragraph [0042], herein the logical parity encoder B, the measurement apparatus C, and the logical parity decoder D may be configured to construct a “full logical parity syndrome” by measuring multiple quantum check operators in a sequential or parallel configuration. Using the full logical parity syndrome, the logical parity decoder D may complete the identification of error types and locations, and Fig. 1). Lucarelli does not explicitly teach a neural network trained to predict qubit errors and an optimal decoding strategy based on syndromes obtained from ancilla measurements; and a selector operative to choose one of said candidate qubit error correction vectors based on said optimal decoding strategy. However, Zheng in the same the field of endeavor a neural network trained to predict qubit errors and an optimal decoding strategy based on syndromes obtained from ancilla measurements (see abstract; paragraph [0080], herein If error syndrome information is not perfect (which may be referred to as syndrome measurement with noise, and refers to a case that an error may occur in a measurement process), it is also expected that a neural network decoder can be used for decoding, thereby implementing fault tolerant and error correction decoding for the error syndrome information); and a selector operative to choose one of said candidate qubit error correction vectors based on said optimal decoding strategy (see paragraph [0086], herein A neural network decoder (which may be referred to as a neural network classifier) may be used for decoding the error syndrome information. Based on the framework protocol of fault tolerant and error correction decoding provided in this disclosure, a suitable neural network classifier may be freely selected according to an actual situation to complete fault tolerant and error correction decoding; and paragraph [0131], herein the logic error class corresponding to the actual error syndrome information is predicted by using a trained first decoder; and Figs. 15-17). Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the invention, to modify the quantum computing system of Lucarelli with the teachings of Zheng by predicting qubit errors and an optimal decoding strategy based on syndromes obtained from ancilla measurements; and choosing one of said candidate qubit error correction vectors based on said optimal decoding strategy. This modification would have been obvious to one of ordinary skill in the art, before the effective filing date of the invention, because one of ordinary skill in the art would have recognized the predicting qubit errors and an optimal decoding strategy based on syndromes obtained from ancilla measurements; and choosing one of said candidate qubit error correction vectors based on said optimal decoding strategy would have improved the fault tolerant and error correction decoding speed, and achieving real-time fault tolerant and error correction decoding (see paragraph [0020] of Zheng).
As per claim 14:
Zheng teaches that wherein latency of said plurality of low level decoders ensures error correction occurs within a decoherence time of qubits in said qubit array, thereby preserving quantum information integrity (see paragraph [0134], herein the foregoing steps 1102a and 1102b may be performed in sequence or in parallel, and parallel execution of the two steps helps shorten the time required for executing the processes. To achieve real-time fault tolerant and error correction decoding, as many devices and suitable communicative connections as possible shall be selected to complete parallel execution).
As per claim 15:
Zheng teaches that wherein said plurality of low level decoders are configured to address specific qubit error scenarios (see paragraph [0077], herein As an error correction code, after an error occurs, error syndromes can be obtained through parity check; then a position in which the error occurs and an error class (the error is an X error, a Z error, or both of the two, that is, a Y error) are determined according to the syndromes by using a specific decoding algorithm for error correction codes).
As per claim 16:
Zheng teaches that wherein said neural network analyzes patterns in said plurality of syndrome codes to determine an optimal decoder for qubit error correction (see paragraph [0087], herein an optimal decoding algorithm if syndromes are perfect is first introduced herein. As an error correction code, after an error occurs, error syndromes can be obtained through parity check. A position in which the error occurs and an error class are determined according to the error syndromes by using a specific decoding algorithm for error correction codes).
As per claim 17:
Zheng teaches that wherein said neural network is provided training data comprising syndromes obtained from ancilla measurements and corresponding error correction outcomes (see paragraph [0008], herein obtaining actual error syndrome information of a quantum circuit by performing a noisy error syndrome measurement on the quantum circuit using a QEC code); and said neural network is trained using said training data to identify patterns in syndromes and predict optimal error correction strategies (see paragraph [0128], herein the neural network decoder is a machine learning model that is constructed based on a neural network and configured to decode error syndrome information. If a neural network decoder is used to decode the actual error syndrome information, input data of the neural network decoder includes the actual error syndrome information, and output data of the neural network decoder includes a logic error class and perfect error syndrome information that correspond to the actual error syndrome information).
As per claim 18:
Zheng teaches that wherein said training data comprises syndromes obtained from ancilla measurements and corresponding error correction outcomes obtained from a known error-free qubit array (see paragraph [0086], herein A neural network decoder (which may be referred to as a neural network classifier) may be used for decoding the error syndrome information. Based on the framework protocol of fault tolerant and error correction decoding provided in this disclosure, a suitable neural network classifier may be freely selected according to an actual situation to complete fault tolerant and error correction decoding; and paragraph [0127]).
Examiner Notes
9. When amending the claims, applicants are respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention.
Prior Art
10. The prior art of record, considered pertinent to the applicant’s disclosure, is listed in the attached PTO-892 form.
Conclusion
11. Any inquiry concerning this communication or earlier communications from the examiner should be directed to OSMAN ALSHACK whose telephone number is (571)272-2069. The examiner can normally be reached on MON-FRI 8:30 AM-5:00 PM EST, also please fax interview request to (571) 273- 2069. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, ALBERT DECADY can be reached on 5712723819. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/OSMAN M ALSHACK/Examiner, Art Unit 2112
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