Prosecution Insights
Last updated: October 27, 2026
Application No. 18/600,532

DISPLAY PANEL AND ELECTRONIC APPARATUS INCLUDING THE SAME

Non-Final OA §102§103§112
Filed
Mar 08, 2024
Priority
Mar 20, 2023 — RE 10-2023-0036162
Examiner
NGUYEN, CUONG B
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Display Co., Ltd.
OA Round
1 (Non-Final)
88%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allowance Rate
868 granted / 983 resolved
+20.3% vs TC avg
Strong +15% interview lift
Without
With
+15.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
41 currently pending
Career history
1031
Total Applications
across all art units

Statute-Specific Performance

§101
1.1%
-38.9% vs TC avg
§103
46.0%
+6.0% vs TC avg
§102
32.1%
-7.9% vs TC avg
§112
18.5%
-21.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 983 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Election/Restrictions Applicant's election without traverse of Species II directed to Fig. 7 (claims 1-5, 7, 12-16, 18, and 22-23) in the reply filed on August 13th, 2026 is acknowledged. However, claims 7 and 18 depend on claims 6 and 17 which belong to non-elected species. Therefore claims 6, 7, 8-11, 17, 18, 19-21 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Species, there being no allowable generic or linking claim. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. Claims 1-5, 12-16, 13-16 and 22-23 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. Claim 1 recites “the first cantilever portion has a first gap in the first direction from a lower layer under the separator” in lines 18-19. According to Applicant’s specification, the cantilever portion SPC is located apart by a first gap g1 from the upper surface of inorganic insulating layer under the separate SP (see Figs. 6C-7 and [00110]). Therefore, the above limitation reciting “the first cantilever portion has a first gap” contradicts with the applicant’s specification. Claims 2-5 and 12 are rejected for depending on claim 1 and having the above issue incorporated into the claims. Claim 13 recites “the first cantilever portion has a first gap in the first direction from a lower layer under the separator” in lines 25-26. According to Applicant’s specification, the cantilever portion SPC is located apart by a first gap g1 from the upper surface of inorganic insulating layer under the separate SP (see Figs. 6C-7 and [00110]). Therefore, the above limitation reciting “the first cantilever portion has a first gap” contradicts with the applicant’s specification. Claims 14-16 and 22-23 are rejected for depending on claim 1 and having the above issue incorporated into the claims. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1-2, 4-5, 12-14, 16, 22 and 23 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by LEE et al. (Pub. No.: US 2020/0343481 A1), hereinafter as LEE. Regarding claim 1, LEE discloses a display panel in Figs. 2, 5A and 6 comprising: a substrate (base substrate BS) including an opening (module hole MH) passing through an upper surface thereof and a lower surface thereof (upper surface PNG media_image1.png 568 1159 media_image1.png Greyscale and lower surface of base substrate BS) (see Fig. 2, 5A, 6 and [0065], [0093], [0142]); a light-emitting diode (light emitting element ED) arranged in a display area (display area DA) around the opening and comprising a first electrode (first electrode E1), a second electrode (second electrode E2), and an intermediate layer (light emitting pattern EL and charge control layer OL) between the first electrode and the second electrode (see Figs. 5A, 6 and [0056], [0064], [0106-0107], [0126]); a thin-film encapsulation layer (encapsulation layer TFE) on the light-emitting diode and comprising an organic encapsulation layer (layer OEL) and at least one inorganic encapsulation layer (layer LIL) (see [0135-0136]); a first separator (combination of portions of layers BI, IL1, IL2, OL-O and CO between groove BR1 and BR2 as shown in annotated Fig. 6 above) in a first non-display area (hole region PA excluding region of module hole MH) between the opening of the substrate (module hole MH) and the display area (display area DA) (see [0129] and [0160-0165]); and a second separator (combination of another portions of layers BI, IL1, IL2, OL-O and CO between groove BR1 and module hole MH as shown in annotated Fig. 6 above) spaced apart from the first separator in the first non-display area (see [0129] and [0160-0165]), wherein the first separator comprises: a first inorganic insulating layer (portion of barrier layer BI of the annotated first separator as shown in Fig. 6 above) (see [0095]); and a second inorganic insulating layer (portion of first insulating layer IL1 of the annotated first separator as shown in Fig. 6 above) on an upper surface of the first inorganic insulating layer in a first direction (vertical direction) perpendicular to the substrate (see [0100]), and wherein the first separator comprises a first cantilever portion (the left protruded portions of layers BI, IL1, IL2, OL-O and CO as shown in annotated Fig. 6 above) and a second cantilever portion (the right protruded portions of layers BI, IL1, IL2, OL-O and CO as shown in annotated Fig. 6 above) opposite to the first cantilever portion, wherein the first cantilever portion has a first gap (a portion of groove BR2) in the first direction from a lower layer (portion of layer CO or layer LIL or layer OL-P under groove BR2) under the first separator, and has a first length (the length of left protruded portion) in a second direction (horizontal direction) crossing the first direction (see annotated Fig. 6). Regarding claim 2, LEE discloses the display panel of claim 1, wherein the first separator further comprises an intermediate portion (middle portions of layers BI, IL1, and IL2 as shown in annotated Fig. 6 above) between the first cantilever portion and the second cantilever portion, and a first height from the lower surface of the substrate (lower surface of base substrate BS) to an upper surface of the intermediate portion (upper surface of layer IL2) is less than a second height from the lower surface of the substrate to an upper surface of at least one of the first cantilever portion or the second cantilever portion (upper surface of the portion of layer CO of the annotated first separator as shown in Fig. 6). Regarding claim 4, LEE discloses the display panel of claim 1, wherein the first cantilever portion has a structure including a portion of the first inorganic insulating layer and a portion of the second inorganic insulating layer overlapping each other (portions of layers BI and IL1) (see annotated Fig. 6 above). Regarding claim 5, LEE discloses the display panel of claim 4, wherein the portion of the second inorganic insulating layer is in direct contact with the portion of the first inorganic insulating layer (portion of layer IL1 directly contact with portion of layer BI) (see annotated Fig. 6 above). Regarding claim 12, LEE discloses the display panel of claim 1, wherein the at least one inorganic encapsulation layer of the thin-film encapsulation layer (first inorganic encapsulating layer LIL) is in direct contact with each of a portion of the first cantilever portion and a portion of the second cantilever portion of the first separator (contacting upper surface of layer CO which is part of the annotated first cantilever and second cantilever) (see annotated Fig. 6 above and [0152]). Regarding claim 13, LEE discloses an electronic apparatus in Figs. 1-2, 5A and 6 comprising a display panel (display panel DP) including a transmissive area (area of display panel DP having module hole MH and electronic module ID), a display area (display area DA), and a first non-display area (hole region PA excluding module hole MH having layer CO covering), wherein the display area surrounds the transmissive area, and the first non-display area is between the transmissive area and the display area (see Figs. 1-2, 5A and [0055-0056], [0064-0067]); and a component (electronic module ID) overlapping the transmissive area of the display panel (see Fig. 2 and [0065]), wherein the display panel comprising: a substrate (base substrate BS) including an opening (module hole MH) passing through an upper surface thereof and a lower surface thereof (upper surface and lower surface of base substrate BS) (see Fig. 2, 5A, 6 and [0065], [0093], [0142]); a light-emitting diode (light emitting element ED) arranged in a display area (display area DA) around the opening and comprising a first electrode (first electrode E1), a second electrode (second electrode E2), and an intermediate layer (light emitting pattern EL and charge control layer OL) between the first electrode and the second electrode (see Figs. 5A, 6 and [0056], [0064], [0106-0107], [0126]); a thin-film encapsulation layer (encapsulation layer TFE) on the light-emitting diode and comprising an organic encapsulation layer (layer OEL) and at least one inorganic encapsulation layer (layer LIL) (see [0135-0136]); a first separator (combination of portions of layers BI, IL1, IL2, OL-O and CO between groove BR1 and BR2 as shown in annotated Fig. 6 above) on the substrate and corresponding to the first non-display area (hole region PA excluding module hole MH) (see [0129] and [0160-0165]); and a second separator (combination of another portions of layers BI, IL1, IL2, OL-O and CO between groove BR1 and module hole MH as shown in annotated Fig. 6 above) spaced apart from the first separator in the first non-display area (see [0129] and [0160-0165]), wherein each of the first separator and second separator (a plurality of grooves BR1 and BR2 for making at least 3 separators in hole region PA) (see [0160]) comprises: a first inorganic insulating layer (portion of barrier layer BI of the annotated first separator as shown in Fig. 6 above) (see [0095]); and a second inorganic insulating layer (portion of first insulating layer IL1 of the annotated first separator as shown in Fig. 6 above) on an upper surface of the first inorganic insulating layer in a first direction (vertical direction) perpendicular to the substrate (see [0100]), wherein the first inorganic insulating layer of the first separator is separated from the first inorganic insulating layer of the second separator (portions of barrier layer BI being separated by gap BR1), and wherein the first separator comprises a first cantilever portion (the left protruded portions of layers BI, IL1, IL2, OL-O and CO as shown in annotated Fig. 6 above) and a second cantilever portion (the right protruded portions of layers BI, IL1, IL2, OL-O and CO as shown in annotated Fig. 6 above) opposite to the first cantilever portion, wherein the first cantilever portion has a first gap (a portion of groove BR2) in the first direction from a lower layer (portion of layer CO or layer LIL or layer OL-P under groove BR2) under the first separator. Regarding claim 14, LEE discloses the electronic apparatus of claim 13, wherein the first separator further comprises an intermediate portion (middle portions of layers BI, IL1, and IL2 as shown in annotated Fig. 6 above) between the first cantilever portion and the second cantilever portion, and a first height from the lower surface of the substrate (lower surface of base substrate BS) to an upper surface of the intermediate portion (upper surface of layer IL2) is less than a second height from the lower surface of the substrate to an upper surface of at least one of the first cantilever portion or the second cantilever portion (upper surface of the portion of layer CO of the annotated first separator as shown in Fig. 6). Regarding claim 16, LEE discloses the electronic apparatus of claim 13, wherein the first cantilever portion has a structure including a portion of the first inorganic insulating layer and a portion of the second inorganic insulating layer are in direct contact with each other (portions of layers BI and IL1) (see annotated Fig. 6 above). Regarding claim 22, LEE discloses the electronic apparatus of claim 13, wherein the at least one inorganic encapsulation layer of the thin-film encapsulation layer (first inorganic encapsulating layer LIL) is in direct contact with each of a portion of the first cantilever portion and a portion of the second cantilever portion of the first separator (contacting upper surface of layer CO which is part of the annotated first cantilever and second cantilever) (see annotated Fig. 6 above and [0152]). Regarding claim 23, LEE discloses the electronic apparatus of claim 13, wherein the component includes a sensor or camera (see [0020] and [0065]). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: a. Determining the scope and contents of the prior art. b. Ascertaining the differences between the prior art and the claims at issue. c. Resolving the level of ordinary skill in the pertinent art. d. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim 3 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over LEE et al. (Pub. No.: US 2020/0343481 A1), hereinafter as LEE, as applied to claims 1 and 13 above, and in view of Koo et al. (Pub. No.: US 2021/0126060 A1), hereinafter as Koo. Regarding claim 3, LEE discloses the display panel of claim 1, but fails to disclose further comprising a metal residue between the first cantilever portion and the lower layer. Koo discloses a display panel in Fig. 8 comprising a metal residue (portion of electrode 223 being metal in groove G) between a first cantilever portion (tip 251) and a lower layer (interlayer insulating layer 207) (see Fig. 9 and [0118], [0130]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the display panel of LEE to have the metal residue between the first cantilever portion and the lower layer as same as display panel of Koo because the modified structure would provide a reliable and efficient way for forming a display panel with lowering manufacturing cost by cutting a few processes of removing and etching the portion of light emitting diode within the groove. Regarding claim 15, LEE discloses the electronic apparatus of claim 13, but fails to disclose further comprising a metal residue between the first cantilever portion and the lower layer. Koo discloses an electronic apparatus in Figs. 1, 4 and 8 comprising a metal residue (portion of electrode 223 being metal in groove G) between a first cantilever portion (tip 251) and a lower layer (interlayer insulating layer 207) (see Fig. 9 and [0118], [0130]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the electronic apparatus of LEE to have the metal residue between the first cantilever portion and the lower layer as same as electronic apparatus of Koo because the modified structure would provide a reliable and efficient way for forming a display panel with lowering manufacturing cost by cutting a few processes of removing and etching the portion of light emitting diode within the groove. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to CUONG B NGUYEN whose telephone number is (571)270-1509 (Email: CuongB.Nguyen@uspto.gov). The examiner can normally be reached Monday-Friday, 8:30 AM-5:00 PM Eastern Standard Time. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven H. Loke can be reached on (571) 272-1657. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CUONG B NGUYEN/Primary Examiner, Art Unit 2818
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Prosecution Timeline

Mar 08, 2024
Application Filed
Oct 14, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

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Prosecution Projections

1-2
Expected OA Rounds
88%
Grant Probability
99%
With Interview (+15.3%)
2y 4m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 983 resolved cases by this examiner. Grant probability derived from career allowance rate.

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