DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3, 4 are rejected under 35 U.S.C. 103 as being unpatentable over Hu (US-20190302819-A1) in view of Li (US-20150378386-A1).
Regarding claim 1: Hu, Fig. 3, discloses an operational amplifier (error amplifier 308) to amplify a difference between a reference voltage (Vref) and a feedback voltage (feedback input to 308a) and output a bias signal (bias voltage provided for bias current transistor 320 (paragraph [0029])) based on the difference; a replica device (314 comprising replica pass transistor 316) coupled to the op amp (EA 308a/308b), the replica device (314a) having a gate terminal (gate of replica pass transistor 316 (paragraph [0029]) to receive the bias signal (bias voltage provided for bias current transistor 320 (paragraph [0029])); and an output stage (302) coupled to the replica device (314a) and to output a regulated voltage (Vout at node 306), the output stage comprising a pass device (310a),
However, Hu does not expressly disclose the claimed plurality of selectively enabled feedback devices based on output power level of a power amplifier, nor a power amplifier receiving the regulated voltage.
LI, figure 1, discloses a plurality of feedback devices (output filter 105, feedback resistor Rf1, and feedback resistor Rf2) coupled to the pass device (output stage coupled to output filter 105 and feedback network RF1/Rf2), wherein a selected number of the plurality of feedback devices (output filter 105, feedback resistors Rf1 and Rf2) collectively provide the feedback path that generates feedback signal VFB; a power amplifier (308), the power amplifier (308) to receive the regulated voltage (306).
It would have been obvious to one of having ordinary skill in the art at the time the invention was effectively filed to modify Hu to incorporate the plurality of feedback devices taught by Li into the voltage regulator Hu because Li teaches that multiple feedback elements collectively generate the feedback signal used for regulation. Such a modification would have yielded the predictable result of providing a suitable feedback network for regulating the output voltage while employing known feedback techniques.
Regarding claim 3: Hu further discloses a bias circuit including error amplifier 308 and replica device (paragraph [0028]). Replica device 314 includes replica pass transistor 316, which receives the bias signal from the error amplifier and operates within the regulator feedback/biasing loop to regulate the output voltage [0028-0030]. Under the broadest reasonable interpretation, replica device (including replica pass transistor 316) reasonably corresponds to the claimed replica device that replicates a feedback device within the regulator output stage because it receives the bias signal from the error amplifier and operates within the regulator feedback path to regulate the output voltage.
Regarding claim 4: Hu, Fig. 3, discloses wherein the replica device (314 comprising replica pass transistor 316) (paragraphs [0028]-[0030]), comprises a first terminal coupled to the regulator feedback path (318 and bias current transistor 320 in the replica regulation path).
Hu does not disclose the claimed voltage divider providing the feedback voltage to the op amp.
Li discloses the voltage divider to provide the feedback voltage (configured to generate feedback signal VFB) to the op amp (error amplifier 2011), and a third terminal coupled to a reference voltage node (coupled through resistor 318 in the replica path) via a resistor (RF1/RF2).
It would have been obvious to one of having ordinary skill in the art at the time the invention was effectively filed to incorporate Li’s voltage-divider feedback network into Hu’s regulator to provide a feedback voltage to the op amp using known voltage feedback techniques.
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Hu (US-20190302819-A1) in view of Li (US-20150378386-A1) as applied to claim 1 above, and in further view of Koroglu et al. (US-11190147-B1)
Regarding Claim 2: Hu as modified by Li does not disclose the power amplifier comprises a plurality of slices, the selected number of the plurality of feedback devices based at least in part on a number of the plurality of slices to be enabled.
Koroglu, Fig. 6, teaches a power amplifier comprising a plurality of independently controllable slices, wherein the number of enabled slices is adjusted based on operating conditions, thereby teaching selection based on the number of slices enabled (column 9 lines 17- 20, lines 30-32; column 11 line 20).
It would have been obvious to one of having ordinary skill in the art at the time the invention was effectively filed to modify the power amplifier of Hu, as modified by Li, to incorporate Koroglu’s teaching of a plurality of selectively enabled slices in order to provide adaptive operation based on output power, thereby improving power efficiency while maintaining desired amplifier performance.
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Hu (US-20190302819-A1) in view of Li (US-20150378386-A1) as applied to claim 1 above, and in further view of Khlat et al. (US-20180309414-A1).
Regarding claim 5: Hu as modified by Li does not disclose a controller to enable the selected number of the plurality of feedback devices based at least in part on a modulation coding scheme (MCS) index for a wireless transmission by the power amplifier.
Khlat, Fig. 3, discloses a controller (control circuit 68) (paragraph [0033] lines 1-5) to enable the selected number of the plurality of feedback devices (Li’s output filter 105, feedback resistor Rf1, and feedback resistor Rf2) based at least in part on a modulation coding scheme (MCS) index for a wireless transmission by the power amplifier (30) (paragraph [0025] lines 15-27). Control circuit 68 is configured to control operation of the ET amplifier circuitry. Khlat further teaches that different MCS selections for wireless transmission produce differing amplifier operating requirements, thereby providing context for the operation of control circuit 68 in controlling the ET amplifier circuitry.
It would have been obvious to one of having ordinary skill in the art at the time the invention was effectively filed to configure the controller of Khlat to control the selective enabling of plurality of feedback devices of Hu as modified by Li, to yield the predictable result of improved amplifier performance.
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Hu (US-20190302819-A1), Li (US-20150378386-A1), and Khlat et al. (US-20180309414-A1), as applied to claim 5 above, and further in view of Koroglu et al. (US-11190147-B1).
Regarding claim 6: Hu as modified by Li, and Khlat does not disclose the controller comprises a lookup table, the controller to obtain a control code based at least in part on the output power level and send the control code to selectively enable or disable each of the plurality of feedback devices.
Koroglu, Fig. 6, and Fig. 7, discloses the controller (digital baseband circuitry 610, DPD circuit 612, auxiliary scaling circuit 614, and associated control circuitry) comprises a lookup table (LUT) (column 2 lines 11-12), the controller to obtain a control code based at least in part on the output power level and send the control code to selectively enable or disable (circuitry according to the desired operating mode, thereby teaching a controller-based selective enabling of circuit elements according to operating conditions.
It would have been obvious to one of having ordinary skill in the art at the time the invention was effectively filed to further modify the combined teachings of Hu, Li, and Khlat by incorporating Koroglu’s lookup-table based controller technique so that the controller selectively enables the desired feedback device(s) according to the operating mode or output power level to improve adaptive power management.
Claims 11, 12 are rejected under 35 U.S.C. 103 as being unpatentable over Hu (US-20190302819-A1) in view of Li (US-20150378386-A1) as applied to claim 1 above, and in further view of Maxim et al. (US-20200091878-A1).
Regarding claim 11: Hu as modified by Li, fig. 3, discloses wherein the apparatus comprises a voltage regulator (Vout at node 306) for the power amplifier (error amplifier 308), the pass device (310a) coupled to the output node without a compensation capacitor.
However, Hu as modified by Li does not teach the voltage regulator to provide analog memory effect compensation,
Maxim, Fig. 4A, teaches compensating memory effects in an envelope-tracked power amplifier by generating an error correction current using a replica circuit and current mirror to compensate for nonlinear I/O capacitance caused by envelope tracking. (paragraphs [0004] lines 1-3, [0005] lines 2-4, [0006] lines 8-9, [0007] lines 9-11, [0036]-[0038]).
It would have been obvious to one of having ordinary skill in the art at the time the invention was effectively filed to incorporate Maxim’s memory-effect compensation techniques into Hu and Li’s voltage regulator architecture to mitigate memory effects and thereby improve amplifier linearity and reduce distortion associated with envelope tracking.
Regarding claim 12: Hu as modified by Li does not disclose the power amplifier is to operate without dynamic digital pre-distortion.
Maxim teaches compensating envelope-tracking-induced memory effects using an analog replica circuit and current mirror architecture rather than relying on dynamic digital predistortion. A person of ordinary skill in the art would have recognized that the disclosed analog memory-effect compensation technique reduces memory effects without relying on dynamic digital predistortion (paragraphs [0004] lines 9-11, [0005] lines2-13, [0036]-[0038], [0040] lines 6-7).
It would have been obvious to one of having ordinary skill in the art at the time the invention was effectively filed to incorporate Maxim’s analog memory-effect compensation techniques into Hu and Li’s voltage regulator architecture to mitigate memory effects, reduce distortion, improve amplifier linearity, and achieve effective analog compensation without relying on dynamic digital predistortion.
Claims 13 - 15 are rejected under 35 U.S.C. 103 as being unpatentable over Hu (US-20190302819-A1) in view of Koroglu et al. (US-11190147-B1)
Regarding claim 13: Hu, Fig. 3, discloses a method comprising: determining, in a controller of a wireless device, a power amplifier (error amplifier 308) of the wireless device; the voltage regulator (306) to couple to an output node (Vout at node 306) of the voltage regulator (306), the output node to provide a regulated voltage (Vout at node 306) to the power amplifier (error amplifier 308).
However, Hu does not teach an output power level for a wireless transmission to be output via based at least in part on the output power level, determining a number of output stage feedback slices of a voltage regulator to be enabled; and configuring the number of output stage feedback slices.
Koroglu, Fig. 6, teaches an output power level for a wireless transmission to be output via based at least in part on the output power level, determining a number of output stage feedback slices of a voltage regulator to be enabled; and configuring the number of output stage feedback slices. Koroglu discloses operating a power amplifier at different output power levels, including selectively enabling amplifier circuitry depending on the desired transmission output power. Accordingly, Koroglu teaches determining amplifier operation based at least in part on the output power level and configuring the active amplifier architecture accordingly (column 9 lines 17- 20, lines 30-32; column 11 line 20).
It would have been obvious to one of having ordinary skill in the art at the time the invention was effectively filed to modify the voltage regulator architecture of Hu, to incorporate Koroglu’s adaptive output-power-based control techniques so that the number of enabled output-stage feedback slices may be selected according to desired transmission output power, thereby improving power efficiency while maintaining desired amplifier performance.
Regarding claim 14: Hu Fig. 3, further teaches each of the number of output stage feedback slices (302, 304) to be coupled to the output node (306) of the voltage regulator to provide a load current for the power amplifier (308). However, Hu does not teach a current source.
Koroglu discloses a current source of each of the number of output stage feedback slices to be coupled to the output node of the voltage regulator to provide a load current for the power amplifier. Causing a corresponding current source (Koroglu, fig. 6, current source (column 9, lines 17-20) of each of the number of output stage feedback slices (Hu, 302, 304) to be coupled to the output node ()
It would have been obvious to one of having ordinary skill in the art at the time the invention was effectively filed to modify the voltage regulator architecture of Hu to incorporate Koroglu’s current-source architecture in order to provide load current for the power amplifier while improving power efficiency.
Regarding claim 15: Hu Fig. 3, further teaches amplifying, in an operational amplifier (308) of the voltage regulator (306), a difference between a feedback voltage and a reference voltage; outputting a bias signal (bias voltage provided for bias current transistor 320 (paragraph [0029])) based on the difference; and providing the bias signal (bias voltage provided for bias current transistor 320 (paragraph [0029])) to a corresponding feedback device of each of the number of output stage feedback slices.
Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over Hu (US-20190302819-A1) in view of Koroglu et al. (US-11190147-B1), as applied to claim 13 above, and further in view of Maxim et al. (US-20200091878-A1).
Regarding claim 16: Hu, as modified by Koroglu does not disclose the regulated voltage to the power amplifier with a bandwidth sufficient to operate the power amplifier without digital memory effect compensation.
Maxim, Fig. 4A, teaches the regulated voltage to the power amplifier with a bandwidth sufficient to operate the power amplifier without digital memory effect compensation. Maxim further teaches that as modulation bandwidth increases, memory effects become more significant and teaches compensating those memory effects in an envelope-tracked power amplifier by generating an error correction current using a replica circuit and current mirror to compensate for nonlinear I/O capacitance caused by envelope tracking. (paragraphs [0004] lines 1-3, [0005] lines 2-4, [0006] lines 8-9, [0007] lines 9-11, [0036]-[0038]).
It would have been obvious to one of having ordinary skill in the art at the time the invention was effectively filed to incorporate Maxim’s analog memory-effect compensation into combination of Hu and Koroglu’s voltage regulator architecture so that the envelope-tracked power amplifier could operate over increased modulation bandwidths while mitigating memory effects, thereby improving linearity and reducing distortion without relying on digital memory-effect compensation.
Claims 17, 18 are rejected under 35 U.S.C. 103 as being unpatentable over El-Hassan et al. (US-20190319583-A1) in view of Hu (US-20190302819-A1) , Li (US-20150378386-A1) and Koroglu et al. (US-11190147-B1).
Regarding claim 17: El-Hassan, Fig. 7., discloses a system comprising: a digital circuit to generate a digital message (a transmitter including data processing circuitry configured to process digital data symbols for transmission, including digital gain control circuitry and digital predistortion circuitry that generate digital signals supplied to a digital-to-analog converter (DAC 66) (paragraphs [0022],[0031], lines 12-13. [0042]; a digital-to-analog converter (DAC 66) to convert the digital message to an analog signal; a mixer (68) to upconvert the analog signal to a radio frequency (RF) signal (54) (paragraph [0042] line 20-26); a power amplifier (56) coupled to the mixer (68) to amplify the RF signal (54) and output an amplified RF signal (54) (page 4, paragraph [0042] lines 20-30, page 5, (paragraph [0042] line 1)), the power amplifier (56) comprising a plurality of slices to be individually controlled to output the amplified RF signal (54) at a selected power level, a voltage regulator coupled to the power amplifier (56) ([0043], (El-Hassan discloses a power amplifier power supply path 70 coupled to the power amplifier (56) (paragraph [0043]), the power amplifier supply path including a voltage supply DAC73 and Dynamic voltage supply 74 configured to regulate the voltage supplied to the power amplifier (56)) the voltage regulator to provide a regulated voltage to the power amplifier (56) at a current level sufficient for the selected power level (The power amplifier power supply path 70 regulates the voltage supplied to the power amplifier based on operating conditions and input signal characteristics (paragraphs [0043]-[0046]).
However, El-Hassan does not teach the voltage regulator comprising: a bias circuit comprising an operational amplifier (error amp ) to amplify a difference between a reference voltage and a feedback voltage and output a bias signal based on the difference; and an output stage coupled to the bias circuit and to output the regulated voltage, the output stage comprising a pass device and a plurality of feedback devices coupled to the pass device, wherein a selected number of the plurality of feedback devices are to be enabled based at least in part on the selected power level and to receive the bias signal.
Hu, Fig. 3, discloses the voltage regulator (300) comprising: a bias circuit comprising an operational amplifier (the bias signal being provided to replica pass transistor 316 and bias-current transistor 320) to amplify a difference between a reference voltage (Vref) and a feedback voltage feedback input to 308) and output a bias signal based on the difference (bias voltage provided for bias current transistor 320 (paragraph [0029])); and an output stage coupled to the bias circuit and to output the regulated voltage, the output stage (302) comprising a pass device (310a).
It would have been obvious to one of having ordinary skill in the art at the time the invention was effectively filed to substitute Hu’s known voltage regulator architecture for the voltage regulator employed in El-Hassan’s power amplifier supply path in order to prove a regulated supply voltage using an error amplifier/pass-device regulator architecture, improving voltage regulation and maintaining suitable operating conditions for the power amplifier.
However, El-Hassan and Hu do not teach a plurality of feedback devices coupled to the pass device, wherein a selected number of the plurality of feedback devices are to be enabled based at least in part on the selected power level and to receive the bias signal.
Li, Fig. 1, discloses a plurality of feedback devices (output filter 105, feedback resistor Rf1, and feedback resistor Rf2) coupled to the pass device (output stage coupled to output filter 105 and feedback network RF1/Rf2).
It would have been obvious to one of having ordinary skill in the art at the time the invention was effectively filed to incorporate Li’s plurality of feedback devices into the voltage regulator architecture of El-Hassan as modified by Hu in order to provide a known feedback network for regulating the output voltage, thereby improving voltage regulation while maintaining stable operation of the power amplifier.
However, El-Hassan, Hu, and Li do not disclose wherein a selected number of the plurality of feedback devices are to be enabled based at least in part on the selected power level and to receive the bias signal.
Koroglu, Fig. 7, wherein a selected number of the plurality of feedback devices (output filter 105, feedback resistors Rf1 and Rf2) are to be enabled based at least in part on the selected power level and to receive the bias signal. (column 9 lines 17- 20, lines 30-32; column 11 line 20).
It would have been obvious to one of having ordinary skill in the art at the time the invention was effectively filed to further modify El-Hassan, Hu, and Li combination to incorporate Koroglu’s selective enabling technique because Koroglu teaches enabling a selected number of amplifier circuit elements according to operating conditions and output power, while improving power efficiency.
Regarding claim 18: El-Hassan as modified by Hu and Li does not disclose further comprising a controller coupled to the voltage regulator, wherein the controller is to provide, based at least in part on the selected power level, a control code to cause the selected number of the plurality of feedback devices to be enabled.
Koroglu, Fig. 6 and Fig. 7, does further comprising a controller (digital baseband circuitry 610, DPD circuit 612, auxiliary scaling circuit 614, and associated control circuitry) coupled to the voltage regulator, wherein the controller is to provide, based at least in part on the selected power level, a control code to cause the selected number of the plurality of feedback devices to be enabled (Li’s output filter 105, feedback resistor Rf1, and feedback resistor Rf2) (control signals that selectively enable amplifier circuitry (ex: auxiliary amplifier path 640A) while disabling other circuitry according to operating conditions (column 9, lines 17-20; column 9, lines 30-32; column 11, line 20)).
It would have been obvious to one of having ordinary skill in the art at the time the invention was effectively filed to further modify the El-Hassan, Hu, and Li combination to incorporate Koroglu’s controller-based enablement technique so that the selection of enabled feedback devices could be automatically controlled according to the desired output power level, improving adaptive power management while reducing unnecessary power consumption.
Allowable Subject Matter
Claims 7-10, 19, 20 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
Regarding claim 7: None of the references teach the claimed third terminal of a plurality of first switches the first switch to enable the corresponding feedback device based on a bit of the control code.
Regarding claims 8-10: depend therefrom claim 7 and include the same allowable features.
Regarding claim 19: None of the references teach the claimed a multi-slice power amplifier to operate with an error vector magnitude of at least minus 45 decibels, and wherein the power amplifier is to operate without dynamic digital memory effect compensation.
Regarding claim 20: None of the references teach the claimed the supply voltage is less than a threshold, the voltage regulator is to operate in a bypass mode in which the output stage is to operate as a low resistance switch to pass the supply voltage.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NATASHA Y MARANO whose telephone number is (571)272-9512. The examiner can normally be reached Mon - Fri 7:30am - 3:30pm.
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/Jessica Han/Supervisory Patent Examiner, Art Unit 2843
NATASHA Y. MARANO
Examiner
Art Unit 2843
Prosecution Insights