Prosecution Insights
Last updated: July 17, 2026
Application No. 18/602,457

PROVIDING A PROGRESS BAR WITH AN IMPROVED ESTIMATED TIME

Non-Final OA §101§103
Filed
Mar 12, 2024
Priority
Feb 01, 2024 — GB 2401304.7
Examiner
CASTANEDA, IVAN ALEXANDER
Art Unit
2195
Tech Center
2100 — Computer Architecture & Software
Assignee
International Business Machines Corporation
OA Round
1 (Non-Final)
67%
Grant Probability
Favorable
1-2
OA Rounds
1y 1m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 67% — above average
67%
Career Allowance Rate
4 granted / 6 resolved
+11.7% vs TC avg
Strong +67% interview lift
Without
With
+66.7%
Interview Lift
resolved cases with interview
Typical timeline
3y 5m
Avg Prosecution
19 currently pending
Career history
41
Total Applications
across all art units

Statute-Specific Performance

§101
1.6%
-38.4% vs TC avg
§103
94.4%
+54.4% vs TC avg
§102
0.8%
-39.2% vs TC avg
§112
3.2%
-36.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 6 resolved cases

Office Action

§101 §103
DETAILED ACTION This Office Action is in response to claim filed on 03/12/2024. Claims 1-20 are pending. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 101 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claims 1-20 are rejected under 35 U.S.C. 101 because the claimed invention recites a judicial exception, is directed to that judicial exception, an abstract idea, as it has not been integrated into practical application and the claims further do not recite significantly more than the judicial exception. Examiner has evaluated the claims under the framework provided by the 2019 Patent Eligibility guidance published in the Federal Register 01/07/2019 and has provided such analysis below. Step 1: Claims 1-10 are directed to methods and fall within the statutory category of processes; Claims 11-19 are directed to systems and fall within the statutory category of machines; and Claim 20 is directed to computer readable mediums and fall within the statutory category of articles of manufacture. Therefore, “Are the claims to a process, machine, manufacture, or composition of matter?” Yes. In order to evaluate the Step 2A inquiry “Is the claim directed to a law of nature, a natural phenomenon or an abstract idea?” we must determine, at Step 2A Prong 1, whether the claim recites a law of nature, a natural phenomenon or an abstract idea and further whether the claim recites additional elements that integrate the judicial exception into a practical application. Step 2A Prong 1: Claim 1: The limitation of “calculating an initial estimated time to completion value for a current task based on current available resources at the host system”, as drafted, is a process that, but for the recitation of generic computing components, under its broadest reasonable interpretation, covers performance of the limitation of the mind. For example, a person can mentally observe an available resource to perform a task and mentally think about and evaluate, with or without the use of pen and paper, a duration for the completion of such task. Further, the limitation of “determining any scheduled tasks at the host system scheduled in the initial estimated time to completion value for the current task, wherein the scheduled tasks are not part of the current task”, as drafted, is a process that, but for the recitation of generic computing components, under its broadest reasonable interpretation, covers performance of the limitation of the mind. For example, a person can mentally observe a list of scheduled tasks and mentally think and evaluate, with or without the use of pen and paper, overlapping tasks scheduled to occur within an estimated window of time. Moreover, the limitation of “adjusting the initial estimated time to completion value of the current task based on an estimated impact of the scheduled tasks on the host resources”, as drafted, is a process that, but for the recitation of generic computing components, under its broadest reasonable interpretation, covers performance of the limitation of the mind. For example, a person can mentally think and evaluate, with or without the use of pen and paper, a duration of time for a task and revise the duration in association with the duration of unrelated, concurrent tasks. Therefore, Yes, claim 1 recites judicial exceptions. The claim has been identified to recite judicial exceptions, Step 2A Prong 2 will evaluate whether the claims are directed to the judicial exception. Step 2A Prong 2: Claim 1: The judicial exception is not integrated into a practical application. In particular the claims recite the following additional elements – “a host system”, “current available resources at the host system”, and “host resources” which are merely recitations of generic computing components or other machinery merely as tools to apply the abstract idea (see MPEP § 2106.05(f)) which does not integrate a judicial exception into practical application. Therefore, “Do the claims recite additional elements that integrate the judicial exception into practical application?” No, these additional elements do not integrate the abstract idea into practical application and they do not impose any meaningful limits on practicing the abstract idea. The claim is directed to an abstract idea. After having evaluated the inquiries set forth in Steps 2A Prong 1 and 2, it has concluded that claim 1 not only recites a judicial exception but the claim is directed to the judicial exception has not been integrated into practical application. Step 2B: Claim 1: The claim does not include additional elements, alone or in combination, that are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into practical application, the additional elements amount to no more than generic computing components or other machinery as tools to apply the abstract idea which does not amount to significantly more than the abstract idea. Therefore, “Do the claims recite additional elements to significantly more than the judicial exception?” No, these additional elements, alone or in combination, do not amount to significantly more than the judicial exception. Having concluded analysis within the provided framework, Claim 1 does not recite patent eligible subject matter under 35 U.S.C. § 101. With regard to claim 2, the claim recites additional elements of “displaying the estimated time to completion value of a task” and “displaying a message indicating a cause of negative change in the estimated time to completion value” which are merely recitation of insignificant extra-solution activity amounting to mere data outputting (see MPEP § 2106.05(g)) which does not integrate a judicial exception into practical application and is also Well-Understood, Routine, and Conventional. See MPEP § 2106.05 (d)(I) “2. A factual determination is required to support a conclusion that an additional element (or combination of additional elements) is well-understood, routine, conventional activity.” The evidentiary requirement referenced here is found in MPEP § 2106.07 (a)(III) “(B) A citation to one or more of the court decisions discussed in MPEP § 2106.05 (d), subsection II, as noting the well-understood, routine, and conventional nature of the additional element(s).” See MPEP § 2106.05(d)(II) “The courts have recognized the following computer functions as well-understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g. at a high level of generality) or as insignificant extra solution activity. i. Receiving or transmitting data over a network, e.g., using the Internet to gather data.” That is, in the instant claims these limitations merely transmit and display data which is Well-Understood, Routine, and Conventional. Further, claim 2 recites an additional element regarding “updating the display when estimated time to completion value is changed” which is recitation of mere instructions to apply the abstract idea (see MPEP § 2106.05(f)). There, the “update” function is cited at such a high level of generality that these additional elements do not integrate a judicial exception into practical application. Claim 2 does not recite any additional elements and for the same reasons as above with regard to integration into practical application and whether additional elements amount to significantly more, claim 2 fails both Step 2A prong 2, thus the claim is directed to a judicial exception as it has not been integrated into practical application and fails Step 2B as not amounting to significantly more. Therefore, Claim 2 does not recite patent eligible subject matter under 35 U.S.C. § 101. With regard to claim 3, it recites additional elements of “a single display” which is merely recitation of generic computing components or other machinery merely as tools to apply the abstract idea (see MPEP § 2106.05(f)) which does not integrate a judicial exception into practical application. Further the claim recites additional elements of “displaying an estimated time to completion of multiple tasks that are involved in a job” which is insignificant extra-solution activity amounting to mere data outputting (see MPEP § 2106.05(g)) which does not integrate a judicial exception into practical application and is also Well-Understood, Routine, and Conventional. See MPEP § 2106.05 (d)(I) “2. A factual determination is required to support a conclusion that an additional element (or combination of additional elements) is well-understood, routine, conventional activity.” The evidentiary requirement referenced here is found in MPEP § 2106.07 (a)(III) “(B) A citation to one or more of the court decisions discussed in MPEP § 2106.05 (d), subsection II, as noting the well-understood, routine, and conventional nature of the additional element(s).” See MPEP § 2106.05(d)(II) “The courts have recognized the following computer functions as well-understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g. at a high level of generality) or as insignificant extra solution activity. i. Receiving or transmitting data over a network, e.g., using the Internet to gather data.” That is, in the instant claims these limitations merely transmit and display data which is Well-Understood, Routine, and Conventional. Claim 3 does not recite any additional elements and for the same reasons as above with regard to integration into practical application and whether additional elements amount to significantly more, claim 3 fails both Step 2A prong 2, thus the claim is directed to a judicial exception as it has not been integrated into practical application and fails Step 2B as not amounting to significantly more. Therefore, Claim 3 does not recite patent eligible subject matter under 35 U.S.C. § 101. With regard to claim 4, it recites an abstract idea substantially similar to the abstract idea recited in claim 1. The limitation of “calculating an initial processor estimated time for execution of the task based on metadata of previous tasks and a current processor availability”, as drafted, is a process that, but for the recitation of generic computing components, under the broadest reasonable interpretation, covers a performance of the limitation in the mind. For example, as applied to claim 1, a person can mentally observe an available resource to perform a task and a list of historical task durations and mentally think about and evaluate, with or without the use of pen and paper, a duration for the completion of such task. Claim 4 does not recite any additional elements and for the same reasons as above with regard to integration into practical application and whether additional elements amount to significantly more, claim 4 fails both Step 2A prong 2, thus the claim is directed to a judicial exception as it has not been integrated into practical application and fails Step 2B as not amounting to significantly more. Thus, Claim 4 does not recite patent eligible subject matter under 35 U.S.C. § 101. With regard to claim 5, it recites additional elements of “wherein the metadata of previous tasks includes averages of previous tasks in a common job” which is merely recitation of field of use/technological environment (see MPEP § 2106.05(h)) which does not integrate the judicial exception into practical application. Claim 5 does not recite any additional elements and for the same reasons as above with regard to integration into practical application and whether additional elements amount to significantly more, claim 5 fails both Step 2A prong 2, thus the claim is directed to a judicial exception as it has not been integrated into practical application and fails Step 2B as not amounting to significantly more. Thus, Claim 5 does not recite patent eligible subject matter under 35 U.S.C. § 101. With regard to claim 6, it recites an additional abstract idea recitation of “calculating additional estimated time for downloads in the task based on a size of a download and a current network speed”. For example, a person can mentally observe a task quantity and task operating rate and mentally think about and evaluate, with or without the use of pen and paper, a task duration for the completion of such task. Claim 6 does not recite any additional elements and for the same reasons as above with regard to integration into practical application and whether additional elements amount to significantly more, claim 6 fails both Step 2A prong 2, thus the claim is directed to a judicial exception as it has not been integrated into practical application and fails Step 2B as not amounting to significantly more. Thus, Claim 6 does not recite patent eligible subject matter under 35 U.S.C. § 101. With regard to claim 7, it recites an additional abstract idea recitation of “calculating additional processor estimated time for a scheduled task based on the metadata of previous executions of scheduled tasks and a current processor availability”, as drafted, is a process that, but for the recitation of generic computing components, under the broadest reasonable interpretation, covers a performance of the limitation in the mind. For example, as applied to claim 6, a person can mentally observe a task quantity and task operating rate and mentally think about and evaluate, with or without the use of pen and paper, a task duration for the completion of such task. Claim 7 does not recite any additional elements and for the same reasons as above with regard to integration into practical application and whether additional elements amount to significantly more, claim 7 fails both Step 2A prong 2, thus the claim is directed to a judicial exception as it has not been integrated into practical application and fails Step 2B as not amounting to significantly more. Thus, Claim 7 does not recite patent eligible subject matter under 35 U.S.C. § 101. With regard to claim 8, it recites an additional abstract idea recitation of “calculating additional estimated time for downloads in a scheduled in a scheduled task based on a size of the download and a current network speed”, as drafted, is a process that, but for the recitation of generic computing components, under the broadest reasonable interpretation, covers a performance of the limitation in the mind. For example, as applied to claim 6, a person can mentally observe a task quantity and task operating rate and mentally think about and evaluate, with or without the use of pen and paper, a task duration for the completion of unrelated, concurrent task. Claim 8 does not recite any additional elements and for the same reasons as above with regard to integration into practical application and whether additional elements amount to significantly more, claim 8 fails both Step 2A prong 2, thus the claim is directed to a judicial exception as it has not been integrated into practical application and fails Step 2B as not amounting to significantly more. Thus, Claim 8 does not recite patent eligible subject matter under 35 U.S.C. § 101. With regard to claim 9, it recites an additional abstract idea recitation. The limitation of “multiplying the initial estimated time (iCpEt) by two, then multiplying this value by the scheduled tasks’ processor utilization (Scp), then adding back on the initial estimated time (iCpEt)”, as drafted, under the broadest reasonable interpretation, recites a mathematical concept. Particularly, the limitation recites performing a series of mathematical operations, specifically multiplication and addition, upon the recited variables of iCpEt and Scp in order to produce an adjusted estimated time value which is an abstract idea under mathematical calculations (see MPEP § 2106.04(a)(2)(C)). Claim 9 does not recite any additional elements and for the same reasons as above with regard to integration into practical application and whether additional elements amount to significantly more, claim 9 fails both Step 2A prong 2, thus the claim is directed to a judicial exception as it has not been integrated into practical application and fails Step 2B as not amounting to significantly more. Thus, Claim 9 does not recite patent eligible subject matter under 35 U.S.C. § 101. With regard to claim 10, it recites additional elements of “monitoring a host system continually to identify scheduled tasks, logging their start time, average time to completion, processor usage, and network usage” which is recitation of mere instructions to apply the abstract idea (see MPEP § 2106.05(f)). There, the “monitoring” function is cited at such a high level of generality that these additional elements do not integrate a judicial exception into practical application. Claim 10 does not recite any additional elements and for the same reasons as above with regard to integration into practical application and whether additional elements amount to significantly more, claim 10 fails both Step 2A prong 2, thus the claim is directed to a judicial exception as it has not been integrated into practical application and fails Step 2B as not amounting to significantly more. Therefore, Claim 10 does not recite patent eligible subject matter under 35 U.S.C. § 101. With regard to claim 11, the above analysis is incorporated herein by substantial similarity to claim 1 as it applies equally to claim 11 except that in claim 11 recites additional elements not include in claim 1: “at least one processor”, “at least one computer-readable storage media”, and “instructions, collectively stored in the at least one storage media, for causing the at least one processor to perform the following computer operations” which are merely a recitations of generic computing components or other machinery merely as tools to apply the abstract idea (see MPEP § 2106.05(f)) which does not integrate a judicial exception into practical application. Claim 11 does not recite any additional elements and for the same reasons as above with regard to integration into practical application and whether additional elements amount to significantly more, claim 11 fails both Step 2A prong 2, thus the claim is directed to a judicial exception as it has not been integrated into practical application and fails Step 2B as not amounting to significantly more. Therefore, Claim 11 does not recite patent eligible subject matter under 35 U.S.C. § 101. With regard to claim 12, it recites additional elements of “run continual estimated time calculations whilst a task is in progress” which is recitation of mere instructions to apply the abstract idea (see MPEP § 2106.05(f)). There, the “run” function is cited at such a high level of generality that these additional elements do not integrate a judicial exception into practical application. Claim 12 does not recite any additional elements and for the same reasons as above with regard to integration into practical application and whether additional elements amount to significantly more, claim 12 fails both Step 2A prong 2, thus the claim is directed to a judicial exception as it has not been integrated into practical application and fails Step 2B as not amounting to significantly more. Therefore, Claim 12 does not recite patent eligible subject matter under 35 U.S.C. § 101. With regard to claim 13, the above analysis is incorporated herein by substantial similarity to claim 2 as it applies equally to claim 13. Claim 13 does not recite any additional elements and for the same reasons as above with regard to integration into practical application and whether additional elements amount to significantly more, claim 13 fails both Step 2A prong 2, thus the claim is directed to a judicial exception as it has not been integrated into practical application and fails Step 2B as not amounting to significantly more. Therefore, Claim 13 does not recite patent eligible subject matter under 35 U.S.C. § 101. With regard to claim 14, the above analysis is incorporated herein by substantial similarity to claim 3 as it applies equally to claim 14. Claim 14 does not recite any additional elements and for the same reasons as above with regard to integration into practical application and whether additional elements amount to significantly more, claim 14 fails both Step 2A prong 2, thus the claim is directed to a judicial exception as it has not been integrated into practical application and fails Step 2B as not amounting to significantly more. Therefore, Claim 14 does not recite patent eligible subject matter under 35 U.S.C. § 101. With regard to claim 15, the above analysis is incorporated herein by substantial similarity to claim 4 as it applies equally to claim 15. Claim 15 does not recite any additional elements and for the same reasons as above with regard to integration into practical application and whether additional elements amount to significantly more, claim 15 fails both Step 2A prong 2, thus the claim is directed to a judicial exception as it has not been integrated into practical application and fails Step 2B as not amounting to significantly more. Therefore, Claim 15 does not recite patent eligible subject matter under 35 U.S.C. § 101. With regard to claim 16, the above analysis is incorporated herein by substantial similarity to claim 6 as it applies equally to claim 16. Claim 16 does not recite any additional elements and for the same reasons as above with regard to integration into practical application and whether additional elements amount to significantly more, claim 16 fails both Step 2A prong 2, thus the claim is directed to a judicial exception as it has not been integrated into practical application and fails Step 2B as not amounting to significantly more. Therefore, Claim 16 does not recite patent eligible subject matter under 35 U.S.C. § 101. With regard to claim 17, the above analysis is incorporated herein by substantial similarity to claim 7 as it applies equally to claim 17. Claim 17 does not recite any additional elements and for the same reasons as above with regard to integration into practical application and whether additional elements amount to significantly more, claim 17 fails both Step 2A prong 2, thus the claim is directed to a judicial exception as it has not been integrated into practical application and fails Step 2B as not amounting to significantly more. Therefore, Claim 17 does not recite patent eligible subject matter under 35 U.S.C. § 101. With regard to claim 18, the above analysis is incorporated herein by substantial similarity to claim 8 as it applies equally to claim 18. Claim 18 does not recite any additional elements and for the same reasons as above with regard to integration into practical application and whether additional elements amount to significantly more, claim 18 fails both Step 2A prong 2, thus the claim is directed to a judicial exception as it has not been integrated into practical application and fails Step 2B as not amounting to significantly more. Therefore, Claim 18 does not recite patent eligible subject matter under 35 U.S.C. § 101. With regard to claim 19, the above analysis is incorporated herein by substantial similarity to claim 10 as it applies equally to claim 19. Claim 19 does not recite any additional elements and for the same reasons as above with regard to integration into practical application and whether additional elements amount to significantly more, claim 19 fails both Step 2A prong 2, thus the claim is directed to a judicial exception as it has not been integrated into practical application and fails Step 2B as not amounting to significantly more. Therefore, Claim 19 does not recite patent eligible subject matter under 35 U.S.C. § 101. With regard to claim 20, the above analysis is incorporated herein by substantial similarity to claim 1 as it applies equally to claim 20. Claim 20 does not recite any additional elements and for the same reasons as above with regard to integration into practical application and whether additional elements amount to significantly more, claim 20 fails both Step 2A prong 2, thus the claim is directed to a judicial exception as it has not been integrated into practical application and fails Step 2B as not amounting to significantly more. Therefore, Claim 20 does not recite patent eligible subject matter under 35 U.S.C. § 101. Therefore, Claims 1-20 do not recite patent eligible subject matter under 35 U.S.C. § 101. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 11, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Sirkin Patent No. 5,978,832 (hereinafter Sirkin) in view of Yamasaki et al. Patent No. US 9,697,049 B2 (hereinafter Yamasaki). With regard to claim 1, Sirkin teaches a computer-implemented method for providing a progress bar with an improved estimated time of task at a host system (Abstract, A method and system for estimating the time to completion of a task being executed on a multitasking workstation potentially subject to the commencement or termination of one or more other tasks … The method and system use task size, task execution rate and elapsed time to dynamically estimate the time to completion. The user is notified accordingly.), the method comprising:--- calculating an initial estimated time to completion value for a current task (Col. 2, The size of the tasks if first quantified into measurable units. Once the task is commenced, the elapsed time and units are compared to yield a rate of completion) based on current available resources at the host system (Col. 3, The status and estimated time to completion of a task invoked for execution by the central processing unit resource of workstation 1 … is affected by any time intensive shared usage. Consequently, the time to completion estimate for an operation limited by this resource is not merely based upon the speed of the processor and the size of the task but is a dynamic value which varies depending upon the workload of the central processing unit); determining any scheduled tasks at the host system scheduled in the initial estimated time to completion value for the current task, wherein the scheduled tasks are not part of the current task (Col. 3, The estimation is re-calculated upon the completion of each file to adjust the estimate for workstation resource processing rate changes attributable to variations in the number of concurrently executing tasks or the number of workstation interactive users); and adjusting the initial estimated time to completion value of the current task based on an estimated impact of the scheduled tasks on the host resources (Col. 2, The rate estimate is successively and incrementally adjusted to compensate for dynamic variations in the workload. The time to completion estimate is derived from the measures of rate, the incremental estimates of full task run time based upon such rate information, and measures of actual elapsed time.) However, Sirkin does not explicitly teach that the task determination explicitly includes scheduled tasks within the initial estimated time completion value for the current task. In a similar field of endeavor, Yamasaki teaches determining any scheduled tasks at the host system scheduled in the initial estimated time to completion value for the current task, wherein the scheduled tasks are not part of the current task (Col. 1, a management method comprise … an identifying process configured to identify an another job having a scheduled execution period overlapping with a scheduled execution period of an estimation subject job among a plurality of jobs executed at a first server from a plurality of jobs). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to apply the teachings of Yamasaki with the teachings of Sirkin in order to provide a method that teaches identification of scheduled jobs within the duration of a time estimated job. The motivation for applying Yamasaki teaching with Sirkin teaching is to provide a method that combines the known method of Yamasaki’s identification of overlapping scheduled jobs on a processing element with the known method of Sirkin’s dynamic task completion value in association with concurrent task execution to yield predictable results. Sirkin and Yamasaki are analogous art directed towards task management and task time assessment. Therefore, it would have been obvious for one of ordinary skill in the art to combine Yamasaki with Sirkin to teach the claimed invention in order to provide overlapping job identification to dynamically adjust job completion values. With regard to claim 11, Sirkin teaches a computer system for providing a progress bar with an improved estimated time of a task at a host system (Col. 3, FIG. 1 schematically illustrates a representative system by which the present invention can be practiced), the computer system comprising: at least one processor (Col. 3, Within the depiction there is shown a workstation 1 having a hard disk drive 2 and a flop disk drive 3, together with the related workstation processor); Claim 11 is a computer program product having similar limitations as claim 1. Thus, claim 11 is rejected for the same rationale as applied to claim 1. Sirkin reasonably teaches a system comprising a workstation including a processor, memory, and communication electronic generally (Sirkin, Col. 4). However, Sirkin does not explicitly teach a computer-readable storage media and instructions, collectively stored in the at least one storage media, for causing the at least one processor to perform computer operations. In a similar field of endeavor, Yamasaki teaches at least one computer-readable storage media (Col. 31, The information on the programs, tables, files, and the like for implementing the respective functions can be stored in a storage device such as a memory, a hard disk drive, or solid state drive (SSD) or a recording medium such as an IC card, and SD card, or a DVD); and instructions, collectively stored in the at least one storage media, for causing the at least one processor to perform the following computer operations (Col. 30-Col. 31, A part or entirety of the respective configurations, functions, processing modules, processing means … may be implemented by software by a processor interpreting and executing program for implementing the respective functions.) It would have been obvious to one of ordinary skill in the art at the time the invention was filed to apply the teachings of Yamasaki with the teachings of Sirkin in order to provide a system that teaches computer-readable storage media storing instructions for execution by a processor. The motivation for applying Yamasaki teaching with Sirkin teaching is to provide a system that combines Yamaski’s computer-readable storage media storing instructions with Sirkin’s computing system to generate and display estimated time of completion for a task in accordance with known methods to yield predictable results. Sirkin and Yamasaki are analogous art directed towards task management and task time assessment. Therefore, it would have been obvious for one of ordinary skill in the art to combine Yamasaki with Sirkin to teach the claimed invention in order to provide a system that execute instructions stored on a computer-readable storage media. With regard to claim 12, Sirkin and Yamasaki teach the computer system of claim 11 Sirkin further teaches further comprising instructions for causing the at least one processor to perform the following computer operations: run continual estimated time calculations whilst a task is in progress (Col. 2, The estimated is re-calculated upon the completion of each file to adjust the estimate for workstation resource processing rate changes attributable to variations in the number of concurrently executing tasks or the number of workstation users). With regard to claim 20, Sirkin teaches a computer program product for providing a progress bar with an improved estimated time of a task at a host system (Col. 4, Set forth below is pseudo code, form which source code can be derived, suitable to define the important features of the invention as might be practiced in a computer program), the computer program product comprising: Claim 20 is a computer program product having similar limitations as claim 11. Thus, claim 20 is rejected for the same rationale as applied to claim 11. Claims 2, 3, 10, 13, 14 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Sirkin in view of Yamasaki as applied to claim 1 and 11 above, and further in view of Seacat DeLuca et al. Patent No. 10,289,281 B2 (hereinafter Seacat DeLuca). With regard to claim 2, Sirkin and Yamasaki teach the method of claim 1. Sirkin further teaches displaying the estimated time to completion value of a task (Col. 4, Consider the simple example where a selected one of multiple diskettes to be copied contains 100,000 bytes. Following the copying of the first file, which is defined to be composed of 5,000 bytes and accomplished in 2 seconds, the time for loading the full diskette can be estimated to be 40 seconds. At that point, workstation 1 generates a on video display 8 an estimated time to completion of 38 seconds (40-2).); updating the display when estimated time to completion value is changed (Col. 4, As diskette loading continues, the method and system further adjusts the estimated time to completion based on an averaging of the fluctuating rate of file transfer. Therefore, each successive estimate is refined to compensate for processor rate fluctuations); and However, Sirkin does not explicitly teach displaying a message indicating a cause of a negative change in the estimated time to completion value. In a similar field of endeavor, Seacat DeLuca teaches displaying a message indicating a cause of a negative change in the estimated time to completion value (Col. 9, In one arrangement, the data processing system 140 can display an alert in the window 220 or elsewhere in the user interface responsive to the data processing system 140 detecting the status of completion of performing the task deviating from an expected status of completion by more than threshold value … for example, if the network bandwidth drops to less than half of the network bandwidth indicated in the progress profile 170, the data processing system can identify such can condition. Further, the data processing system 140 can indicate the condition in the alert). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to apply the teachings of Seacat DeLuca with the teachings of Sirkin and Yamasaki in order to provide a method that teaches negative estimated time completion value change message. The motivation for applying Seacat DeLuca teaching with Sirkin and Yamasaki teaching is to provide a method that allows for an indicator to present negative change in association to a particular resource such that enables increased system resource visibility to a user as to why the task is not proceeding as expected (Seacat DeLuca, Col. 9). Sirkin, Yamasaki, and Seacat DeLuca are analogous art directed towards computer systems status display. Therefore, it would have been obvious for one of ordinary skill in the art to combine Seacat DeLuca with Sirkin and Yamasaki to teach the claimed invention in order to provide negative change indication to increase system resource visibility. With regard to claim 3, Sirkin teaches the method of claim 2 Sirkin further teaches displaying an estimated time to completion of multiple tasks that are involved in a job in a single display (Col. 4, If the copying of the second file, defined to be composed of 55,000 bytes, is complete after an elapsed time of 16 seconds, an updated estimate of the diskette load time based upon such new rate information is in the range of 27 seconds. Consequently, the estimated time to completion is loading continues, determined and shown as 11 seconds (27-16). (Examiner notes: That is, a plurality tasks are included in a single diskette job may be displayed).). With regard to claim 10, Sirkin and Yamasaki teach the method of claim 1 Seacat DeLuca further teaches monitoring a host system continually to identify scheduled tasks, logging their start time, average time to completion, processor usage, and network usage (Col. 6, In one arrangement, to consolidate crowd sourced statistics 155 into a respective progress profile 160 for a task or type of task in particular type of hardware/software environment, the task progress prediction system 120 can identify corresponding data records for the crowd source statistics 166 including duration of time data … For each type of duration time data, the task progress prediction system 120 can compute an average duration of time from corresponding duration of time data … In addition, the task progress prediction system 120 can include in the progress profile 160 an average level of hardware and/or network resources used to perform the task and/or operations; Col. 8, The progress profile 170 can indicate parameters of such a hardware/software environment, such as a typical amount of memory, processor utilization and network bandwidth available to perform the task. As the task executes, the data processing system 140 can monitor the amount of time that has passed since the task was initiated). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to apply the teachings of Seacat DeLuca with the teachings of Sirkin and Yamasaki in order to provide a method that teaches monitoring of parameters that include scheduled tasks, task start times, task average completion durations, processor usage, and networking usage. The motivation for applying Seacat DeLuca teaching with Sirkin and Yamasaki teaching is to provide a method that allows for task profile indicating a baseline expectation of task completion such that continuous monitoring enables iterative updating of estimated task completion (Seacat DeLuca, Col. 9). Sirkin, Yamasaki, and Seacat DeLuca are analogous art directed towards computer systems status display. Therefore, it would have been obvious for one of ordinary skill in the art to combine Seacat DeLuca with Sirkin and Yamasaki to teach the claimed invention in order to provide continuous task profile parameter monitoring. With regard to claim 13, it is a system having similar limitations as claim 2. Thus, claim 13 is rejected for the same rationale as applied to claim 2. With regard to claim 14, it is a system having similar limitations as claim 3. Thus, claim 14 is rejected for the same rationale as applied to claim 3. With regard to claim 19, it is a system having similar imitations as claim 10. Thus, claim 19 is rejected for the same rationale as applied to claim 10. Claims 4-5, 7, 15, and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Sirkin in view of Yamasaki as applied to claim 1 and 11 above, and further in view of Upadhyay et al. Patent No. 11,537,959 B2 (hereinafter Upadhyay). With regard to claim 4, Sirkin and Yamasaki teach the method of claim 1 Sirkin further teaches wherein calculating the initial estimated time to completion value for a current task includes: calculating an initial processor estimated time for execution of the task based on metadata of previous tasks and a current processor availability (Col. 3, Consequently, the time to completion estimate for an operation limited by this resource is not merely based upon the speed of the processor and the size of the task but is a dynamic value which varies depending upon the workload of the central processing unit). However, Sirkin and Yamasaki do not explicitly teach that an initial processor estimated time for execution of the task is based on metadata of previous tasks. In a similar field of endeavor, Upadhyay teaches calculating an initial processor estimated time for execution of the task based on metadata of previous task (Col. 2, Certain aspects of the present disclosure provide a more accurate indication of the completion progress of a job … disclosed herein may measure one or more metrics relating to the performance of a job, or phases of a job, on a particular client or set of data for a set of occurrences of the job (Examiner notes: Job metadata comprising previous occurrences). The measured metrics for the set of occurrences of the job may be used to generate a prediction or estimate of how long a job or a phase of job takes to complete.) It would have been obvious to one of ordinary skill in the art at the time the invention was filed to apply the teachings of Upadhyay with the teachings of Sirkin and Yamasaki in order to provide a method that teaches calculation of initial processor estimated time in view of previously collected time data of tasks. The motivation for applying Upadhyay teaching with Sirkin and Yamasaki teaching is to provide a method that allows for data value inputs associated with the completion time of previous tasks to inform the prediction of completion time for current and future jobs (Upadhyay, Col. 51). Sirkin, Yamasaki, and Upadhyay are analogous art directed towards computer systems status display. Therefore, it would have been obvious for one of ordinary skill in the art to combine Upadhyay with Sirkin and Yamasaki to teach the claimed invention in order to provide estimated time task values of an initial task. With regard to claim 5, Sirkin, Yamakasi, and Upadhyay teaches the method of claim 4 Upadhyay further teaches wherein the metadata of previous tasks include averages of previous tasks in a common job (Col. 3, In some implementations, the prediction or estimate of phase or job completion time is based on an average or weighed average of the set of occurrences of the job. These set of occurrences may be referred to as historical data as they typically have occurred prior to the current job whose completion time is being estimated.). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to apply the teachings of Upadhyay with the teachings of Sirkin and Yamasaki in order to provide a method that teaches previous job metadata including time averages of tasks in a job. The motivation for applying Upadhyay teaching with Sirkin and Yamasaki teaching is to provide a method that allows for data value inputs associated with the completion time of previous tasks to inform the prediction of completion time for current and future jobs (Upadhyay, Col. 51). Sirkin, Yamasaki, and Upadhyay are analogous art directed towards computer systems status display. Therefore, it would have been obvious for one of ordinary skill in the art to combine Upadhyay with Sirkin and Yamasaki to teach the claimed invention in order to provide time averages of previous task of a common job. With regard to claim 7, Sirkin and Yamakasi teaches the method of claim 1 Sirkin further teaches wherein adjusting the initial estimated time to completion value for a current task includes: calculating additional processor estimated time for a scheduled task based on metadata of previous execution of scheduled tasks and a current processor availability (Col. 3, Consequently, the time to completion estimate for an operation limited by this resource is not merely based upon the speed of the processor and the size of the task but is a dynamic value which varies depending upon the workload of the central processing unit). However, the combination does not explicitly teach that an initial processor estimated time for execution of the task is based on metadata of previous tasks. In a similar field of endeavor, Upadhyay teaches calculating additional processor estimated time for a scheduled task based on metadata of previous task (Col. 2, Certain aspects of the present disclosure provide a more accurate indication of the completion progress of a job … disclosed herein may measure one or more metrics relating to the performance of a job, or phases of a job, on a particular client or set of data for a set of occurrences of the job (Examiner notes: Job metadata comprising previous occurrences). The measured metrics for the set of occurrences of the job may be used to generate a prediction or estimate of how long a job or a phase of job takes to complete.) It would have been obvious to one of ordinary skill in the art at the time the invention was filed to apply the teachings of Upadhyay with the teachings of Sirkin and Yamasaki in order to provide a method that teaches calculation of additional processor estimated time in view of previously collected time data of tasks. The motivation for applying Upadhyay teaching with Sirkin and Yamasaki teaching is to provide a method that allows for data value inputs associated with the completion time of previous tasks to inform the prediction of completion time for current and future jobs (Upadhyay, Col. 51). Sirkin, Yamasaki, and Upadhyay are analogous art directed towards computer systems status display. Therefore, it would have been obvious for one of ordinary skill in the art to combine Upadhyay with Sirkin and Yamasaki to teach the claimed invention in order to provide estimated time task values of a plurality of tasks. However, Upadhaya does not explicitly teach calculating estimated time in association with scheduled tasks. Yamasaki teaches calculating additional processor estimated time for a scheduled task (Col. 19, the minimum islanding execution time Ta may be determined via method where an operation history of past jobs is taken into consideration, or by the management program 200 or a user estimating an operation pattern by referencing the operation history of other jobs). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to apply the teachings of Yamasaki with the teachings of Sirkin and Upadhyay in order to provide a method that teaches the application of calculating additional estimated time in association concurrently scheduled tasks. The motivation for applying Yamasaki teaching with Sirkin and Upadhyay teaching is to provide a method that allows for the use of the known technique of calculating estimated task completion time of Sirkin and Upadhyay for identified, concurrently scheduled tasks of Yamasaki in similar way, with reasonable expectation of success. Sirkin, Upadhyay and Yamasaki are analogous art directed towards computer systems status display. Therefore, it would have been obvious for one of ordinary skill in the art to combine Yamasaki with Sirkin and Upadhyay to teach the claimed invention in order to provide application of known estimated time methods in association with concurrently executing tasks. With regard to claim 15, it is a system having similar limitations as claim 4. Thus, claim 15 is rejected for the same rationale as applied to claim 4. With regard to claim 17, it is a system having similar limitations as claim 7. Thus, claim 17 is rejected for the same rationale as applied to claim 7. Claims 6, 8, 16, and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Sirkin in view of Yamasaki in view of Upadhyay as applied to claim 4, 7, 15, and 17 above, and further in view of Seacat DeLuca et al. Patent No. 10,289,281 B2 (hereinafter Seacat DeLuca). With regard to claim 6, Sirkin, Yamasaki, and Upadhyay teach the method of claim 4 Sirkin reasonably teaches estimated time as a relationship between task size and completion rate (Sirkin, Col. 4). However, Sirkin, Yamasaki, and Upadhyay does not explicitly teach calculation of additional estimated for download related tasks correlating with task size and network speed. Seacat DeLuca further teaches wherein calculating the initial estimated time to completion value for a current task includes: calculating additional estimated time for downloads in the task based on a size of a download and a current network speed (Col. 8, In a simple example, assume that a task performs a single operation, for example a file download. The progress profile 170 can include data indicating an expected amount of time for the file download to be completed in a hardware/software environment similar to that of the data processing system 140, and the progress profile 170 can indicate parameters of such a hardware/software environment, such as a typical amount of memory, processor utilization and network bandwidth available to perform the task). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to apply the teachings of Seacat DeLuca with the teachings of Sirkin, Yamasaki, and Upadhyay in order to provide a method that teaches estimated task time completion value as a calculated relationship between download task size and network speed. The motivation for applying Seacat DeLuca teaching with Sirkin, Yamasaki, and Upadhyay teaching is to provide a method that allows for the use of the known technique of dividing a task load size and task completion rate to calculate an estimated job completion time for network download tasks in similar way, with reasonable expectation of success. Sirkin, Yamasaki, and Upadhyay and Seacat DeLuca are analogous art directed towards computer systems status display. Therefore, it would have been obvious for one of ordinary skill in the art to combine Seacat DeLuca with Sirkin, Yamasaki, and Upadhyay to teach the claimed invention in order to utilize task size and task completion rate relationship to calculate an estimated job completion time for download jobs. With regard to claim 8, Sirkin, Yamasaki, and Upadhyay teaches the method of claim 7 Seacat DeLuca further teaches wherein adjusting the initial estimated time to completion value for a current task includes: calculating additional estimated time for downloads in a scheduled task based on a size of the download and a current network speed (Col. 8, In a simple example, assume that a task performs a single operation, for example a file download. The progress profile 170 can include data indicating an expected amount of time for the file download to be completed in a hardware/software environment similar to that of the data processing system 140, and the progress profile 170 can indicate parameters of such a hardware/software environment, such as a typical amount of memory, processor utilization and network bandwidth available to perform the task. Rationale to claim 6 applied here. However, Seacat DeLuca does not explicitly teach calculating estimated time in association with scheduled tasks. Yamasaki teaches calculating additional processor estimated time for a scheduled task (Col. 19, the minimum islanding execution time Ta may be determined via method where an operation history of past jobs is taken into consideration, or by the management program 200 or a user estimating an operation pattern by referencing the operation history of other jobs). Rationale to claim 7 applied here. With regard to claim 16, it is a system having similar limitations as claim 6. Thus, claim 16 is rejected for the same rationale as applied to claim 6. With regard to claim 18, it is a system having similar limitations as claim 8. Thus, claim 18 is rejected for the same rationale as applied to claim 8. Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Sirkin in view of Yamasaki as applied to claim 1 above, and further in view of Takamoto JP 2536304 B2 (hereinafter Takamoto). With regard to claim 9, Sirkin and Yamasaki teach the method of claim 1. However, Sirkin and Yamasaki do not explicitly teach adjustment of an initial estimated time to completion of a current task including time penalty from processor utilization. In a similar field of endeavor, Takamoto teaches wherein adjusting the initial estimated time to completion value of the current task based on an estimated impact of the scheduled tasks on the host resources ([0002], in a data processing apparatus, a job end time (Examiner notes: adjusted completion value) is predicted by a user’s empirical prediction by obtaining information such as job processing time (Examiner notes: initial estimated time) and CPU (central processing unit) usage time) includes: multiplying the initial estimated time (iCpEt) by two, then multiplying this value by the scheduled tasks’ processor utilization (Scp), then adding back on the initial estimated time (iCpEt) ([0002], when the job end time is predicted statistically, information such as job processing time and CPU usage time must be added up in advance; [0006], A job end time predicting system according to the present invention is a job end time predicting system for a data processing apparatus having a multi-job type processing means, and the relationship between the usage rate of the processing means (Examiner notes: scheduled tasks’ processor utilization (Scp) time) and the job processing time … A calculation unit that calculates the usage rate of processing unit for each time period from the result, and a usage rate of the processing unit when the job is started by the measurement result of the processing time measurement unit and the calculation result of the calculation unit and a prediction unit for predicting the end time of the job.). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to apply the teachings of Takamoto with the teachings of Sirkin and Yamasaki in order to provide a method that teaches calculation of adjusted estimated time of completion including time penalty associated with processor utilization. The motivation for applying Takamoto teaching with Sirkin and Yamasaki teaching is to provide a method that allows for the use of the known technique of calculating CPU usage time in association with an estimated job completion time to generate a processor-utilization adjusted estimated job completion time to improve job completion time calculation in similar way, with reasonable expectation of success. Sirkin and Yamasaki and Takamoto are analogous art directed towards job scheduling arrangements. Therefore, it would have been obvious for one of ordinary skill in the art to combine Takamoto with Sirkin and Yamasaki to teach the claimed invention in order to provide processor-utilization time to adjust an estimated job completion time. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to IVAN A CASTANEDA whose telephone number is (571)272-0465. The examiner can normally be reached Monday-Friday 9:30AM-5:30PM EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Aimee Li can be reached at (571) 272-4169. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /I.A.C./Examiner, Art Unit 2195 /KEVIN L YOUNG/Supervisory Patent Examiner, Art Unit 2194
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Prosecution Timeline

Mar 12, 2024
Application Filed
Jul 02, 2026
Non-Final Rejection mailed — §101, §103 (current)

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1-2
Expected OA Rounds
67%
Grant Probability
99%
With Interview (+66.7%)
3y 5m (~1y 1m remaining)
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