DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's arguments have been fully considered but they are deemed not persuasive.
The exception in 35 USC 102(b)(2)(C) does not apply on its own, the applicant must invoke it. Section 2154.02(c) of the MPEP mentions that an applicant must state that two things were owned by the same person, or were under an obligation to be assigned to the same person, by 03/13/2023 (the claimed invention and the material disclosed in the prior art). In their arguments, the applicant only addressed the first. The applicant states only that each prior art “is also owned by Infineon Technologies AG”. This describes who owns Fischer and Mendel now, but not who owned the material disclosed in the references, or who had the right to own it on 03/13/2023. MPEP 2146.02 states that the statement of present common ownership is not sufficient.
Additionally, the applicant mentions the ADS, which does not fill the gap. The ADS does not mention Fischer or Mendel and says nothing about who held rights to the material disclosed in those prior art references on 03/13/2023. In MPEP 2154.02(c) states that “a statement is required regardless of any assignment information that may have been recorded int eh assignment database maintained by the Office”. Since the exception under 35 USC 102(b)(2)(C) has not been properly invoked, Fischer and Mendel are still available as prior art. The applicant is additionally advised that the claims of Fischer appear to raise an issue of nonstatutory double patenting. If the exception is properly invoked, a rejection on that ground may be required.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-7, 9-10, 14-19 are rejected under 35 U.S.C 103 as being unpatentable over Fischer (US 2024/0163085), hereon referred to as Fischer.
In regards to claims 1 & 19, Fischer discloses execute a first operation to generate a first operation result, wherein the first operation receives as input the first share and a first operation input value which depends on at least one of the selection function input values (At least two shares of a key value are determined; at least one medication value depends on at least one of the first input value and the second input value is determined; for each share an intermediary value is determined which depends on the share and at least one of the at least one modification value; Paragraphs 0140-0150); execute a second operation to generate a second operation result, wherein the second operation receives as input the second share and a second operation input value which depends on at least one of the selection function input values (for each share, an intermediary value is determined which depends on the share and the at least one of the at least one modification value; the impact on the operation is of example by switches, wherein each switch is configured to switch between two paths in accordance with the respective key share supplied to it as control bit; Paragraphs 0130-0135; 0140-0150); and execute a third operation that processes the first operation result and the second operation result in such a way that the execution of the first operation, the second operation and the third operation implement a selection function which combines the selection function input values with the selection value such that the combination results in the one of the selection function input values for which the selection value indicates that it is to be selected (the intermediary values are arithmetically assembled to generate an output value for at least one of the first input value and the second input value; EXCH exchanges two objects (a pair of values, a pair of points) if the second entry of the function is 1, and not if it is 0; Paragraphs 0040; 0106; 0140-0150).
Any interpretations of differences between the claim(s) and the prior art are only minor in nature, design elements and could not establish novelty or an inventive step. It would be obvious to an ordinary skill in the art that before the filing date of the invention, any minor differences of the claim are still functionally addressed in the prior art, which discloses the same object matter and same type of solution as the instant application, as currently presented.
In regards to claim 2, Fischer discloses wherein the processor circuit is configured to calculate a first result based on the first operation result, the second operation result and/or the result of the third operation, and the security controller circuit comprises a further processor circuit configured to calculate a second result by applying the selection function to the first selection function input value and the second selection function input value, and wherein the security controller circuit is configured to check whether the first result and the second result match and, if the first result and the second result do not match, to trigger an alarm (For each share, an intermediary value is determined which depends on the share an at least one of the at least one modification value; the intermediary values are arithmetically assembled to generate an output value; Paragraphs 0140-0150).
In regards to claim 3, Fischer discloses wherein the permutation is a rotation (The elements presented in the claim(s) do not contain any additional features, do not present any inventive step or novelty not addressed/presented in Fischer. Examiner takes official notice, that these elements are commonly known, minor design details that are derivable from the prior art and are well known, and obvious to an ordinary skill in the art. The additional features of these claims represent normal design options, which the skilled person would implement by Fischer, depending on the circumstances, without exercising any inventive activity).
In regards to claim 4, Fischer discloses wherein the second operation input value is a permutation of the first operation input value (a key value K is split (or decomposed) into multiple random shares, for example int five random shares; Paragraphs 0120-0125).
In regard to claim 5, Fischer discloses wherein the third operation compensates that the second operation input value is a permutation with respect to the first operation input value (The elements presented in the claim(s) do not contain any additional features, do not present any inventive step or novelty not addressed/presented in Fischer. Examiner takes official notice, that these elements are commonly known, minor design details that are derivable from the prior art and are well known, and obvious to an ordinary skill in the art. The additional features of these claims represent normal design options, which the skilled person would implement by Fischer, depending on the circumstances, without exercising any inventive activity).
In regards to claim 6, Fischer discloses wherein the second operation compensates that the second operation input value is a permutation of the first operation input value or the security controller is configured to decompose the selection value in a manner such that the second share includes a permutation to compensate that the second operation input value is a permutation of the first operation input value (a key value K is split (or decomposed) into multiple random shares, for example int five random shares; Paragraphs 0120-0125).
In regards to claim 7, Fischer discloses wherein the second operation input value and the first operation input value are equal (at least one modification value that depends on at least one of the first input value and the second input value is determined; Paragraphs 0140-0150).
In regards to claim 10, Fischer discloses wherein at least one of the first operation input value and the second operation input value is an exclusive-or combination of the two selection function input values (The elements presented in the claim(s) do not contain any additional features, do not present any inventive step or novelty not addressed/presented in Fischer. Examiner takes official notice, that these elements are commonly known, minor design details that are derivable from the prior art and are well known, and obvious to an ordinary skill in the art. The additional features of these claims represent normal design options, which the skilled person would implement by Fischer, depending on the circumstances, without exercising any inventive activity).
In regards to claim 14, Fischer discloses wherein the processor circuit comprises an arithmetic logic unit with multiple input terminals configured to perform the first operation and the second operation, and wherein the processor circuit is configured such that the arithmetic logic unit receives the first operation input value for performing the first operation at a different input terminal than the second operation input value for performing the second operation (The critical value DA ma bye five in a Boolean masked way; then E can easily be computed by apply the z to only one of the words; Paragraphs 0115-0120).
In regards to claim 15, Fischer discloses wherein the processor circuit is configured such that the arithmetic logic unit receives the first share for performing the first operation at a different input terminal than the second share for performing the second operation (The elements presented in the claim(s) do not contain any additional features, do not present any inventive step or novelty not addressed/presented in Fischer. Examiner takes official notice, that these elements are commonly known, minor design details that are derivable from the prior art and are well known, and obvious to an ordinary skill in the art. The additional features of these claims represent normal design options, which the skilled person would implement by Fischer, depending on the circumstances, without exercising any inventive activity).
In regards to claim 16, Fischer discloses comprising a random number generator and configured to decompose the selection value into at least the first share and the second share depending on a random number provided by the random number generator (a key value K is split (or decomposed) into multiple random shares, for example int five random shares; Paragraphs 0120-0125). .
In regards to claim 17, Fischer discloses wherein the security controller circuit is configured to decompose the selection value into the first share and the second share in such a way that an arithmetic combination of the first share and the second share or of the first share and a permuted version of the second share results in the selection value (Splitting a value into multiple random shares can thus be understood as randomly determine shares whose combination gives the value; Paragraphs 0100-0105; 0120-0125).
In regards to claim 18, Fischer discloses wherein the security controller circuit is configured to decompose the selection value into the first share and the second share such that an exclusive-or combination of the first share and the second share or of the first share and a rotated version of the second share gives the selection value (Splitting a value into multiple random shares can thus be understood as randomly determine shares whose combination gives the value; Paragraphs 0100-0105; 0120-0125).
Claims 8, 11-13 are rejected under 35 U.S.C 103 as being unpatentable over Fischer (US 2024/0163085), hereon referred to as Fischer, in view of Mendel et al. (US 2024/0193300), and hereon referred to as Mendel.
In regards to claim 8, Fischer does not disclose where one of the selection function input values is a dummy input value and the other of the selection function input values is a real data input value. However, in an analogous art Mendel discloses where one of the selection function input values is a dummy input value and the other of the selection function input values is a real data input value (For a real operation the multiplexer selects a respective share as the input value of the processing block for a dummy operation the respective multiplexer selects a respected share value c; provide two shares of one of the data words as input shares to the logic circuit if the control sequence specifics a current operation as a real operation and provide at least two shares of a specific value as the input shares to the logic circuit if the control sequence specifies the current operation s a dummy operation; Paragraphs 0050-0055; 0090-0095).
At the time before the effective filing date of the invention, it would have been obvious to the one with ordinary skill in the art to combine the teachings disclosed by Fischer, with the teachings disclosed by Mendel regarding where one of the selection function input values is a dummy input value and the other of the selection function input values is a real data input value. The suggestion/motivation of the combination would have been to provide additional security in data processing devices and methods for processing secret data (Mendel; Paragraph 0002).
In regards to claim 9, Mendel discloses wherein the selection value indicates whether a dummy operation is to be performed (it is assumed that for each operation of a sequence of operations, a signal “isDummy” indicates whether the operation is a dummy operation or not, i.e. there is a control sequence which specifies, for each operation is a dummy operation or as a real operation; Paragraphs 0030-0035).
In regards to claim 11, Mendel discloses wherein the processor is configured to perform the first operation such that it does not operate on the second share (The input word a is split into two shares according to an XOR combination; Paragraphs 0030-0035).
In regards to claim 12, Mendel discloses wherein the result of the second operation does not operate on the first share (The first AND gate receives a.sub.0 as its second input, the second AND gate receives a.sub.1 as its second input; Paragraphs 0070-0075).
In regards to claim 13, Mendel discloses wherein the first operation involves an AND combination of its inputs or where the second operation involves an AND combination of its inputs or both (The processing circuit further includes a second mask refresh circuit and a third mask refresh circuit; the first mask refresh circuit receives the output of a first AND gate and the third mask refresh circuit receives the output of a second AND gate; the first AND gate and the second AND gate each receive the isDummy signal; Paragraphs 0065-0075).
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHARIF E ULLAH whose telephone number is (571)272-5453. The examiner can normally be reached Mon-Fri 7:00-5:30.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Farid Homayounmehr can be reached at 571-272-3739. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/SHARIF E ULLAH/Primary Examiner, Art Unit 2495
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