This action is in response to the amendments filed on 11/25/2025, in which claims 1-20 are presented for the examination.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-20 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-3, 8-20 are rejected under 35 U.S.C. 103 as being unpatentable over Yang et al. (US 2022/0129055, referred herein after Yang) in view of Gunda et al. (US 2020/0097188, referred herein after Gunda).
As per claim 1, 13, 16, Yang discloses a storage device to simplify an ungraceful shutdown recovery process and reduce a time-to-ready (TTR) value associated with an ungraceful shutdown bootup sequence, the storage device comprises:
a cache to store data structures associated with host data and meta data (Fig. 1, volatile memory 112, [0027], used as cache to store information as claimed);
Yang does not specifically disclose a controller to store the data structures in a host memory buffer located on a host that is connected to the storage device, execute a bootup sequence after an ungraceful shutdown to restart the storage device when the storage device is connected to the host, access the host memory buffer during the bootup sequence and use the data structures stored in the host memory buffer to recover the host data and meta data, and apply the host data and meta data to the bootup sequence to simplify the ungraceful shutdown recovery process and reduce the TTR value associated with the ungraceful shutdown bootup sequence;
However, Gunda discloses a controller (Fig. 1, controller 108, [0022]) to store the data structures in a host memory buffer (Fig. 1, RAM 110, [0022]) located on a host that is connected to the storage device, execute a bootup sequence after an ungraceful shutdown ([0033], methods for reducing SSD boot-up time, in particular, SSD initialization time after UGSD) to restart the storage device when the storage device is connected to the host, access the host memory buffer during the bootup sequence and use the data structures stored in the host memory buffer to recover the host data and meta data, and ([0045], “During boot-up after UGSD, the SSD 104 needs to restore all the control blocks and open blocks of the NVM 114 before the SSD is ready for host commands.”, [0049], “ the processes for scanning and FLGP may occur immediately during the boot-up process. In that case, the SSD 104 is not ready for executing host's commands or requests until the initialization processes for scanning and finding the last good page are completed.“, all the control blocks and data are being scanned during boot up and used to recover the data after UGSD);
apply the host data and meta data to the bootup sequence to simplify the ungraceful shutdown recovery process and reduce the TTR value associated with the ungraceful shutdown bootup sequence ([0033], methods for reducing SSD boot-up time, in particular, SSD initialization time after UGSD);
Therefore it would have been obvious to the one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate teaching of Gunda’s fast boot method after ungraceful shutdown into Yang’s efficient data storage usage method associated with ungraceful shutdown because one of the ordinary skill in the art would have been motivated to provide reducing boot-up time after UGSD.
As per claim 2, 17, Yang discloses the storage device of claim 1, wherein the data structures include last good written pointers for open blocks which were involved in program operations at an ungraceful shutdown timeframe ([0034], [0036], last QLC program location), wherein information for the last good written pointers have not been saved in a memory device (Fig. 3, step 318, [0035], last location was foggy programmed).
As per claim 3, 18, Yang discloses the storage device of claim 1, wherein the data structures include a next-to-write pointer for an open super block, wherein the next-to-write pointer has not been saved in a memory device (Fig. 3, step 322, [0037]).
As per claim 8, Yang discloses the storage device of claim 1, wherein the data structure is stored on the host memory buffer when a word line is to be written to a memory device ([0025], [0030]-[0031], word line is used to define plurality of pages to be written).
As per claim 9, Yang discloses the storage device of claim 1, wherein a size of the data structure stored on the host memory buffer is dependent on a number of open blocks ([0043]-[0044]).
As per claim 10, 20, Gunda discloses the storage device of claim 1, wherein the controller stores a memory address for the host memory buffer in a base address register (Yang, Fig. 1, HMB 140, host memory buffer) and uses the memory address to access the host memory buffer during configuration of the storage device after the ungraceful shutdown ([0045], “During boot-up after UGSD, the SSD 104 needs to restore all the control blocks and open blocks of the NVM 114 before the SSD is ready for host commands.”, [0049], “ the processes for scanning and FLGP may occur immediately during the boot-up process. In that case, the SSD 104 is not ready for executing host's commands or requests until the initialization processes for scanning and finding the last good page are completed.“, all the control blocks and data are being scanned during boot up and used to recover the data after UGSD).
As per claim 11, 14, Yang discloses the storage device of claim 10, wherein during the ungraceful shutdown recovery process, the controller reads the base address register value, reads data from the base address register in the host memory buffer, validates the data in the host memory buffer using a signature, and fetches content stored in the host memory buffer to complete the boot-up sequence (Fig. 4, steps 404-410, [0042], [0043], controller checks data integrity subsequent to power loss event).
As per claim 12, 15, Yang discloses the storage device of claim 10, wherein the controller applies a host memory buffer location in the bootup sequence after validating the base address register that includes the memory address for the host memory buffer ([0039]-[0040]).
As per claim 19, Yang discloses the storage device of claim 16, wherein the in-memory data structure update includes logical block address information including a namespace identifier plus a logical block address within a namespace for open blocks in a memory device ([0033], [0034]).
Claims 4-7 are rejected under 35 U.S.C. 103 as being unpatentable over Yang and Gunda in view of Guan et al. (US 2023/0065617, referred herein after Guan).
As per claim 4, Yang does not specifically disclose the storage device of claim 1, wherein the data structures include an in-memory data structure update to rebuild logical-to-physical mappings in the host memory buffer;
However, Guan discloses the data structures include an in-memory data structure update to rebuild logical-to-physical mappings in the host memory buffer (abstract, [0013], [0016], [0020]);
Therefore it would have been obvious to the one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate teaching of Guan’s method of managing power loss in a memory device into Yang’s efficient data storage usage method associated with ungraceful shutdown and Gunda’s fast boot method after ungraceful shutdown because one of the ordinary skill in the art would have been motivated to provide efficient block usage after ungraceful shutdown (UGSD) events.
As per claim 5, Yang discloses the storage device of claim 4, wherein the in-memory data structure update includes logical block address information including a namespace identifier plus a logical block address within a namespace for open blocks in a memory device ([0033], [0034]).
As per claim 6, Yang discloses the storage device of claim 4, wherein the in-memory data structure update is associated with open blocks in a memory device ([0043]-[0044]).
As per claim 7, Yang discloses the storage device of claim 4, wherein the in-memory data structure update is associated with a predefined number of super word lines in a memory device ([0025]).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KAMINI B PATEL whose telephone number is (571)270-3902. The examiner can normally be reached on M-F 8-4:30.
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/KAMINI B PATEL/Primary Examiner, Art Unit 2114