Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: “bandwidth analysis module” in claim 7. See MPEP §2181(|)(A) "The following is a list of non-structural generic placeholders that may invoke 35 U.S.C. 112(f): "mechanism for," "module for," "device for," "unit for," "component for," "element for," "member for," "apparatus for," "machine for," or "system for.'". Claim 20 additionally recites “means for monitoring usage of allocated bandwidth of a virtual function implemented in the data storage device and recommending a change to the allocated bandwidth based on monitored usage of the allocated bandwidth,” which uses the word “means” and is therefore interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, per the paragraph above.
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof. A review of the disclosure as originally filed, hereafter "disclosure", reveals that the corresponding structure of the “bandwidth analysis module” in claim 7, and of the “means for monitoring…and recommending” in claim 20, is the same structure. Bandwidth analysis module (“BAM”) 502, located in the storage controller 102, see at least instant specification [0056], [0057], [0058], and [0059]. In accordance with MPEP § 2181 (||)(B), when the corresponding structure of computer implemented mean plus function limitations corresponds to a general purpose computer, an algorithm is required to transform the general purpose computer into a special purpose computer to be sufficient as corresponding structure. Upon further review of the disclosure, applicant discloses “the BAM 502 can analyze the bandwidth used by each of the virtual functions versus the allocated bandwidth and derive whether the current allocation can be optimized” [0057] by determining “if the utilized bandwidth differs (positively or negatively) from the allocated bandwidth by more than a threshold” [0058] – this is the corresponding disclosure for the “determined by” function of claim 7.
Applicant further discloses that “the operation of the BAM 502 can include getting the current bandwidth assignment through some interface to the hypervisor and monitoring the bandwidth used by each of the virtual functions” [0056] – the corresponding disclosure for the “monitoring” function of claim 20,
Applicant further discloses that BAM 502 is disclosed as communicating a recommendation to the hypervisor (“the bandwidth analysis module (BAM) 500 in the storage controller 102 can communicate a recommendation to the hypervisor regarding the re-assignment of bandwidth, according to the analysis performed by the BAM 502” [0056]. NOTE: [0056] refers to this component as both “BAM 500” and “BAM 502” within the same sentence. “500” is otherwise only used once elsewhere in the spec, for the separate, host-side “multi-tenancy control module 500” [0055], confirming [0056]’s “BAM 500” is a numbering error rather than a second valid name for this component; every other reference to this storage-controller-side module consistently uses “BAM 502”) – the corresponding disclosure for “recommending” function of claim 20. Applicant has failed to define the algorithm for each of the claimed functions and has instead only provided either verbatim support for the claimed function (which is insufficient as a step of steps of a corresponding algorithm) or exemplary language that does not make clear the metes and bounds of the algorithm. As such, see rejections under 35 U.S.C. § 112(a) and (b) below.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 7 and 20 rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Claim 7 recites “a bandwidth analysis module” and claim 20 recites “means for monitoring…and recommending…” which invokes 35 U.S.C. § 112(f), see claim interpretation above. The disclosure does not recite sufficient corresponding structure (in this instance, bandwidth analysis module (BAM) 502 + algorithm), again see claim interpretation above. As such, and in accordance with MPEP § 2181 (||)(B), last paragraph "When a claim containing a computer-implemented 35 U.S.C. 112(f) claim limitation is found to be indefinite under 35 U.S.C. 112(b) for failure to disclose sufficient corresponding structure (e.g., the computer and the algorithm) in the specification that performs the entire claimed function, it will also lack written description under 35 U.S.C. 112(a)."
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 7 and 20 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
a. Claim limitation “a bandwidth analysis module” in claim 7 and “means for monitoring…and recommending…” in claim 20 invokes 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. However, the written description fails to disclose the corresponding structure, material, or acts for performing the entire claimed function and to clearly link the structure, material, or acts to the function. The disclosure fails to disclose sufficient corresponding structure (in this instance, BAM 502 + algorithm for determining the amount of utilized bandwidth of the virtual function, monitoring bandwidth usage, and recommending a bandwidth change), see claim interpretation above. As such, and in accordance with MPEP § 2181 (||)(B) "For a computer-implemented 35 U.S.C. 112(f) claim limitation, the specification must disclose an algorithm for performing the claimed specific computer function, or else the claim is indefinite under 35 U.S.C. 112(b).”. Therefore, the claim is indefinite and is rejected under 35 U.S.C. 112(b) or pre-AIA 35 U.S.C. 112, second paragraph.
Applicant may:
(a) Amend the claim so that the claim limitation will no longer be interpreted as a limitation under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph;
(b) Amend the written description of the specification such that it expressly recites what structure, material, or acts perform the entire claimed function, without introducing any new matter (35 U.S.C. 132(a)); or
(c) Amend the written description of the specification such that it clearly links the structure, material, or acts disclosed therein to the function recited in the claim, without introducing any new matter (35 U.S.C. 132(a)).
If applicant is of the opinion that the written description of the specification already implicitly or inherently discloses the corresponding structure, material, or acts and clearly links them to the function so that one of ordinary skill in the art would recognize what structure, material, or acts perform the claimed function, applicant should clarify the record by either:
(a) Amending the written description of the specification such that it expressly recites the corresponding structure, material, or acts for performing the claimed function and clearly links or associates the structure, material, or acts to the claimed function, without introducing any new matter (35 U.S.C. 132(a)); or
(b) Stating on the record what the corresponding structure, material, or acts, which are implicitly or inherently set forth in the written description of the specification, perform the claimed function. For more information, see 37 CFR 1.75(d) and MPEP §§ 608.01(o) and 2181.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-20 are rejected under 35 U.S.C. 101 because the claimed invention recites a judicial exception, is directed to that judicial exception, an abstract idea, as it has not been integrated into practical application and the claims further do not recite significantly more than the judicial exception. Examiner has evaluated the claims under the framework provided in the 2019 Patent Eligibility Guidance published in the Federal Register 01/07/2019 and has provided such analysis below.
Step 1: Claims 1-11, and 20 are directed to devices and fall within the statutory category of machines; Claims 12-19 are directed to methods and fall within the statutory category of processes. Therefore, “Are the claims to a process, machine, manufacture or composition of matter?” Claims 1-20, Yes.
In order to evaluate the Step 2A inquiry “Is the claim directed to a law of nature, a natural phenomenon or an abstract idea?” we must determine, at Step 2A Prong 1, whether the claim recites a law of nature, a natural phenomenon or an abstract idea and further whether the claim recites additional elements that integrate the judicial exception into a practical application.
Step 2A Prong 1:
Claims 1, 12 and 20: The limitations of “determine an amount of utilized bandwidth of the virtual function” (claim 1); “comparing the allocated bandwidth with a utilized bandwidth” (claim 12); and “means for monitoring usage of allocated bandwidth of a virtual function” (claim 20), as drafted, is a process that, but for the recitation of generic computing components, under its broadest reasonable interpretation, covers performance of the limitation in the mind. For example, a person can think about, observe, judge and evaluate how much of a virtual function’s allocated bandwidth is actually being used, by comparing an amount of utilized bandwidth against the allocated bandwidth, as this is a simple observation and comparison that may be performed by mental evaluation, or with the aid of pen and paper. Further, “based on the determined amount of utilized bandwidth […] a recommended change to the allocated bandwidth” (claim 1); “in response to the utilized bandwidth differing from the allocated bandwidth” (claim 12); and “recommending a change to the allocated bandwidth based on monitored usage of the allocated bandwidth” (claim 20, constructed under 35 U.S.C. 112(f) as corresponding to the algorithm disclosed in the specification performed by a generic processor), as drafted, is a process that, but for the recitation of generic computing components, under its broadest reasonable interpretation, covers performance of the limitation in the mind. For example, having judged that a virtual function is using more or less bandwidth than it has been allocated, a person can mentally formulate a recommendation as to how the allocation should be changed. This is a simple mental evaluation and requires nothing more than an observation, evaluation, and judgement, which could equally be performed with the aid of pen and paper (e.g. writing the utilized amount next to the allocated amount and noting a suggested new number).
Therefore, Yes, claims 1, 12 and 20 recite judicial exceptions.
The claims have been identified to recite judicial exceptions, Step 2A Prong 2 will evaluate whether the claims are directed to the judicial exception.
Step 2A Prong 2:
Claims 1, 12 and 20: The judicial exception is not integrated into a practical application. In particular, the claim recites the following additional elements – “a data storage device”, “a memory”, “one or more processors, individually or in combination, configured to”(claim 1), “performing in a data storage device comprising a memory”(claim 12), ““a data storage device” and “a memory”(claim 20), which are merely recitations of generic computing components and functions merely using a computer as a tool to apply the abstract idea (see MPEP § 2106.05(f)) which does not integrate a judicial exception into practical application. Further, “receive, from a hypervisor, an allocated bandwidth of a virtual function implemented in the data storage device” (claim 1), and “receiving allocated bandwidth of a virtual function in the data storage device”(claim 12), are merely recitations of insignificant extra-solution data gathering, and “provide, to the hypervisor, a recommended change to the allocated bandwidth”(claim 1) is merely recitations of insignificant extra-solution data transmission (see MPEP § 2106.05(g)) which does not integrate a judicial exception into practical application. These limitation will be further addressed below at Step 2B as also being Well-Understood, Routine, and Conventional (WURC).
Therefore, “Do the claims recite additional elements that integrate the judicial exception into a practical application? No, these additional elements do not integrate the abstract idea into a practical application and they do not impose any meaningful limits on practicing the abstract idea. The claims are directed to an abstract idea.
After having evaluating the inquires set forth in Steps 2A Prong 1 and 2, it has been concluded that claims 1, 12 and 20 not only recite a judicial exception but that the claims are directed to the judicial exception as the judicial exception has not been integrated into practical application.
Step 2B:
Claims 1, 12 and 20: The claims do not include additional elements, alone or in combination, that are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional elements amount to no more than generic computing components merely using a computer as a tool to apply an abstract idea and insignificant extra-solution data gathering, data transmission, and data storage activity which do not amount to significantly more than the abstract idea. Moreover, this insignificant extra-solution activity is WURC, see MPEP § 2106.05(d)(II) “The courts have recognized the following computer functions as well‐understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity. i. Receiving or transmitting data over a network …iv. Storing and retrieving information in memory”.
Therefore, “Do the claims recite additional elements that amount to significantly more than the judicial exception? No, these additional elements, alone or in combination, do not amount to significantly more than the judicial exception.
Having concluded analysis within the provided framework, Claims 1, 12 and 20 do not recite patent eligible subject matter under 35 U.S.C. § 101.
With regard to 2 and 17, they recite additional abstract idea recitations of “determine an expected workload of the virtual function; and the recommended change is further based on the determined expected workload” (claim 2) and “determining an expected workload of the virtual function, wherein the recommendation is further based on the determined expected workload”(claim 17), as drafted, is a process that, but for the recitation of generic computing components, under its broadest reasonable interpretation, covers performance of the limitation in the mind. For example, a person can think about and estimate how much bandwidth a virtual function is expected to need and can mentally factor that expectation into the recommendation of what the allocation should be changed to. For the same reasons as above with regard to integration into practical application and whether additional elements amount to significantly more, claims 2 and 17 also fails both Step 2A prong 2, thus the claims are directed to the judicial exception as it has not been integrated into practical application, and fails Step 2B as not amounting to significantly more Therefore, Claims 2 and 17 do not recite patent eligible subject matter under 35 U.S.C. § 101.
With regards to claim 3 and 18, they recite additional abstract idea recitations of “receive, from the hypervisor, an updated allocated bandwidth in response to the recommended change”(claim 3) and “receive an updated allocated bandwidth in response to the recommendation” (claim 18), which are merely recitations of insignificant extra-solution data gathering (see MPEP § 2106.05(g)). Further, this insignificant extra-solution data gathering is WURC, see MPEP § 2106.05(d)(II) “The courts have recognized the following computer functions as well‐understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity. i. Receiving or transmitting data over a network”. For the same reasons as above with regard to integration into practical application and whether additional elements amount to significantly more, claims 3 and 18 also fails both Step 2A prong 2, thus the claim is directed to the judicial exception as it has not been integrated into practical application, and fails Step 2B as not amounting to significantly more Therefore, Claims 3 and 18 does not recite patent eligible subject matter under 35 U.S.C. § 101.
With regards to claim 4, it recites the additional element of “wherein the updated allocated bandwidth is achieved by applying throttling” as drafted, is a process that, but for the recitation of generic computing components, under its broadest reasonable interpretation, covers performance of the limitation in the mind. For example: throttling only means lessening/changing the amount of bandwidth allocated to the virtual function, without requiring any actual, physical effect on the bandwidth being utilized by the virtual function; a person can mentally decide upon and formulate a plan to reduce the allocated bandwidth to a lower figure, which is merely a continuation of the same mental evaluation and recommendation already accounted for in claim 3. For the same reasons as above with regard to integration into practical application and whether additional elements amount to significantly more, claim 4 also fails both Step 2A prong 2, thus the claim is directed to the judicial exception as it has not been integrated into practical application, and fails Step 2B as not amounting to significantly more Therefore, Claim 4 does not recite patent eligible subject matter under 35 U.S.C. § 101.
With regards to claim 5, it recites the additional element of “the data storage device comprises a multi-tenant data storage device; the one or more processors, individually or in combination, are further configured to implement at least one additional virtual function; and the virtual function and the at least one additional virtual function are assigned by different physical functions associated with different tenants.” These limitations are merely a recitation of the technological environment in which the abstract idea is practiced, namely a multi-tenant, SR-IOV style virtualization environment having multiple virtual functions assigned by different physical functions (see MPEP § 2106.05(h)), and do not alter how the utilized bandwidth is determined or how the recommendation is generated. For the same reasons as above with regard to integration into practical application and whether additional elements amount to significantly more, claim 5 also fails both Step 2A prong 2, thus the claim is directed to the judicial exception as it has not been integrated into practical application, and fails Step 2B as not amounting to significantly more Therefore, Claim 5 does not recite patent eligible subject matter under 35 U.S.C. § 101.
With regards to claim 6, it recites the additional element of “further comprising a single-root input/output virtualization (SR-IOV) interface.” This is merely a recitation of technological environment in which the abstract idea is practiced, i.e., a virtualized computing environment employing the SR-IOV standard, does not integrate the abstract idea into a practical application (see MPEP § 2106.05(h)). For the same reasons as above with regard to integration into practical application and whether additional elements amount to significantly more, claim 6 also fails both Step 2A prong 2, thus the claim is directed to the judicial exception as it has not been integrated into practical application, and fails Step 2B as not amounting to significantly more Therefore, Claim 6 does not recite patent eligible subject matter under 35 U.S.C. § 101.
With regards to claim 7, it recites the additional element of “wherein the amount of utilized bandwidth of the virtual function is determined by a bandwidth analysis module in the data storage device.” This limitation is merely a generic computing component, labeled a “bandwidth analysis module,” performing the abstract mental determination as discussed above at Step 2A Prong 1 – i.e., merely using a computer as a tool to apply abstract idea (see MPEP § 2106.05(f)) without reciting any particular technical mechanism by which the module measures bandwidth. For the same reasons as above with regard to integration into practical application and whether additional elements amount to significantly more, claim 7 also fails both Step 2A prong 2, thus the claim is directed to the judicial exception as it has not been integrated into practical application, and fails Step 2B as not amounting to significantly more Therefore, Claim 7 does not recite patent eligible subject matter under 35 U.S.C. § 101.
With regards to claim 8, 9, and 10, they recite that “the hypervisor is located in the data storage device” (claim 8), “the hypervisor is located in a host in communication with the data storage device.” (claim 9), “the hypervisor is located in a layer between the data storage device and a host in communication with the data storage device.” (claim 10). These limitations are merely recitations of generic computing components in various generically-claimed locations and/or the technological environment in which the abstract idea is practiced (see MPEP § 2106.05(f) and (h)), and do not recite any particular technical detail as to how the location of the hypervisor changes the manner in which the abstract idea of determining utilized bandwidth and recommending a change is carried out. For the same reasons as above with regard to integration into practical application and whether additional elements amount to significantly more, claims 8, 9, and 10 also fail both Step 2A prong 2, thus the claims are directed to the judicial exception as it has not been integrated into practical application, and fail Step 2B as not amounting to significantly more Therefore, Claims 8, 9, and 10 do not recite patent eligible subject matter under 35 U.S.C. § 101.
With regards to claim 11, it recites the additional element of “the memory comprises a three-dimensional memory”. This is merely a recitation of technological environment in which the abstract idea is practiced, i.e., a data storage employing three-dimensional memory technology, does not integrate the abstract idea into a practical application (see MPEP § 2106.05(h)). For the same reasons as above with regard to integration into practical application and whether additional elements amount to significantly more, claim 11 also fails both Step 2A prong 2, thus the claim is directed to the judicial exception as it has not been integrated into practical application, and fails Step 2B as not amounting to significantly more Therefore, Claim 11 does not recite patent eligible subject matter under 35 U.S.C. § 101.
With regards to claim 13, it recites the additional element of “wherein the recommendation is provided in response to the utilized bandwidth differing from the allocated bandwidth by more than a threshold,” as drafted, is a process that, but for the recitation of generic computing components, under its broadest reasonable interpretation, covers performance of the limitation in the mind. For example, a person can mentally compare the difference between the utilized and allocated bandwidth against a threshold amount before deciding whether to voice a recommendation. For the same reasons as above with regard to integration into practical application and whether additional elements amount to significantly more, claim 13 also fails both Step 2A prong 2, thus the claim is directed to the judicial exception as it has not been integrated into practical application, and fails Step 2B as not amounting to significantly more Therefore, Claim 13 does not recite patent eligible subject matter under 35 U.S.C. § 101.
With regards to claim 14, 15, and 16, they recite that “utilizing a machine learning model to determine whether the recommendation is viable” (claim 14); “wherein the machine learning model applies an inference procedure on a stored model that was trained offline using a plurality of different bandwidth allocations used in multi-tenant operations” (claim 15); and “wherein the machine learning model comprises a reinforcement learning (RL) model” (claim 16). These limitations recite a generic machine learning model, invoked at a high level of generality to perform the viability determination, which is merely using a generic, computer-implemented tool to apply the abstract idea (see MPEP § 2106.05(f)). The claims do not recite any particular improved model architecture or technical mechanism by which the model itself improved; claim 15 recites only conventional offline-train/ online-infer paradigm and claim 16 recites only the name of a known class of model (“reinforcement learning”), without more. For the same reasons as above with regard to integration into practical application and whether additional elements amount to significantly more, claims 14, 15, and 16 also fail both Step 2A prong 2, thus the claims are directed to the judicial exception as it has not been integrated into practical application, and fail Step 2B as not amounting to significantly more Therefore, Claims 14, 15, and 16 do not recite patent eligible subject matter under 35 U.S.C. § 101.
With regards to claim 19, it recites the additional element of “wherein the recommendation is provided to a hypervisor,” which is merely insignificant extra solution data transmission (see MPEP § 2106.05(g)). Further, this insignificant extra solution data transmission is WURC, see MPEP § 2106.05(d)(II)) “The courts have recognized the following computer functions as well‐understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity. i. Receiving or transmitting data over a network.” For the same reasons as above with regard to integration into practical application and whether additional elements amount to significantly more, claim 19 also fails both Step 2A prong 2, thus the claim is directed to the judicial exception as it has not been integrated into practical application, and fails Step 2B as not amounting to significantly more Therefore, Claim 19 does not recite patent eligible subject matter under 35 U.S.C. § 101.
Therefore, claims 1-20 do not recite patent eligible subject matter under 35 U.S.C. § 101.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 3, 5, 6, 7, 9, 12, 13, 18, 19 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Beygi et al. Pub. No. US 20210247935 A1 (hereafter Beygi) in view of Gonzalez et al. Pub. No US 20100229175 A1 (hereafter Gonzalez).
With regard to claim 1, Beygi teaches a data storage device comprising: a memory. Beygi’s claimed “data storage device” corresponds to the enclosure level product (“multiple function storage device 125, which may include enclosure 415 and components inside” [104]. Beygi states that “NVMe SSD 435 may also include host interface 710…SSD controller 715, and various flash memory chips 425-1 through 425-8 (also termed flash memory storage)” [0132]).
Beygi teaches one or more processors, individually or in combination, configured to perform the function below. Beygi states that “the external logic may be implemented in a FPGA or a System on a Chip (SoC) processor that may be part of the storage device of the SSD” [0031]. Beygi use of word ‘external’ does not mean physically separate from the claimed device: (“The term "external" in "bridging device" should be understood to mean that the circuit in question is "external" to the storage device itself…bridging device 430 does not have to be "external" to everything…bridging device 430 and storage device 435 may both be inside enclosure 415, and therefore not separately visible to a customer” [0107]).
Beygi teaches receive, from a hypervisor, an allocated bandwidth of a virtual function implemented in the data storage device (“Examples of ways in which hypervisor 405…may configure storage device 435 may include…allocation of resources, such as bandwidth and storage capacity allocated to the functions exposed by storage device 435” [0126]. Beygi confirms that the “functions exposed by storage device 435” are physical and virtual functions specifically: “the number of physical functions (PFs) and virtual functions (VFs) exposed by storage devices inside enclosure 415” [0104]; “NVMe SSD 435 may expose PF 440 and VFs 445-1 and 445-2. For each exposed function (physical or virtual), NVMe SSD 435 may include an NVMe controller” [0106]. Examiner’s Note: Read together, [0126]’s disclosure of bandwidth allocated to “functions exposed by storage device 435” necessarily includes bandwidth allocated to a virtual function specifically. Beygi confirms the bridging device is the one receiving and acting on that allocation “Bridging device 430 may be responsible for managing QoS for the remote hosts. While the host (more particularly hypervisor 405…) may be responsible for generating the QoS policies, bridging device 430 may enforce the policies” [0128]).
Beygi teaches determine an amount of utilized bandwidth of the virtual function “The FPGA, on the other hand, may provide isolation and fairness among all VMs based on the defined QoS profiles and may guarantee the entire bandwidth is not consumed by a single channel or a group of channels. The FPGA may also measure important information such as bandwidth and buffer levels and provide this information to the hypervisor for monitoring and fine-tuning of the policies.” [0081]. Beygi confirms each such “channel” is an individual exposed function, including VF specifically; bridging device 430 “may include one NVMe submission/completion queue pair 635 for each function exposed by storage device 435… FIG. 6 shows three NVMe submission/completion queue pairs: one for a PF, one for VF.sub.1, and one for VF.sub.k.” [0118]. Examiner’s Note: [0081]’s bandwidth guarantees and measurement is done per channel, and [0118] shows each channel is just a queue pair assigned to one specific function, a PF, VF1, or VFK. Since VF is one of those functions with its own queue pair, the FPGA’s bandwidth measurement in [0081] is measuring bandwidth per function, including per VF, not one combined number for the whole device.
Beygi does not teach based on the determined amount of utilized bandwidth, provide, to the hypervisor, a recommended change to the allocated bandwidth.
However, in analogous art, Gonzalez teaches determining utilization based on actual usage against a threshold: (“the tool 242 discovers a first resource…[and] discovers that the current partition transferred a first amount of data to the first resource, and the first amount of data is less than a threshold amount of data” [0116]. Based on that determination, Gonzalez builds a specific proposal “the tool 242 builds a deallocation recommendation” [0125], specifying “an allocate or deallocate change 740 for a specified resource 745 for a partition 750” [0087]). Gonzalez further confirms bandwidth specifically is one of the resources it tracks and allocates “Examples of resources include the processors 101, the memory 102, the interface devices 111, 112, 113, and 114, the storage devices 125 and 126, printers, fax machines, bandwidth of the network 130, an I/O (input/output) device, any other resource or device” [0067].
It would have been obvious to a person having ordinary skill in the art prior to the effective filling date of the claimed invention to modify Beygi’s FPGA so that, instead of reporting raw bandwidth and buffer measurements to the hypervisor, that is used to fine-tune policies (Beygi ¶ [0081]), it builds and sends specific recommended change, the way Gonzalez teaches. This results in a data storage device whose processor determines utilized bandwidth and then provides, to the hypervisor a recommended change to the allocated bandwidth, rather than raw usage data for the hypervisor to interpret on its own.
A person having ordinary skill in the art would have been motivated to make this modification for two reasons. First, Beygi already discloses the channel this modification would use on its own device. The FPGA measures bandwidth “and provide this information to the hypervisor for monitoring and fine-tuning of the policies” [0081]. No new communication mechanism has to be invented, only what is sent over an already-existing path. Second, sending a specific recommendation is more actionable than raw bandwidth and buffer measurements as it names a specific resource and a specific proposed change, rather than requiring the hypervisor to derive from raw numbers itself. Gonzalez’s recommended allocation changes do exactly this, specifying, “an allocate or deallocate change 740 for a specified resource 745 for a partition 750” [0087].
With regard to claim 3, Beygi and Gonzalez teach the data storage device of claim 1.
Beygi further teaches wherein the one or more processors, individually or in combination, are further configured to receive, from the hypervisor, an updated allocated bandwidth as already established in claim 1 “examples of ways in which hypervisor 405…may configure storage device 435 may include…allocation of resources, such as bandwidth and storage capacity allocated to the functions exposed by storage device 435” [0126]),
Beygi does not teach that the received allocated bandwidth is an updated allocated bandwidth in response to the recommended change.
However, in analogous art, Gonzalez teaches receive, from the hypervisor, an updated allocated bandwidth in response to the recommended change (““the tool 242 builds a deallocation recommendation” [0125]”; “In response to receipt of the allocation instruction, the hypervisor 244 allocates the specified resources 715 in the specified amounts to the respective partition 705 in the respective CEC 704” [0084]). Examiner’s Note: together, these show the hypervisor executing an allocation change specifically upon receipt of an instruction built from a recommendation, establishing the recommendation-to-execution link.
It would have been obvious to a person having ordinary skill in the art prior to the effective filling date of the claimed invention to combine the recommendation-triggered allocation update of Gonzalez with the hypervisor-configurable bandwidth allocation channel of Beygi, resulting in a data storage device that receives, from the hypervisor, an updated allocated bandwidth in response to the recommended change
A person having ordinary skill in the art would have been motivated to make this combination for the purpose of completing the recommendation loop so the recommendation has an actual effect on the device’s allocation, since Gonzalez “in response to receipt of the allocation instruction, the hypervisor 244 allocates the specified resources 715 in the specified amounts to the respective partition 705 in the respective CEC 704” [0084]).
With regard to claim 5, Beygi and Gonzalez teach the data storage device of Claim 1.
Beygi further teaches wherein: the data storage device comprises a multi-tenant data storage device “remote host 305-1 may support multiple hypervisors, each managing a subset of the VMs running on remote host 305-1” [0103]. Examiner Note: Beygi discloses host-level hypervisor plurality, each hypervisor managing a distinct subset of VMs. Because each hypervisor configures storage device 435 with its own allocation, as established for claim 1 (“hypervisor 405…may configure storage device 435 may include…allocation of resources, such as bandwidth and storage capacity allocated to the functions exposed by storage device 435”), a storage device service multiple such hypervisors is a multi-tenant data storage device.
Beygi further teaches the one or more processors, individually or in combination, are further configured to implement at least one additional virtual function; and the virtual function and the at least one additional virtual function are assigned by different physical functions associated with different tenants (“embodiments of the inventive concept may include storage device 435 exposing more than one PF (with a set of related VFs for each exposed PF)” [0131]) Examiner’s note: together with [0103] above, storage device 435 exposes multiple physical functions, each with its own set of virtual functions, serving multiple hypervisors on the host side – i.e., different tenants, each tenant’s virtual function assigned by a different physical function.
With regard to claim 6, Beygi and Gonzalez teach the data storage device of Claim 1.
Beygi further teaches further comprising a single-root input/output virtualization (SR-IOV) interface “NVMe SSD 435 may implement Single Root Input/Output Virtualization (SR-IOV) to support multiple remote hosts communicating with NVMe SSD 435” [0106].
With regard to claim 7, Beygi and Gonzalez teach the data storage device of Claim 1.
Beygi further teaches wherein the amount of utilized bandwidth of the virtual function is determined by a bandwidth analysis module in the data storage device (“the FPGA may also measure important information such as bandwidth and buffer levels” [0081]). Under the broadest reasonable interpretation, “a bandwidth analysis module” encompasses any structure within the data storage device configured to determine bandwidth utilization. Beygi’s FPGA is such structure, since it is the same element already shown in claim 1 determining the amount of utilized bandwidth of the virtual function.
With regard to claim 9, Beygi and Gonzalez teach the data storage device of Claim 1.
Beygi further teaches wherein the hypervisor is located in a host in communication with the data storage device “remote host 305-1 may support multiple hypervisors, each managing a subset of the VMs running on remote host 305-1” [0103].
With regards to claim 12, Beygi teaches a method comprising: performing in a data storage device comprising a memory. As with claim 1, Beygi’s ‘data storage device’ is the enclosure level (“multiple function storage device 125, which may include enclosure 415 and components inside” [104], which includes “flash memory chips 425-1 through 425-8” [0132]).
Beygi teaches receiving allocated bandwidth of a virtual function in the data storage device (“hypervisor 405…may configure storage device 435 may include…allocation of resources, such as bandwidth and storage capacity allocated to the functions exposed by storage device 435” [0126]). Beygi confirms that the “functions exposed by storage device 435” are physical and virtual functions specifically: “the number of physical functions (PFs) and virtual functions (VFs) exposed by storage devices inside enclosure 415” [0104]; “NVMe SSD 435 may expose PF 440 and VFs 445-1 and 445-2. For each exposed function (physical or virtual), NVMe SSD 435 may include an NVMe controller” [0106]. Examiner’s Note: Read together, [0126]’s disclosure of bandwidth allocated to “functions exposed by storage device 435” necessarily includes bandwidth allocated to a virtual function specifically.
Beygi does not teach comparing the allocated bandwidth with a utilized bandwidth or in response to the utilized bandwidth differing from the allocated bandwidth, providing a recommendation to change the allocated bandwidth.
However, in analogous art, Gonzalez teaches comparing the allocated bandwidth with a utilized bandwidth (“the tool 242 discovers a first resource…[and] discovers that the current partition transferred a first amount of data to the first resource, and the first amount of data is less than a threshold amount of data [0116]” – a comparison of actual utilization against a threshold tied to the resource’s allocation.
Gonzalez further teaches based on the threshold comparison “the tool 242 builds a deallocation recommendation”, specifying “an allocate or deallocate change 740 for a specified resource 745 for a partition 750” [0087]) – triggered by the threshold condition. Gonzalez further confirms bandwidth specifically is one of the resources it tracks and allocates “Examples of resources include the processors 101, the memory 102, the interface devices 111, 112, 113, and 114, the storage devices 125 and 126, printers, fax machines, bandwidth of the network 130, an I/O (input/output) device, any other resource or device” [0067].
It would have been obvious to a person having ordinary skill in the art prior to the effective filling date of the claimed invention to modify Beygi’s FPGA so that, it compares its own bandwidth measurement against the allocation bandwidth and, when the two differ, builds and sends a recommendation, rather than reporting raw measurements for the hypervisor to evaluate on its own. This results in a method performed in a data storage device that compares allocated and utilized bandwidth and provides a conditional recommendation.
A person having ordinary skill in the art would have been motivated to make this modification for the same two reasons. First, Beygi already discloses the reporting channel this modification would use. The FPGA “measure[s] important information such as bandwidth and buffer levels and provide this information to the hypervisor for monitoring and fine-tuning of the policies” [0081] so only the content of what is reported changes. And triggering the recommendation only when usage duffers from allocation avoids sending the hypervisor unnecessary recommendations when the current allocation is already adequate, as Gonzalez teaches via its threshold check “the tool 242 discovers a first resource…[and] discovers that the current partition transferred a first amount of data to the first resource, and the first amount of data is less than a threshold amount of data” [0116].
With regard to claim 13, Beygi and Gonzalez teach the method of Claim 12.
Beygi does not teach wherein the recommendation is provided in response to the utilized bandwidth differing from the allocated bandwidth by more than a threshold.
However, in analogous art, Gonzalez teaches the recommendation is provided in response to the utilized bandwidth differing from the allocated bandwidth by more than a threshold “the tool 242 discovers a first resource…[and] discovers that the current partition transferred a first amount of data to the first resource, and the first amount of data is less than a threshold amount of data” [0016].
It would have been obvious to a person having ordinary skill in the art prior to the effective filling date of the claimed invention to modify Beygi’s method so that the recommendation already established for claim 12 is provided specifically when Gonzalez’s threshold comparison indicates the utilized bandwidth differs from the allocated bandwidth by more than a threshold, the way Gonzalez teaches.
A person having ordinary skill in the art would have been motivated to make this modification for the purpose of avoiding unnecessary recommendations when the current allocation is already adequate, triggering the recommendation only when usage meaningfully differs from allocation, as Gonzalez’s threshold check teaches “the tool 242 discovers a first resource…[and] discovers that the current partition transferred a first amount of data to the first resource, and the first amount of data is less than a threshold amount of data” [0016].
With regard to claim 18, Beygi and Gonzalez teach the method of Claim 12.
Beygi further teaches further comprising receive an allocated bandwidth, as already established for claim 12 “examples of ways in which hypervisor 405…may configure storage device 435 may include…allocation of resources, such as bandwidth and storage capacity allocated to the functions exposed by storage device 435” [0126].
Beygi does not teach that the received bandwidth is an updated allocated bandwidth in response to the recommendation.
However, in analogous art, Gonzalez teaches an updated allocated bandwidth in response to the recommendation (““the tool 242 builds a deallocation recommendation” [0125] and “and “in response to receipt of the allocation instruction, the hypervisor 244 allocates the specified resources 715 in the specified amounts to the respective partition 705 in the respective CEC 704.” [0084]). Examiner’s Note: together these show the hypervisor executing an allocation specifically upon receipt of an instruction built from a recommendation, establishing the recommendation to execution link of claim 18.
It would have been obvious to a person having ordinary skill in the art prior to the effective filling date of the claimed invention to modify Beygi’s method so that the allocated bandwidth it already receives (“examples of ways in which hypervisor 405…may configure storage device 435 may include…allocation of resources, such as bandwidth and storage capacity allocated to the functions exposed by storage device 435” [0126]) is specifically an updated allocated bandwidth received in response to the recommendation, the way Gonzalez teaches.
A person having ordinary skill in the art would have been motivated to make this modification for the purpose of completing the recommendations loop so the recommendation has an actual effect on the device’s allocation, since Gonzalez confirms the hypervisor executes the allocation specifically upon the receipt of an instruction built from the recommendation “in response to receipt of the allocation instruction, the hypervisor 244 allocates the specified resources 715 in the specified amounts to the respective partition 705 in the respective CEC 704” [0084].
With regard to claim 19, Beygi and Gonzalez teach the method of Claim 12.
Beygi further teaches wherein the recommendation is provided to a hypervisor, as already established for claim 12 “the FPGA may also measure important information such as bandwidth and buffer levels and provide this information to the hypervisor for monitoring and fine-tuning of the policies” [0081].
With regards to claim 20, Beygi teaches a data storage device comprising: a memory, same as claim 1, the enclosure level (“multiple function storage device 125, which may include enclosure 415 and components inside” [104], which includes “flash memory chips 425-1 through 425-8” [0132]).
Beygi teaches means for monitoring usage of allocated bandwidth of a virtual function implemented in the data storage device. Beygi states that “the FPGA may also measure important information such as bandwidth and buffer levels and provide this information to the hypervisor for monitoring and fine-tuning of the policies” [0081]. This FPGA is on the same enclosure as-level device as the memory. It “may be part of the storage device of the SSD” [0031], and Beygi confirms its "external" bridging device naming does not mean physically separate, “bridging device 430 and storage device 435 may both be inside enclosure 415, and therefore not separately visible to a customer” [0107]). Beygi further confirms the monitored bandwidth is allocated at the level of a virtual function specifically: “the number of physical functions (PFs) and virtual functions (VFs) exposed by storage devices inside enclosure 415” [0104]; “NVMe SSD 435 may expose PF 440 and VFs 445-1 and 445-2. For each exposed function (physical or virtual), NVMe SSD 435 may include an NVMe controller” [0106]; and bridging device 430 “may include one NVMe submission/completion queue pair 635 for each function exposed by storage device 435… FIG. 6 shows three NVMe submission/completion queue pairs: one for a PF, one for VF.sub.1, and one for VF.sub.k.” [0118]. Examiner’s Note: [0081]’s bandwidth guarantees and measurement is done per channel, and [0118] shows each channel is just a queue pair assigned to one specific function, a PF, VF1, or VFK. Since VF is one of those functions with its own queue pair, the FPGA’s bandwidth measurement in [0081] is measuring bandwidth per function, including per VF.
Beygi does not teach recommending a change to the allocated bandwidth based on monitored usage of the allocated bandwidth.
However, in analogous art, Gonzalez teaches “the tool 242 builds a deallocation recommendation” [0125], specifying “an allocate or deallocate change 740 for a specified resource 745 for a partition 750” [0087]). Gonzalez further confirms bandwidth specifically is one of the resources it tracks and allocates “Examples of resources include the processors 101, the memory 102, the interface devices 111, 112, 113, and 114, the storage devices 125 and 126, printers, fax machines, bandwidth of the network 130, an I/O (input/output) device, any other resource or device” [0067].
It would have been obvious to a person having ordinary skill in the art prior to the effective filling date of the claimed invention to modify Beygi’s FPGA so that, based on the bandwidth usage it already monitors, it builds and sends specific recommended change, the way Gonzalez teaches, instead of reporting raw usage data. This results in a data storage device with a memory and monitoring and recommending functionality operating on that same device.
A person having ordinary skill in the art would have been motivated to make this modification for the same reasons. Beygi already discloses the reporting channel this modification would use; The FPGA “measure[s] important information such as bandwidth and buffer levels and provide this information to the hypervisor for monitoring and fine-tuning of the policies” [0081] and a specific recommendation is more directly actionable that raw data, since it names a specific resource and proposed change rather than requiring the hypervisor to derive that from raw numbers, as Gonzalez’s recommended allocation changes do exactly this, specifying, “an allocate or deallocate change 740 for a specified resource 745 for a partition 750” [0087].
Claim(s) 2, 11 and 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Beygi in view of Gonzalez, further in view of Chandrashekaraiah et al. Pub. No. US 20230315295 A1 (hereafter Chandrashekaraiah).
With regards to claim 2, Beygi and Gonzalez teach the data storage device of Claim 1.
Beygi and Gonzalez do not teach wherein: the one or more processors, individually or in combination, are further configured to determine an expected workload of the virtual function; and the recommended change is further based on the determined expected workload.
However, in analogous art, Chandrashekaraiah teaches wherein the one or more processors, individually or in combination, are further configured to determine an expected workload of the virtual function; and the recommended change is further based on the determined expected workload (“the QoS processor computes a projected QoS based on the classification of the workload” [0047]; “the QoS processor determines if the projected QoS indicates that an expected workload will exceed the QoS negotiated at operation 305. In response to determining that the QoS will be exceeded, the method 300 proceeds to operation 340 and the QoS processor requests to update the configuration policy from one or more hosts” [0050]. Further, “the QoS processor updates the configuration policy based on the projected QoS” [0053]).
It would have been obvious to a person having ordinary skill in the art prior to the effective filling date of the claimed invention to combine Chandrashekaraiah’s expected-workload-based configuration update with the recommendation already established for claim 1 resulting in a data storage device wherein the one or more processors, individually or in combination, are further configured to determine an expected workload of the virtual function; and the recommended change is further based on the determined expected workload.
A person having ordinary skill in the art would have been motivated to make this combination for the purpose of adjusting the allocated bandwidth proactively, before the QoS commitment is actually violated, rather than only reactively after usage has already diverged from allocation, since Chandrashekaraiah’s own system updates the configuration policy specifically to get ahead of an expected shortfall “the QoS processor determines if the projected QoS indicates that an expected workload will exceed the QoS negotiated at operation 305. In response to determining that the QoS will be exceeded, the method 300 proceeds to operation 340 and the QoS processor requests to update the configuration policy from one or more hosts” [0050].
With regards to claim 11, Beygi and Gonzalez teach the data storage device of Claim 1.
Beygi and Gonzalez do not teach wherein the memory comprises a three-dimensional memory.
However, in analogous art, Chandrashekaraiah teaches wherein the memory comprises a three-dimensional memory “NAND type flash memory includes, for example, two-dimensional NAND (2D NAND) and three-dimensional NAND (3D NAND)” [0022]; “some examples of non-volatile memory devices…include…three-dimensional cross-point (“3D cross-point”) memory device”
It would have been obvious to a person having ordinary skill in the art prior to the effective filling date of the claimed invention to implement Beygi’s flash memory chips using a three-dimensional memory architecture, as Chandrashekaraiah teaches, resulting in a data storage device wherein the memory comprises a three-dimensional memory.
A person having ordinary skill in the art would have been motivated to make this combination for the purpose of increasing storage density and capacity within the same physical footprint, since three-dimensional memory architectures were a well-known, standard alternative to two dimensional NAND, as Chandrashekaraiah confirms “NAND type flash memory includes, for example, two-dimensional NAND (2D NAND) and three-dimensional NAND (3D NAND)” [0022].
With regards to claim 17, Beygi and Gonzalez teach the method of Claim 12.
Beygi and Gonzalez do not teach further comprising determining an expected workload of the virtual function, wherein the recommendation is further based on the determined expected workload.
However, in analogous art, Chandrashekaraiah teaches further comprising determining an expected workload of the virtual function, wherein the recommendation is further based on the determined expected workload (“the QoS processor computes a projected QoS based on the classification of the workload” [0047]; “the QoS processor determines if the projected QoS indicates that an expected workload will exceed the QoS negotiated at operation 305. In response to determining that the QoS will be exceeded, the method 300 proceeds to operation 340 and the QoS processor requests to update the configuration policy from one or more hosts” [0050]. Further, “the QoS processor updates the configuration policy based on the projected QoS” [0053]).
It would have been obvious to a person having ordinary skill in the art prior to the effective filling date of the claimed invention to combine Chandrashekaraiah’s expected-workload-based configuration update with the recommendation already established for claim 12 resulting in a method further comprising determining an expected workload of the virtual function, wherein the recommendation is further based on the determined expected workload.
A person having ordinary skill in the art would have been motivated to make this combination for the purpose of adjusting the allocated bandwidth proactively, before the QoS commitment is actually violated, rather than only reactively after usage has already diverged from allocation, since Chandrashekaraiah’s own system updates the configuration policy specifically to get ahead of an expected shortfall (“the QoS processor determines if the projected QoS indicates that an expected workload will exceed the QoS negotiated at operation 305. In response to determining that the QoS will be exceeded, the method 300 proceeds to operation 340 and the QoS processor requests to update the configuration policy from one or more hosts” [0050]).
Claim(s) 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Beygi in view of Gonzalez, further in view of Furey et al. Pub. No. US 20200050402 A1 (hereafter Furey).
With regards to claim 4, Beygi and Gonzalez teach the data storage device of Claim 3.
Beygi and Gonzalez do not teach wherein the updated allocated bandwidth is achieved by applying throttling.
However, in analogous art, Furey teaches wherein the updated allocated bandwidth is achieved by applying throttling (“a quality of service and bandwidth metering associated with access to the virtual private namespace may be controlled by the NVMe switch by a throttling process because the SSD associated with the virtual private namespace may be accessed by other VMs or hosts” [0028]). Examiner’s Note: Furey’s throttling process is a mechanism by which a target bandwidth allocation to a virtual function is actually realized/enforced at the command level. Since the claim’s updated allocated bandwidth is simply a new target value for that same allocation, achieving any allocated bandwidth value (updated or initial) through this same throttling process satisfies this claim.
It would have been obvious to a person having ordinary skill in the art prior to the effective filling date of the claimed invention to combine Furey’s throttling-based bandwidth control with the updated allocated bandwidth already established for claim 3, resulting in a data storage device wherein the updated allocated bandwidth is achieved by applying throttling.
A person having ordinary skill in the art would have been motivated to make this combination for the purpose of enforcing the updated bandwidth allocation directly at the command level, without requiring new hardware resources to be reallocated, since Furey’s own system uses throttling for exactly this purpose in a virtual function context accessed by multiple VMs or hosts “a quality of service and bandwidth metering associated with access to the virtual private namespace may be controlled by the NVMe switch by a throttling process because the SSD associated with the virtual private namespace may be accessed by other VMs or hosts” [0028].
Claim(s) 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Beygi in view of Gonzalez, further in view of Liu et al. Pub. No. US 20210365206 A1 (hereafter Liu).
With regards to claim 8, Beygi and Gonzalez teach the data storage device of Claim 1.
Beygi and Gonzalez do not teach wherein the hypervisor is located in the data storage device.
However, in analogous art, Liu teaches wherein the hypervisor is located in the data storage device “The data path architecture 1607 is assumed to be implemented on an embedded hypervisor 1601 (e.g., a VMware ESXi™ hypervisor)…the embedded hypervisor 1601 is an example of a “virtual” storage controller of a storage system (e.g., a virtual one of the storage controllers 110 in storage array 106-1) [0099]. Lui confirms storage array 106-1 is itself the data storage device “the storage array 106-1, as shown in FIG. 1, comprises a plurality of storage devices 108-1, 108-2, . . . 108-P” [0015], and Liu expressly defines both “storage device” (“herein is intended to be broadly construed, and so may encompass, for example, SSDs, HDDs, flash drives, hybrid drives or other types of storage products and devices” [0032]) and “storage array” (“herein is intended to be broadly construed, and may encompass multiple distinct instances of a commercially-available storage array. [0034]”).
It would have been obvious to a person having ordinary skill in the art prior to the effective filling date of the claimed invention to locate the hypervisor already established in claim 1 within the data storage itself, implemented as an embedded virtual storage controller the way Liu teaches, resulting in a data storage device wherein the hypervisor is located in the data storage device.
A person having ordinary skill in the art would have been motivated to make this modification because implementing the storage controller as a virtual machine running on an embedded hypervisor is a known, interchangeable design choice for a storage array’s I/O stack, allowing the controller functionality the array already needs to run in virtualized form without adding a separate physical controller, as Liu demonstrates “The embedded hypervisor 1601 is an example of a “virtual” storage controller of a storage system (e.g., a virtual one of the storage controllers 110 in storage array 106-1). [0099]”.
Claim(s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Beygi in view of Gonzalez, further in view of Noureddine et al. Pub. No. US 20210250285 A1 (hereafter Noureddine).
With regards to claim 10, Beygi and Gonzalez teach the data storage device of Claim 1.
Beygi and Gonzalez do not teach wherein the hypervisor is located in a layer between the data storage device and a host in communication with the data storage device.
However, in analogous art, Noureddine teaches wherein the hypervisor is located in a layer between the data storage device and a host in communication with the data storage device (“DPU 60 includes a network interface (e.g., an Ethernet interface) to connect directly to a network, and a plurality of host interfaces (e.g., PCIe interfaces) to connect directly to one or more application processors (e.g., CPU 90) and one or more storage devices (e.g., SSDs 88)” [0055]; “the control plane software stack includes a hypervisor 80, a multi-tasking control plane OS 82 executing on hypervisor 80, and one or more control plane service agents 84 executing on control plane OS 82. Hypervisor 80 may operate to isolate control plane OS 82 from the work unit and data processing performed on data plane OS 62” [0059]). Examiner’s Note: DPU 60 is disclosed as the same device that connects directly to both the application processor (host) and the storage devices, and that same DPU 60 hosts hypervisor 80 as part of its control plane software stack. Under the broadest reasonable interpretation, the DPU 60 on which hypervisor 80 executes is therefore a layer positioned between the data storage and the host.
It would have been obvious to a person having ordinary skill in the art prior to the effective filling date of the claimed invention to relocate the hypervisor already established in claim 1 into an intermediary DPU layer positioned between the data storage device and the host, as Noureddine teaches, resulting in a data storage device wherein the hypervisor is located in a layer between the data storage device and a host in communication with the data storage device.
A person having ordinary skill in the art would have been motivated to make this modification because positioning the hypervisor on a dedicated DPU layer between the host and the data storage device offloads virtualization and I/O processing overhead from both, reducing bottlenecks and freeing the host and storage-side processors to dedicate their resources to application workloads, as Noureddine teaches (“each DPU 17 is a highly programmable I/O processor specially designed for offloading certain functions from storage nodes 12 and compute nodes 13… DPUs 17 may be programmatically configured to serve as a security gateway for its respective storage nodes 12 and/or compute nodes 13, freeing up the processors of the nodes to dedicate resources to application workloads” [0027]).
Claim(s) 14, 15, and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Beygi in view of Gonzalez, further in view of Penney et al. Pub. No. US 20220326999 A1 (hereafter Penney).
With regards to claim 14, Beygi and Gonzalez teach the method of Claim 12.
Beygi and Gonzalez do not teach further comprising utilizing a machine learning model to determine whether the recommendation is viable.
However, in analogous art, Penney teaches further comprising utilizing a machine learning model to determine whether the recommendation is viable (“QoS prediction is used in embodiments to provide fast feedback on resource allocation decisions (e.g., whether the selected resource allocation could cause a QoS violation). Input to the QoS predictor is a small set of architectural counters determined via offline profiling and feature selection. At runtime, measurements for each of these counters are aggregated across high-priority workload cores at the desired interval and then delivered to the QoS predictor. The model then predicts the QoS metric for each high-priority workload, which is compared to the target QoS specified by the customer” [0047]).
It would have been obvious to a person having ordinary skill in the art prior to the effective filling date of the claimed invention to add Penney’s machine learning viability check to the recommendation already established in claim 12, resulting in a method further comprising utilizing a machine learning model to determine whether the recommendation is viable.
A person having ordinary skill in the art would have been motivated to make this combination because a specialized QoS-predication model provides bear-instantaneous feedback on a proposed resource allocation action before it is carried out, avoiding the delay and risk of committing a change that could itself cause a service-level violation, as Penney teaches, in describing the exact problem the model addressed (“reinforcement-learning-based resource allocation is typically not practical in operating environments that use online learning. Embodiments may provide a framework that mitigates this problem using a specialized QoS prediction model that may provide near-instantaneous feedback on resource allocation actions, thus greatly reducing the time to learn an appropriate resource allocation policy” [0031]).
With regards to claim 15, Beygi, Gonzalez, and Penney teach the method of Claim 14.
Penney further teaches wherein the machine learning model applies an inference procedure on a stored model that was trained offline “method 150 includes two phases, phase 152 for initial sampling and model training and phase 154 for inference and model updates” [0036]. “Input to the QoS predictor is a small set of architectural counters determined via offline profiling and feature selection” [0047].
Penney further teaches using a plurality of different bandwidth allocations “one or more resource allocation(s) (e.g., as set in 170) are sampled by collecting QoS and performance counter measurements” [0037]). Further “Memory bandwidth actions a_MBW specify the degree of restriction, with possible values ranging from 0-90%. The best-effort memory bandwidth restriction is then given as 100−a_MBW” [0053].
Penney further teaches used in multi-tenant operations “shared resources, such as last-level cache (LLC) and primary memory bandwidth in use by applications and/or virtual machine (VMs) running on a computing platform concurrently” [0062]; Further “the CAT architecture defines a per-software-thread tag called a Class of Service (CLOS), which enables running threads, applications or VMs to be mapped to a particular bandwidth” [0065]; Further states “co-scheduling…best-effort workloads on the same physical system” alongside high priority workload. Examiner’s Note: the high-priority and best effort workloads co scheduled in [0021]/[0053] are the applications/VMs referenced in [0062]/[0065] as concurrently sharing bandwidth under RDT’s per workload CLOS based bandwidth mapping.
It would have been obvious to a person having ordinary skill in the art prior to the effective filling date of the claimed invention to configure Penney’s machine learning model already established in claim 14 to apply interference procedure on a stored model trained offline using a plurality of different bandwidth used in multi-tenant operations, resulting in a method wherein the machine learning model applies an inference procedure on a stored model that was trained offline using a plurality of different bandwidth allocations used in multi-tenant operations.
A person having ordinary skill in the art would have been motivated to make this combination because training the model before hand across a range of different resource-allocation policies and proactively avoid quality of service violations, rather than discovering an appropriate policy through risky live exploration in a shared, multi-tenant environment, as Penney teaches (“consequently, a framework according to embodiments may reliably exploit the advantages of reinforcement learning in any operating environment, which may provide for: learning fine-grained resource allocation policies that exploit brief periods with low workload demand and proactively avoid QoS violations during periods with high workload demand”) [0031-0032].
With regards to claim 16, Beygi, Gonzalez, and Penney teach the method of Claim 14.
Penney further teaches wherein the machine learning model comprises a reinforcement learning (RL) model (“Model: The resource allocation controller in embodiments may be implemented as a deep reinforcement learning model” [0050]).
It would have been obvious to a person having ordinary skill in the art prior to the effective filling date of the claimed invention to implement Penney’s machine learning model already established in claim 14 as a reinforcement model, resulting in a method wherein the machine learning model comprises a reinforcement learning (RL) model.
A person having ordinary skill in the art would have been motivated to make this combination because reinforcement learning (RL) model learns resource allocation policy from past experience and can proactively avoid service-level violations before they occur, rather than merely reacting once a violation has already happened (“control methods based on reinforcement-learning are a fundamentally different approach in which a policy for resource allocation is learned based on past experience (e.g., previous resource allocation decisions and the resulting quality-of-service that was achieved). Given sufficient past experience, these models may learn to proactively avoid SLA violations, rather than simply reacting once an SLA violation has occurred” [0028]).
Conclusion
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Teaches
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/MEZMURE DAWIT/Examiner, Art Unit 2197
/BRADLEY A TEETS/ Supervisory Patent Examiner, Art Unit 2197
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