Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 01/19/2026 has been entered.
Claims 1-20 are presented for Examination.
DETAILED ACTION
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims1, 10, 11 are rejected under 35 U.S.C. 103 as being unpatentable over Pyers et.al. (U.S Patent Application Publication 2011/0055434; hereinafter “Pyers”; Reference cited as prior art in previous office action]. in view of Teshome et.al. (U.S Patent Application Publication 2016/0378605; hereinafter “Teshome”)
Regarding claims 1,11 Pyers discloses, An information handling system, comprising:
a hardware peripheral device to provide a peripheral power, performance, and optimization (P3O) setting [ “ the shared memory 32 may be some or all random access memory accessible by the CPU 1. In such an embodiment, a communication channel between the CPU 1 and the auxiliary processor 20 (e.g., the SouthBridge 4 via a USB connection as shown in FIG. 1A) may be used by the CPU 1 to inform the auxiliary processor 20 of system data and application data memory addresses before control is passed to the auxiliary processor 20 (and vice versa when returning processing to the CPU 1)..the shared memory 32 may be a separate memory module, such as a separate memory chip on the computing device motherboard accessible by the auxiliary processor via an optional connection 12b, or a portion of memory within the modem 2. …”, 0059; “ save into shared memory information regarding the state of the computer's peripherals, operating system, power management, and similar operational conditions, step 348. 0094; 0116; 0119; ( i.e. The Shared memory corresponds to a peripheral device providing various data/ information related to the operational state of the device and peripherals for an efficient transition from CPU to auxiliary processor or vice versa); “… access the shared memory to obtain peripheral state information regarding the peripherals, operating system state, power management condition and other computer peripherals, step 382. The modem processor may use this peripheral state information to prepare to take over control of at least some of peripherals in a manner consistent with that of the current operating condition..”, 0126; “the computer's CPU may cache system state information, overall system data, current application data and application context data in shared memory, step 318… Cached system information may include data associated with the current display, state information regarding current processes, state information regarding the current power management condition, identification of the applications currently operating, and application data associated with the operating condition”, 0100; “..operating state information..”, 0113; “..” save into shared memory information regarding the state of the computer's peripherals, operating system, power management, and similar operational conditions, step 348. 0094;”.. status and configuration information regarding the computer peripherals, operating system condition, power states, open application..”, 0128-0129; (i.e. providing performance data related to operating condition/ status of the peripherals power states and power management conditions of the peripherals . The power management conditions corresponds to the optimized settings of the peripherals and other components for an efficient transition from active to low power mode or vice versa. Hence providing a peripheral power, performance, and optimization (P3O) setting )];
a hardware processor to instantiate a host operating system to manage the P3O setting when the processor is in a powered state [“0003;”.. When the main system (i.e., the CPU and OS) is active--which is the normal operating mode of the computing device..”, 0045; “Once the computer's CPU has configured itself for operation and loaded the appropriate applications and application data into working memory, and optionally received user authorization to proceed, the auxiliary processor and computer's CPU cooperate to shift control to the CPU, step 312. This shift in control may occur in a single step or may be accomplished in a series of steps depending upon the implementation. Once the shift is accomplished, processing can continue under control of the computer's CPU, step 314”, 0097; “the CPU and the auxiliary processor may operate under different operating systems (e.g., Windows.RTM. vs. BREW.RTM.) and run different applications…”, 0107; ( i.e. the operating system of the main processor or CPU corresponds to the host operating system instantiated when the main processor / CPU is active ); “ If the computer's CPU is active or as it becomes activated, it may execute a transition routine to access the state information stored in the shared memory and/or received via a communication channel, and configure itself to take over control of the computer functions, step 308. As part of this step, the CPU may use the state information stored in the shared memory to configure its own states so that a comparable operating condition can be executed upon taking control. Also, the CPU may determine the applications currently running on the auxiliary processor, load the corresponding full versions of those applications, and load application data from shared memory.”, 0094; 0119] and
a hardware baseboard management controller and to manage the P3O setting when the processor is in an unpowered state [“.. auxiliary processor mode (i.e., when the wireless modem card 2 auxiliary processor 20 has functional control over the computing device..”, 0062; “Prior to or at the time of a switch of control from the CPU 50 to the auxiliary processor 20, such as CPU on events like standby, hibernate or shutdown, the CPU may cache recently used data to the shared storage 32 via data access 64. To synchronize application data and application context data with corresponding applications running on the auxiliary processor 20, the auxiliary processor may read such data for each application from the shared storage 32 via data access 66. “, 0112; ” the CPU and the auxiliary processor may operate under different operating systems (e.g., Windows.RTM. vs. BREW.RTM.) and run different applications. For example, the auxiliary processor may run document viewers without full editing functions or slimmed down versions of applications that run on the CPU…”, 0107; (i.e. the operating system of the auxiliary processor corresponds to the service operating system instantiated upon activating the auxiliary processor); “When the computer's CPU recognizes or receives a signal to activate the auxiliary processor mode, it may determine whether there are any documents currently open, determination 374....the computer's CPU may save into shared memory information regarding the state of the computer's peripherals, operating system, power management, and similar operational conditions, step 378.”, 0123; “When the modem processor receives a signal from the computer's CPU that the control transition can begin, .. The modem processor may use this peripheral state information to prepare to take over control of at least some of peripherals in a manner consistent with that of the current operating condition. The modem processor may obtain operating state information from the shared memory indicating a state of any documents currently open on the computer, step 384..”, 0126].
However Pyers does not expressly disclose to instantiate a service operating system that operates out of band from the host operating system.
In the same field of endeavor (e.g. proactively providing an optimized service by identifying failure of the IHS to load the main or primary OS based upon the accumulated telemetry data, that the IHS has been subject to a given type of environmental or stress condition), Teshome teaches ,
instantiate a service operating system that operates out of band from the host operating system [0017; “The term “service OS,” as used herein, refers to one or more program instructions or scripts distinct from an IHS's “main OS” or “primary OS” such that, upon execution by an IHS (e.g., upon failure by the IHS to load the main or primary OS), enable one or more support, diagnostics, or remediation operations to be performed independently of the state of the main or primary OS. ..the SOS may be stored in a remote location so as to allow an IHS to boot remotely “from the cloud.” 0021;” service capabilities may be invoked either “pre-boot” or “pre-OS.” Pre-boot capabilities may be built into the EC and/or BIOS/UEFI, and pre-OS capabilities may be provided by a service OS. ..pre-OS services may include enabling a service OS to provide customer automated assistance, using built-in remediation scripts to help diagnose and remediate the device, improve support efficiency using live chat, remote control support, etc.”, 0023 ; “..backend service 105 may be configured to communicate with a service OS prior to and/or independently of IHS 102 being able to boot a main OS, and it may enable one or more support, diagnostics, or remediation operations to be performed remotely including, but not limited to, telemetry, error reporting, tracking, chat, etc.”, 0028; “.. southbridge controller 208 may be configured to allow data to be exchanged between EC 213 (or BIOS/UEFI 212) and another IHS attached to network 101 (e.g., a remote server or other source of technical service) using wired or wireless capabilities of network interface adapter (NIC) 216.”, 0037; “ firmware 300 configured to implement EC 213 and/or BIOS/UEFI 212. Particularly, firmware 300 may include one or more diagnostics routines, as well as a network stack. Firmware 300 also includes NVM mailbox 301 configured to store program instructions that, upon execution, provide and/or receive one or more service and support parameters or information 302 to or from control logic 303 of CPU(s) 201 or a remote device (e.g., backend service 105) over network 101 in order to implement one or more service and support applications, 0043; ( i.e. instantiating a service OS that operates out of band from the host operating system by the Embedded Controller(EC).)]
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Pyers with Teshome . Teshome’s teaching of identifying a potential fault based upon the accumulated telemetry data, that the IHS has been subject to a given type of environmental or stress condition when the IHS is not able to boot to an operating system(OS) will substantially enhance Pyer’s system to provide proactive recovery or remedial action by invoking pre-boot or pre-OS capabilities by a service OS[0023].
Regarding claim 10, Pyers discloses wherein the P3O setting includes a processor performance setting [0044; 0100;0107] .
Claims 2-9, 12-20 are rejected under 35 U.S.C. 103 as being unpatentable over Pyers in view of Teshome as applied to claim 1, 11, further in view of Suryanarayana et.al. (U.S Patent Application Publication 2020/0012501; hereinafter “Suryanarayana”; (Reference cited as prior art in previous office action)
Regarding Claims 2, 12, Pyers discloses the limitations as outlined in claims 1, 11.
However, Pyers, Teshome does not expressly disclose , wherein the processor is further configured to instantiate a P3O optimization service.
In the same field of endeavor (e.g. providing secure shared memory access (SMA) to operating system (OS) applications at OS runtime), Suryanarayana teaches ,
wherein the processor is further configured to instantiate a P3O optimization service [ “ When IHS 100 is powered on or rebooted, program instructions within boot firmware 162 may be executed by host processing device(s) 102 to configure hardware components of the IHS, perform a Power-On Self-Test (POST) to ensure the hardware configuration is valid and working properly, discover and initialize devices (including PCI and PCIe devices) and launch a bootloader to boot OS 152…”, 0035; 0037; “During the pre-boot phase of boot firmware 162, ACPI firmware 164 communicates available hardware components and their functions to OS 152 using methods provided by boot firmware 162 (UEFI or BIOS). More specifically, ACPI firmware 164 constructs all ACPI tables and populates the interfaces and handlers to be used during OS runtime. To construct the ACPI tables, ACPI firmware 164 uses boot services 166 of boot firmware 162 to capture all hardware units and associated power components. The APCI tables are used during OS runtime to provide ACPI runtime services 165 to OS 152. The ACPI runtime services 165 typically include advanced power management functions for the OS, and the ACPI tables include hooks to all handlers where the runtime services are called. As set forth in more detail below, ACPI firmware 164 may include additional runtime services, which may be executable to perform various steps of the methods disclosed herein. For example, and as described in more detail below, ACPI runtime services 165 may be called to establish a channel between BMC 170 and one or more OS applications 156 to establish secure, shared memory access (SMA) to shared memory regions within the BMC”, 0038; ( i.e. instantiating ACPI runtime services by the host processor . ACPI runtime service corresponds to an optimization service)].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Pyers in view of Teshome with Suryanarayana . Suryanarayana’s teaching of discovering and configuring computer hardware components and storing within Advanced Configuration and Power Interface (ACPI) Runtime Secure SMA Access table in will substantially improve Pyers in view of Teshome’s system to provide a secured access to the shared memory by granting access to only specific memory locations that were granted by the ACPI runtime services .
Regarding claims 3, 13, Suryanarayana teaches , wherein the P3O optimization service is to determine an optimization profile for the P3O setting [ 0065; Fig.5;(i.e creating an optimization profile to access the shared memory settings)].
Regarding claims 4, 14, Suryanarayana teaches wherein the processor is further to communicate the optimization profile to the baseboard management controller.[ 0052-0054; Fig.5]
Regarding claims 5, 15, Pyers discloses, wherein the processor and the baseboard management controller manage the P3O setting [0112-0113,0094,0126].
Suryanarayana teaches the optimization profile[ 0065; Fig.5].
Regarding claims 6, 16, Pyers discloses an environmental condition of the information handling system[0040, 0044] .
Suryanarayana teaches the optimization profile[ 0065; Fig.5]
Regarding claims 7, 17, Pyers discloses wherein the environmental condition includes at least one of a power source for the information handling system, a device operating temperature, an ambient noise level, and an ambient brightness[0044-0045] .
Regarding claims 8, 18 Pyers discloses on an operating condition of the information handling system[0052;0069].
Suryanarayana teaches the optimization profile[ 0065; Fig.5]
Regarding claims 9, 19 Pyers discloses wherein the operating condition includes at least one of a low-power mode, a high-performance mode, a battery-longevity mode, a low-acoustics mode, and a cool mode [ 0044-0045; 0052].
Regarding claim 20, Pyers discloses an information handling system, comprising:
a hardware peripheral device to provide peripheral power, performance, and optimization (P3O) setting [ “ the shared memory 32 may be some or all random access memory accessible by the CPU 1. In such an embodiment, a communication channel between the CPU 1 and the auxiliary processor 20 (e.g., the SouthBridge 4 via a USB connection as shown in FIG. 1A) may be used by the CPU 1 to inform the auxiliary processor 20 of system data and application data memory addresses before control is passed to the auxiliary processor 20 (and vice versa when returning processing to the CPU 1)..the shared memory 32 may be a separate memory module, such as a separate memory chip on the computing device motherboard accessible by the auxiliary processor via an optional connection 12b, or a portion of memory within the modem 2. …”, 0059; “ save into shared memory information regarding the state of the computer's peripherals, operating system, power management, and similar operational conditions, step 348. 0094; 0116; 0119; ( i.e. The Shared memory corresponds to a peripheral device providing various data/ information related to the operational state of the device and peripherals for an efficient transition from CPU to auxiliary processor or vice versa); “… access the shared memory to obtain peripheral state information regarding the peripherals, operating system state, power management condition and other computer peripherals, step 382. The modem processor may use this peripheral state information to prepare to take over control of at least some of peripherals in a manner consistent with that of the current operating condition..”, 0126; “the computer's CPU may cache system state information, overall system data, current application data and application context data in shared memory, step 318… Cached system information may include data associated with the current display, state information regarding current processes, state information regarding the current power management condition, identification of the applications currently operating, and application data associated with the operating condition”, 0100; “..operating state information..”, 0113; “..” save into shared memory information regarding the state of the computer's peripherals, operating system, power management, and similar operational conditions, step 348. 0094;”.. status and configuration information regarding the computer peripherals, operating system condition, power states, open application..”, 0128-0129; (i.e. providing performance data related to operating condition/ status of the peripherals power states and power management conditions of the peripherals . The power management conditions corresponds to the optimized settings of the peripherals and other components for an efficient transition from active to low power mode or vice versa. Hence providing a peripheral power, performance, and optimization (P3O) setting)];
a hardware processor to instantiate a host operating system to manage the P3O setting when the processor is in a powered state[ 0003; 0045;0097;0107;0094;0119]; and
a baseboard management controller[“auxiliary processor 20” Fig.2 ], and the baseboard management controller is to manage the P3O setting when the processor is in an unpowered state[0062;0112 0107;0123;0126].
However, Pyers does not expressly disclose , instantiate a service operating system that operates out of band from the host operating system, a processor configured to generate an optimization profile for the P3O setting, wherein the processor is further to provide the optimization profile to the baseboard management controller.
In the same field of endeavor (e.g. proactively providing an optimized service by identifying failure of the IHS to load the main or primary OS based upon the accumulated telemetry data, that the IHS has been subject to a given type of environmental or stress condition), Teshome teaches ,
instantiate a service operating system that operates out of band from the host operating system [0017; “The term “service OS,” as used herein, refers to one or more program instructions or scripts distinct from an IHS's “main OS” or “primary OS” such that, upon execution by an IHS (e.g., upon failure by the IHS to load the main or primary OS), enable one or more support, diagnostics, or remediation operations to be performed independently of the state of the main or primary OS. ..the SOS may be stored in a remote location so as to allow an IHS to boot remotely “from the cloud.” 0021;” service capabilities may be invoked either “pre-boot” or “pre-OS.” Pre-boot capabilities may be built into the EC and/or BIOS/UEFI, and pre-OS capabilities may be provided by a service OS. ..pre-OS services may include enabling a service OS to provide customer automated assistance, using built-in remediation scripts to help diagnose and remediate the device, improve support efficiency using live chat, remote control support, etc.”, 0023 ; “..backend service 105 may be configured to communicate with a service OS prior to and/or independently of IHS 102 being able to boot a main OS, and it may enable one or more support, diagnostics, or remediation operations to be performed remotely including, but not limited to, telemetry, error reporting, tracking, chat, etc.”, 0028; “.. southbridge controller 208 may be configured to allow data to be exchanged between EC 213 (or BIOS/UEFI 212) and another IHS attached to network 101 (e.g., a remote server or other source of technical service) using wired or wireless capabilities of network interface adapter (NIC) 216.”, 0037; “ firmware 300 configured to implement EC 213 and/or BIOS/UEFI 212. Particularly, firmware 300 may include one or more diagnostics routines, as well as a network stack. Firmware 300 also includes NVM mailbox 301 configured to store program instructions that, upon execution, provide and/or receive one or more service and support parameters or information 302 to or from control logic 303 of CPU(s) 201 or a remote device (e.g., backend service 105) over network 101 in order to implement one or more service and support applications, 0043; ( i.e. instantiating a service OS that operates out of band from the host operating system by the Embedded Controller(EC).)]
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Pyers with Teshome . Teshome’s teaching of identifying a potential fault based upon the accumulated telemetry data, that the IHS has been subject to a given type of environmental or stress condition when the IHS is not able to boot to an operating system(OS) will substantially enhance Pyer’s system to provide proactive recovery or remedial action by invoking pre-boot or pre-OS capabilities by a service OS[0023].
However Pyers, Teshome does not expressly disclose, a processor configured to generate an optimization profile for the P3O setting, wherein the processor is further to provide the optimization profile to the baseboard management controller.
In the same field of endeavor (e.g. providing secure shared memory access (SMA) to operating system (OS) applications at OS runtime), Suryanarayana teaches ,
a processor configured to generate an optimization profile for the P3O setting[0035; 0037-0038, 0065; Fig.5;(i.e creating an optimization profile to access the shared memory settings)].
wherein the processor is further to provide the optimization profile to the baseboard management controller [ 0052-0054; Fig.5].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Pyers in view of Teshome with Suryanarayana . Suryanarayana’s teaching of discovering and configuring computer hardware components and storing within Advanced Configuration and Power Interface (ACPI) Runtime Secure SMA Access table in will substantially improve Pyers in view of Teshome’s system to provide a secured access to the shared memory by granting access to only specific memory locations that were granted by the ACPI runtime services .
Response to Arguments
Applicant’s arguments with respect to claim(s) 1, 11, 20 have been considered but are moot because the arguments do not apply Pyers in view of Teshome (Claims 1, 11), Pyers in view of Teshome in view of Suryanarayana ( Claim 20) references being used in the current rejection.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Garcia et. al., U.S Patent Application Publication 2017/0201419, teaches managed server system includes a managed server, a baseband management controller (BMC), and a shared memory. An example configuration process includes transmitting, by the BMC, a network-address request over an out-of-band network and accessing, by the managed server, the shared memory to read the stored configuration information; and configuring the managed server using the stored configuration information.
Raghuram et. al., U.S Patent Application Publication 2017/0177873, teaches security in cloudlet environments. A computing device (e.g., a cloudlet) may include: a trusted execution environment; a Basic Input/Output System (BIOS) to request a Key Encryption Key (KEK) from the trusted execution environment; and a Self-Encrypting Storage (SES) associated with the KEK; wherein the trusted execution environment is to verify the BIOS and provide the KEK to the BIOS subsequent to verification of the BIOS, and the BIOS is to provide the KEK to the SES to unlock the SES for access by the trusted execution environment.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to GAYATHRI SAMPATH whose telephone number is (571)272-5489. The examiner can normally be reached on Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jaweed Abbaszadeh can be reached on 5712701640. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/GAYATHRI SAMPATH/ Examiner, Art Unit 2176
/JAWEED A ABBASZADEH/ Supervisory Patent Examiner, Art Unit 2176