DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
1. Claims 1-20 are pending.
Response to Arguments
2. Applicant’s arguments with respect to amended claim(s) 1, 11, and 17 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
3. Claim(s) 1-2, 4-5, 7, 10-12, 14-15 and 17-18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kutch et al, WO 2021/225637 (as cited in the IDS dated 07/09/2025) hereafter Kutch in view of Ghanwani et al, US 2024/0250912 hereafter Ghanwani.
As for claim 1, Kutch discloses:
A method of processing data packets at a compute infrastructure, the method comprising:
allocating, by an application running on the compute infrastructure, a region of a memory for a network interface controller to write or read inbound or outbound data packets; (Kutch, fig. 10, page 19, Iines 26-31, An application can execute on one or multiple cores or processors and the application can allocate a block of memory that is subject to cache line demotion. Page 55 lines 31-32, The NIC can use the SGLs or data pointers to identify packet portions in memory.)
receiving a data packet at the network interface controller; (Kutch, page 20, Iines 12-26, a network interface (NIC) 1050 to transmit or receive packets using a network medium.)
directly writing the data packet to the region of the memory; (Kutch, fig. 11 page 22, Iines 9-19, A NIC 1050 copies received packets to system memory 1004. The NIC 1050 can perform a DMA or RDMA operation to copy the received packet (or portion thereof) to system memory 1004. Page 55 lines 31-32, The NIC can use the SGLs or data pointers to identify packet portions in memory. Also page 21 claims 23-29)
reserving a section of the region of the memory adjacent to the data packet, as headroom such that a memory address occupied by the data packet is adjacent to a memory address occupied by the headroom (Kutch, page 28 Iines 8-11, reserving headroom within buffers used for packets, particularly in the context of DPDK buffers. The DPDK allows reserving the first 128B of each buffer for metadata, and another 128B for headroom. Also page 21 claims 23-29)
processing, by the application, the data packet at the region of the memory by adding data to the data packet, wherein adding the data to the data packet causes the data packet to use at least a portion of the headroom. (Kutch, page 28 Iines 8-11, reserving headroom within buffers used for packets, particularly in the context of DPDK buffers. The DPDK allows reserving the first 128B of each buffer for metadata, and another 128B for headroom or other uses)
Kutch does not explicitly disclose processing, by the application, the data packet at the region of the memory by adding data to the data packet without moving or copying the data packet to another address within the memory, wherein adding the data to the data packet causes the data packet to use at least a portion of the headroom.
However, Ghanwani discloses processing, by the application, the data packet at the region of the memory by adding data to the data packet without moving or copying the data packet to another address within the memory, wherein adding the data to the data packet causes the data packet to use at least a portion of the headroom. (Ghanwani, FIG. 7A - Fig. 7D, [0058]-[0061], Processing by filling/adding to the data additional data 702 in the buffer/memory 606, without moving or copying, wherein filling/adding data causes the data to use a portion of the headroom 606b)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Kutch with processing, by the application, the data packet at the region of the memory by adding data to the data packet without moving or copying the data packet to another address within the memory, wherein adding the data to the data packet causes the data packet to use at least a portion of the headroom as taught by Ghanwani to ensure that the buffer capacity is not exceeded and data from received data packets are dropped or otherwise discarded (Ghanwani, [0062]) and/or to provide efficient use of the cells in the buffer to store data received in data packets (Ghanwani, [0063]).
As for claims 2, 12 and 18, Kutch discloses:
in response to allocating the region of the memory, instructing, by the application, the network interface controller to read or write the outbound or inbound data packets from/to the region of the memory (Kutch, fig. 11 page 22, Iines 9-19, A NIC 1050 copies received packets to system memory 1004. The NIC 1050 can perform a DMA or RDMA operation to copy the received packet (or portion thereof) to system memory 1004. Page 55 lines 31-32, The NIC can use the SGLs or data pointers to identify packet portions in memory. Also page 21 claims 23-29)
As for claims 4, 14 and 20, Kutch discloses in response to writing the data packet to the region of the memory, sending, by the network interface controller, an event to the application indicating that the data packet has been written to the region of the memory. (Kutch, fig. 24 and fig. 30 page 44 Iines 23-29, The header buffer 2414 identified by the Rx descriptor can be memory within NEXT 2410 or system memory. NEXT 2410 can be notified of this descriptor update by NIC 2402 and process the packet header information. After processing the packet header, NEXT 2410 can DMA the processed or modified packet header into a buffer accessible to the VNF and update the corresponding descriptor within the VNF to indicate that it has a packet to process.)
As for claims 5 and 15, Kutch discloses wherein the event further indicates the memory address occupied by the data packet. (Kutch, fig. 24 and fig. 30 page 44 Iines 23-29, The header buffer 2414 identified by the Rx descriptor can be memory within NEXT 2410 or system memory. NEXT 2410 can be notified of this descriptor update by NIC 2402 and process the packet header information. After processing the packet header, NEXT 2410 can DMA the processed or modified packet header into a buffer accessible to the VNF and update the corresponding descriptor within the VNF to indicate that it has a packet to process.)
As for claim 7, Kutch discloses the application includes one or more virtual network functions (VNF) running on the compute infrastructure. (Kutch, page 18, lines 18-21, A virtual network function (VNF) can include a service chain or sequence of virtualized tasks executed on generic configurable hardware such as firewalls, domain name system (DNS), caching or network address translation (NAT) and can run in VEEs. VNFs can be linked together as a service chain.)
As for claim 10, Kutch discloses the data packet is received over a terrestrial network. (Kutch, page 54 lines 23-26 An interconnect point between the mobile infrastructure and the Data Network (DN) which is a terrestrial network)
As for claim 11, Kutch discloses:
A non-transitory computer-readable medium comprising instructions that, when executed by one or more processors (Kutch, page 75 lines 31-34 to page 76 lines 1-24, a non-transitory storage medium to store or maintain instructions that when executed by a processor/core), cause the one or more processors to perform operations for processing data packets at a compute infrastructure, the operations comprising:
allocating, by an application running on the compute infrastructure, a region of a memory for a network interface controller to write or read inbound or outbound data packets; (Kutch, fig. 10, page 19, Iines 26-31, An application can execute on one or multiple cores or processors and the application can allocate a block of memory that is subject to cache line demotion. Page 55 lines 31-32, The NIC can use the SGLs or data pointers to identify packet portions in memory.)
receiving a data packet at the network interface controller; (Kutch, page 20, Iines 12-26, a network interface (NIC) 1050 to transmit or receive packets using a network medium.)
directly writing the data packet to the region of the memory; (Kutch, fig. 11 page 22, Iines 9-19, A NIC 1050 copies received packets to system memory 1004. The NIC 1050 can perform a DMA or RDMA operation to copy the received packet (or portion thereof) to system memory 1004. Page 55 lines 31-32, The NIC can use the SGLs or data pointers to identify packet portions in memory. Also page 21 claims 23-29)
reserving a section of the region of the memory adjacent to the data packet, as headroom such that a memory address occupied by the data packet is adjacent to a memory address occupied by the headroom (Kutch, page 28 Iines 8-11, reserving headroom within buffers used for packets, particularly in the context of DPDK buffers. The DPDK allows reserving the first 128B of each buffer for metadata, and another 128B for headroom. Also page 21 claims 23-29)
processing, by the application, the data packet at the region of the memory by adding data to the data packet, wherein adding the data to the data packet causes the data packet to use at least a portion of the headroom. (Kutch, page 28 Iines 8-11, reserving headroom within buffers used for packets, particularly in the context of DPDK buffers. The DPDK allows reserving the first 128B of each buffer for metadata, and another 128B for headroom or other uses)
Kutch does not explicitly disclose processing, by the application, the data packet at the region of the memory by adding data to the data packet without moving or copying the data packet to another address within the memory, wherein adding the data to the data packet causes the data packet to use at least a portion of the headroom.
However, Ghanwani discloses processing, by the application, the data packet at the region of the memory by adding data to the data packet without moving or copying the data packet to another address within the memory, wherein adding the data to the data packet causes the data packet to use at least a portion of the headroom. (Ghanwani, FIG. 7A - Fig. 7D, [0058]-[0061], Processing by filling/adding to the data additional data 702 in the buffer/memory 606 without moving or copying, wherein filling/adding data causes the data to use a portion of the headroom 606b)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Kutch with processing, by the application, the data packet at the region of the memory by adding data to the data packet without moving or copying the data packet to another address within the memory, wherein adding the data to the data packet causes the data packet to use at least a portion of the headroom as taught by Ghanwani to ensure that the buffer capacity is not exceeded and data from received data packets are dropped or otherwise discarded (Ghanwani, [0062]) and/or to provide efficient use of the cells in the buffer to store data received in data packets (Ghanwani, [0063]).
As for claim 17, Kutch discloses:
A system comprising: one or more processors (Kutch, page 75 lines 31-34 to page 76 lines 1-24, a non-transitory storage medium to store or maintain instructions that when executed by a processor/core); and a non-transitory computer-readable medium comprising instructions that, when executed by the one or more processors, cause the one or more processors to perform operations for processing data packets at a compute infrastructure, the operations comprising:
allocating, by an application running on the compute infrastructure, a region of a memory for a network interface controller to write or read inbound or outbound data packets; (Kutch, fig. 10, page 19, Iines 26-31, An application can execute on one or multiple cores or processors and the application can allocate a block of memory that is subject to cache line demotion. Page 55 lines 31-32, The NIC can use the SGLs or data pointers to identify packet portions in memory.)
receiving a data packet at the network interface controller; (Kutch, page 20, Iines 12-26, a network interface (NIC) 1050 to transmit or receive packets using a network medium.)
directly writing the data packet to the region of the memory; (Kutch, fig. 11 page 22, Iines 9-19, A NIC 1050 copies received packets to system memory 1004. The NIC 1050 can perform a DMA or RDMA operation to copy the received packet (or portion thereof) to system memory 1004. Page 55 lines 31-32, The NIC can use the SGLs or data pointers to identify packet portions in memory. Also page 21 claims 23-29)
reserving a section of the region of the memory adjacent to the data packet, as headroom such that a memory address occupied by the data packet is adjacent to a memory address occupied by the headroom (Kutch, page 28 Iines 8-11, reserving headroom within buffers used for packets, particularly in the context of DPDK buffers. The DPDK allows reserving the first 128B of each buffer for metadata, and another 128B for headroom. Also page 21 claims 23-29)
processing, by the application, the data packet at the region of the memory by adding data to the data packet, wherein adding the data to the data packet causes the data packet to use at least a portion of the headroom. (Kutch, page 28 Iines 8-11, reserving headroom within buffers used for packets, particularly in the context of DPDK buffers. The DPDK allows reserving the first 128B of each buffer for metadata, and another 128B for headroom or other uses)
Kutch does not explicitly disclose processing, by the application, the data packet at the region of the memory by adding data to the data packet without moving or copying the data packet to another address within the memory, wherein adding the data to the data packet causes the data packet to use at least a portion of the headroom.
However, Ghanwani discloses processing, by the application, the data packet at the region of the memory by adding data to the data packet without moving or copying the data packet to another address within the memory, wherein adding the data to the data packet causes the data packet to use at least a portion of the headroom. (Ghanwani, FIG. 7A - Fig. 7D, [0058]-[0061], Processing by filling/adding to the data additional data 702 in the buffer/memory 606 without moving or copying, wherein filling/adding data causes the data to use a portion of the headroom 606b)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Kutch with processing, by the application, the data packet at the region of the memory by adding data to the data packet without moving or copying the data packet to another address within the memory, wherein adding the data to the data packet causes the data packet to use at least a portion of the headroom as taught by Ghanwani to ensure that the buffer capacity is not exceeded and data from received data packets are dropped or otherwise discarded (Ghanwani, [0062]) and/or to provide efficient use of the cells in the buffer to store data received in data packets (Ghanwani, [0063]).
4. Claim(s) 6, 8-9 and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kutch in view of Ghanwani, as applied to claims 1, 11 and 17 above) and further in view of Simoens et al, US 2021/0344415 hereafter Simoens.
As for claims 6 and 16, the combination of Kutch and Ghanwani does not explicitly disclose processing the data packet at the region of the memory further includes: encapsulating the data packet within a baseband frame for transmission via a satellite.
However, Simoens discloses processing the data packet at the region of the memory further includes: encapsulating the data packet within a baseband frame for transmission via a satellite. (Simoens, abstract, [0036], performing encapsulation arranged to receive said downlink baseband frames and to generate uplink baseband frames by segmenting said downlink baseband frames based on a second modulation and coding decodable by a satellite receiver device)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the combination of the teachings of Kutch and Ghanwani with processing the data packet at the region of the memory further includes: encapsulating the data packet within a baseband frame for transmission via a satellite as taught by Simoens to provide improved communication throughput. (Simoens, [0011])
As for claim 8, the combination of Kutch and Ghanwani does not explicitly disclose the compute infrastructure is part of a gateway of a satellite communication system.
However, Simoens discloses the compute infrastructure is part of a gateway of a satellite communication system (FIG. 1, [0003] A hub or gateway (1) communicates with a terminal (3) via at least one satellite (2).)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the combination of the teachings of Kutch and Ghanwani with the compute infrastructure is part of a gateway of a satellite communication system as taught by Simoens to provide improved communication throughput. (Simoens, [0011])
As for claim 9, the combination of Kutch and Ghanwani does not explicitly disclose the compute infrastructure is part of a terminal of a satellite communication system.
However, Simoens discloses the compute infrastructure is part of a terminal of a satellite communication system (Fig. 1, [0003] One-way and two-way communication services are considered. In two-way satellite communication services there is a link from a hub to a terminal, called the forward link, and a link from the terminal to the hub,)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the combination of the teachings of Kutch and Ghanwani with the compute infrastructure is part of a terminal of a satellite communication system as taught by Simoens to provide improved communication throughput. (Simoens, [0011])
Allowable Subject Matter
5. Claims 3, 13 and 19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
As for claims 3, 13 and 19, Kutch discloses receiving a second data packet at the network interface controller, wherein the data packet is a first data packet; directly writing the second data packet to the region of the memory; (Kutch, page 39 lines 3-7 For data received from the NIC, packet MMIO handler 2202 can manage packet writes to packet memory.)
reserving a second section of the region of the memory adjacent to the second data packet as second headroom such that a memory address occupied by the second data packet is adjacent to a memory address occupied by the second headroom; (Kutch, page 28, lines 6-11, An address of a packet in a buffer in memory can be stored in a Queue Element (QE), and any additional metadata, (including SGL information if the packet is stored using multiple buffers), can be provided with the packet data itself in a QE. For example, headroom at the start of each a buffer supplied to the NIC or NEXT 1610. For example, DPDK allows reserving the first 128B of each buffer for metadata, and another 128B for headroom) and
processing, by the application, the second data packet at the region of the memory by adding second data to the data packet, (Kutch, page 5 lines 21-26, A Network Interface Manager (NIM) can receive traffic from the NIC and manage queue descriptors and storage of buffer content in one or more memory devices before passing packets to the next stage of a packet processing pipeline. A mechanism by which ingress packets placed within NIM memory can be sent to the next stage.)
Kutch does not explicitly disclose wherein processing the first data packet and the second data packet includes encapsulating the first data packet and the second data packet within a baseband frame for transmission via a satellite.
Conclusion
6. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: US 2016/0344636 [0013] There is also provided, in accordance with an embodiment of the invention, a method for communication in a network element having multiple ports connected to a packet data network and a memory coupled to the ports. The method includes providing to each port a respective first, fixed headroom allocation in the memory to hold packets received from the network through the port, and providing in the memory a shared headroom buffer, which is available to be shared among a plurality of the ports.
7. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
8. Any inquiry concerning this communication or earlier communications from the examiner should be directed to JENEE HOLLAND whose telephone number is (571)270-7196. The examiner can normally be reached 8:30 AM - 5:00 PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, IAN MOORE can be reached at (571)272-3085. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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JENEE HOLLAND
Examiner
Art Unit 2469
/JENEE HOLLAND/Primary Examiner, Art Unit 2469
Prosecution Insights