DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103, which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-19 are rejected under 35 U.S.C. 103 as being unpatentable over US 20240113734 A1 (Drauwalla), in view of US 8868008 B2 (Tanaka) and in further view of US 20150002195 A1 (Englekirk).
Regarding Claims 1, 10 and 15:
A radio frequency (RF) switch circuit comprising: a first switch connected between a first port and an antenna port; a second switch connected between a second port and the antenna port; a third switch connected between the antenna port and ground; a fourth switch connected between the antenna port and the ground; and a switch control circuit configured to control the first switch, the second switch, and the third switch to be turned off using a first power source and the fourth switch to be turned on using a second power source different from the first power source in a low power mode (Drauwalla: Fig. 1, a RF antenna front end that comprises RF front end modules, e.g., 141/241, multiple RF switches 150/250, and antennas 160/260; each RF switch consists of multiple switch elements, e.g., Fig. 2A, SW1……SWk where each switch element is controlled by control signals that controls through stack (TS) and shunt stack (SS), where each switch element may be turned on or off due to various operation states/modes, e.g., transmitting, receiving, inactive and operational frequency bands in transmitting and receiving modes; in switch active state, TS is on and SS is off; in inactive mode, TS is off and SS is on as further illustrated in Fig. 2B; Fig. 4A illustrates a termination path through an impedance that may be 50 ohm or other impedance values per design requirements; Figs. 5A-G, illustrate control signal generators that include positive and negative bias generator; positive generator includes a positive charge pump, and negative generator includes a negative charge pump, which is further noted that 1st, 2nd switches maybe switches 150/250, and 3rd, 4th switches maybe SW-TR in Fig. 4A and Fig. 1 where each switch 150/250 has its respective SW-TR; Tanaka Figs.1-2, illustrate TX and RX pathes through RF switches; Fig.8, one TX path and two RX pathes; Figs. 9-10, two TXs and four RXs).
It would have been obvious for one of ordinary skill in the art before the effective filling date of the claimed invention was made to modify Drauwalla with RF switch configurations as further taught by Tanaka. The advantage of doing so is to provide a RF front configuration to enable multi-frequency access antenna system (Tanaka: Background).
Drauwalla does not teach explicitly on a charge pump configuration. However, Englekirk teaches (Englekirk: Fig. 2).
It would have been obvious for one of ordinary skill in the art before the effective filling date of the claimed invention was made to modify Drauwalla with a charge pump configuration as further taught by Englekirk. The advantage of doing so is to provide a charge pumps that avoid generating excessive noise, so as to reduce charge pump noise injection into source supplies, output supplies, and related circuits (Englekirk: Background).
Regarding Claims 2 and 11, Drauwalla as modified further teaches:
The RF switch circuit of claim 1, wherein the switch control circuit is configured to turn on the third switch and turn off the first switch, the second switch, and the fourth switch in an isolation mode (Drauwalla: Fig. 1, 4A, where 3rd switch maybe in a RX path and 4th switch may be in a TX path); .
Regarding Claim 3, Drauwalla as modified further teaches:
The RF switch circuit of claim 2, wherein the switch control circuit comprises: a first driver configured to select one of a first voltage and a second voltage generated from a first power source according to a first control signal and output the selected voltage to the first switch; a second driver configured to select one of the first voltage and the second voltage according to the first control signal and output the selected voltage to the second switch; a third driver configured to select one of the first voltage and the second voltage according to the first control signal and output the selected voltage to the third switch; and a fourth driver configured to output one of a third voltage generated from a second power source different from the first power source and a fourth voltage generated from the first power source to the fourth switch according to a second control signal (Drauwalla: Figs. 5A-G, power sources are VDD, -VDD, Vpos, Vneg).
Regarding Claims 4 and 13, Drauwalla as modified further teaches:
The RF switch circuit of claim 3, wherein the second control signal includes the first voltage, and the first voltage is set to 0V in the low power mode (Drauwalla: e.g., Fig. 2B, off control voltage is 0V).
Regarding Claim 5, Drauwalla as modified further teaches:
The RF switch circuit of claim 3, wherein the switch control circuit further comprises: a low dropout (LDO) circuit configured to generate the first voltage from the first power source; and a charge pump circuit configured to generate the second voltage lower than the first voltage from the first voltage (Englekirk: Fig. 2).
Regarding Claims 6 and 14, Drauwalla as modified further teaches:
The RF switch circuit of claim 3, wherein the third voltage is lower than the first voltage, and the second power source is a continuous power source (Drauwalla: Figs. 5A-G, power sources are VDD, -VDD, Vpos, Vneg).
Regarding Claim 7, Drauwalla as modified further teaches:
The RF switch circuit of claim 3, wherein the fourth driver comprises: a first transistor configured to provide the third voltage as a turn-on voltage to the fourth switch through an output terminal, wherein the first transistor has a control terminal that receives the second control signal; and a second transistor configured to provide the fourth voltage as a turn-off voltage to the fourth switch through the output terminal, wherein the second transistor has a control terminal connected to ground (Drauwalla: e.g., Fig. 1, each transistor has resistor on its gate, and each transistor may or may not have the same values, where control signals for switches can be VDD, Vpos, 0, Vneg and -VDD as illustrated in Figs. 1-5; the switch may use regular transistor or intrinsic transistors (different threshold voltage), and SS path may be N-type or P-type too).
Regarding Claim 8, Drauwalla as modified further teaches:
The RF switch circuit of claim 7, wherein the fourth driver further comprises: a third transistor connected between the first transistor and the output terminal, wherein the third transistor has a control terminal connected to ground, and is configured to be turned on when the first transistor is turned on; and a fourth transistor connected between the second transistor and the output terminal, wherein the fourth transistor has a control terminal connected to ground, and is configured to be turned on when the second transistor is turned on (Drauwalla: e.g., Fig. 1, each transistor has resistor on its gate, and each transistor may or may not have the same values, where control signals for switches can be VDD, Vpos, 0, Vneg and -VDD as illustrated in Figs. 1-5; the switch may use regular transistor or intrinsic transistors (different threshold voltage), and SS path may be N-type or P-type too).
Regarding Claims 9 and 17, Drauwalla as modified further teaches:
The RF switch circuit of claim 1, wherein the switch control circuit is configured to turn on the first switch and turn off the second switch, the third switch and the fourth switch in a reception mode, and turn on the second switch and turn off the first switch, the third switch, and the fourth switch in a transmission mode (Drauwalla: Fig. 4A illustrates a termination path through an impedance that may be 50 ohm or other impedance values per design requirements; Figs. 5A-G, illustrate control signal generators that include positive and negative bias generator; positive generator includes a positive charge pump, and negative generator includes a negative charge pump, which is further noted that 1st, 2nd switches maybe switches 150/250, and 3rd, 4th switches maybe SW-TR in Fig. 4A and Fig. 1 where each switch 150/250 has its respective SW-TR; Tanaka Figs.1-2, illustrate TX and RX pathes through RF switches; Fig.8, one TX path and two RX pathes; Figs. 9-10, two TXs and four RXs).
Regarding Claim 12, Drauwalla as modified further teaches:
The method of claim 10, further comprising: turning on or off the first switch, the second switch, and the third switch, respectively by providing one of a first voltage and a second voltage generated from a first power source to the first switch, the second switch, and the third switch, respectively, according to a first control signal; and turning on or off the fourth switch by providing one of a third voltage generated from a second power source different from the first power source and a fourth voltage generated from the first power source according to a second control signal (Drauwalla: e.g., Fig. 1, each transistor has resistor on its gate, and each transistor may or may not have the same values, where control signals for switches can be VDD, Vpos, 0, Vneg and -VDD as illustrated in Figs. 1-5; the switch may use regular transistor or intrinsic transistors (different threshold voltage), and SS path may be N-type or P-type too).
Regarding Claim 16, Drauwalla as modified further teaches:
The RF switch circuit of claim 15, wherein the switch control circuit is configured to turn off the first switch, the second switch, and the fourth switch and turn on the third switch using the first power source in an isolation mode (Drauwalla: Fig. 4A illustrates a termination path through an impedance that may be 50 ohm or other impedance values per design requirements; Figs. 5A-G, illustrate control signal generators that include positive and negative bias generator; positive generator includes a positive charge pump, and negative generator includes a negative charge pump, which is further noted that 1st, 2nd switches maybe switches 150/250, and 3rd, 4th switches maybe SW-TR in Fig. 4A and Fig. 1 where each switch 150/250 has its respective SW-TR; control signals for switches can be VDD, Vpos, 0, Vneg and -VDD).
Regarding Claim 18, Drauwalla as modified further teaches:
The RF switch circuit of claim 15, wherein the switch control circuit is configured to turn on the second switch and turn off the first switch, the third switch, and the fourth switch using the first power source in a transmission mode (Drauwalla: Fig. 4A illustrates a termination path through an impedance that may be 50 ohm or other impedance values per design requirements; Figs. 5A-G, illustrate control signal generators that include positive and negative bias generator; positive generator includes a positive charge pump, and negative generator includes a negative charge pump, which is further noted that 1st, 2nd switches maybe switches 150/250, and 3rd, 4th switches maybe SW-TR in Fig. 4A and Fig. 1 where each switch 150/250 has its respective SW-TR; control signals for switches can be VDD, Vpos, 0, Vneg and -VDD).
Regarding Claim 19, Drauwalla as modified further teaches:
The RF switch circuit of claim 15, wherein the switch control circuit comprises: a first driver configured to select one of a first voltage and a second voltage generated from the first power source according to a first control signal and output the selected voltage to the first switch; a second driver configured to select one of the first voltage and the second voltage according to the first control signal and output the selected voltage to the second switch; a third driver configured to select one of the first voltage and the second voltage according to the first control signal and output the selected voltage to the third switch; and a fourth driver configured to output one of a third voltage generated from the second power source and a fourth voltage generated from the first power source to the fourth switch according to a second control signal (Drauwalla: Figs. 5A-G; Englekirk: Fig. 2)
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ZHITONG CHEN whose telephone number is (571) 270-1936. The examiner can normally be reached on M-F 9:30am - 5pm.
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/ZHITONG CHEN/
Primary Examiner, Art Unit 2649
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