DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
At least Claim 1 provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of copending Application No. 18/658,831 (reference application). Although the claims at issue are not identical, they are not patentably distinct from each other because each and every limitation of the current application can be found in the corresponding claim of the ‘831 reference application.
This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-6, 11-16 and 18-19 is/are rejected under 35 U.S.C. 102(b)(1) as being anticipated by U.S. Patent Application Publication 2004/0052443 to Heaton et al.
In regards to claims 1, 19 and 20, Heaton recites an electro-optical modulator/method (Figure 3) for a photonic integrated circuit, comprising: a substrate (2), monolithic for a PIC; a first waveguide (5a) on a first portion of the substrate; a second waveguide (5b) on a second portion of the substrate; a first electrode (11a) in contact with the first waveguide, the first waveguide between the first electrode and the first portion of the substrate; and a second electrode (11b) in contact with the second waveguide, the second waveguide between the second electrode and the second portion of the substrate.
In regards to claim 2, Heaton recites a first distance between the first electrode and the first portion of the substrate is substantially the same as a second distance between the second electrode and the second portion of the substrate, the first distance and the second distance each perpendicular a light propagation axis of the first waveguide. (Figure 3)
In regards to claim 3, Heaton recites a surface of the first waveguide in contact with the first electrode is substantially coplanar with a surface of the second waveguide in contact with the second electrode.
In regards to claim 4, Heaton recites at least one of: an electrical insulator, a fluid, a gas or air between the first waveguide and the second waveguide. [0011]
In regards to claims 5 and 6, although Heaton does not expressly recite each waveguide to comprise at least a combination of n-type, p-type and intrinsic properties, by definition, electro-optic modulators are semiconductor devices that modulate/alter the light passing through it. The electro-optic modulator operates through a PIN structure, the current flow changes the refractive index which therefore modulates the signal. Therefore, although not expressly stated, it is well known for the electro-optic modulator to have at least one of the first waveguide or the second waveguide each comprises at least one of: I) a portion of n-type semiconductor in contact with the substrate, a portion of intrinsic semiconductor on the portion of n-type semiconductor, a portion of a first p-type semiconductor on the portion of intrinsic semiconductor, and a portion of a second p-type semiconductor on the portion of the first p-type semiconductor and in contact with the first electrode; II) a portion of a first n-type semiconductor in contact with the substrate, a portion of intrinsic semiconductor on the portion of first n-type semiconductor, a portion of the first n-type semiconductor or of a second n-type semiconductor on the portion of intrinsic semiconductor, and a portion of p-type semiconductor on the portion of the first n-type semiconductor or of a second n-type semiconductor and in contact with the first electrode; or III) a portion of n-type semiconductor in contact with the substrate, and a portion of a p-type semiconductor on the portion of n-type semiconductor and in contact with the first electrode,
the substrate comprising: a semi-insulator layer; and an n-type semiconductor layer on the semi-insulator layer.
In regards to claim 11, Heaton recites a dielectric material between the first electrode and the second electrode.
In regards to claims 12-16 and 18, Heaton recites a photonic integrated circuit/method comprising: an electro-optical modulator (Figure 3), comprising: a substrate (2); a first waveguide (5a) on a first portion of the substrate; a second waveguide (5b) on a second portion of the substrate; a first electrode (11a) in contact with the first waveguide, the first waveguide between the first electrode and the first portion of the substrate; and a second electrode (11b) in contact with the second waveguide, the second waveguide between the second electrode and the second portion of the substrate; and electrical circuitry (electric field applied via electrical circuitry) for controlling the electro-optical modulator, the electrical circuitry configured to at least one of: apply a potential difference (well known operation of an electro-optic modulator) between the substrate and at least one of the first electrode or the second electrode; or apply a first potential difference or a second potential difference between the first electrode and the second electrode, at least one of an optical source or a semiconductor laser; an optical splitter for splitting light from the optical source or the semiconductor laser and directing the light after splitting to the first waveguide and the second waveguide; and an optical combiner for combining light from the first waveguide and the second waveguide [0053], an electrical insulator between the first electrode and the at least one of the optical source or the semiconductor laser [0011] and the electrical circuitry connected to a controller configured to: apply the potential difference between the substrate and at least one of the first electrode or the second electrode, and switch between applying the first potential difference and applying the second potential difference between the first electrode and the second electrode (well known operation of an electro-optic modulator).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 7-10 and 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Application Publication 2004/0052443 to Heaton et al as applied to claims 1 and 12 above.
In regards to claims 7-9 and 17, although Heaton does not expressly recite the first waveguide is spaced from the second waveguide by between 1µm and 50µm, a length of at least one of the first waveguide and the second waveguide is between 0.5mm and 5mm along the light propagation axis of the first waveguide or the second waveguide respectively, the first waveguide is between 0.5µm and 5µm in width taken perpendicular the light propagation axis and perpendicular to a distance between the first electrode and the first portion of the substrate, and a difference in volts between the first potential difference and the second potential difference is such that light propagating through the first waveguide is shifted in phase from light propagating through the second waveguide by 180 degrees, it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges through routine experimentation of a result effective variable involves only routine skill in the art. Since it is not inventive to discover the optimum or workable ranges or values through routine experimentation when the general conditions of a claim are disclosed in the prior art and therefore discovering the optimum or workable ranges of a result effective variable involves only routine skill in the art, it would have been obvious at the time the invention was made to a person having ordinary skill in the art to have recite the first waveguide is spaced from the second waveguide by between 1µm and 50µm, a length of at least one of the first waveguide and the second waveguide is between 0.5mm and 5mm along the light propagation axis of the first waveguide or the second waveguide respectively, the first waveguide is between 0.5µm and 5µm in width taken perpendicular the light propagation axis and perpendicular to a distance between the first electrode and the first portion of the substrate, and a difference in volts between the first potential difference and the second potential difference is such that light propagating through the first waveguide is shifted in phase from light propagating through the second waveguide by 180 degrees in order to provide a more optimized system. In re Aller, 105 USPA 233; In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980)
In regards to claim 10, it would have been obvious before the effective filing date to a person having ordinary skill in the art to have provided at least one of: the first waveguide comprises InP; the second waveguide comprises InP; the first electrode comprises gold; or the second electrode comprises gold since providing waveguides having InP and electrodes having gold are commonly chosen elements in waveguides and electrodes for their improved conductivity properties and improved transmission properties.
References Cited
The references cited made of record and not relied upon is considered pertinent to applicant’s disclosure. None of the documents cited by the Examiner discloses or reasonably suggests the allowable subject matter discussed above.
The documents submitted by applicant in the Information Disclosure Statements have been considered and made of record. Note attached copy of forms PTO-1449. None of the references submitted by Applicant discloses or reasonably suggest the allowable subject matter discussed above.
Inventorship
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TINA M WONG whose telephone number is (571)272-2352. The examiner can normally be reached M-F 8:30-5:30.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Uyen-Chau Le can be reached at (571) 272-2397. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/TINA WONG/Primary Examiner, Art Unit 2874
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