Office Action Predictor
Last updated: April 16, 2026
Application No. 18/605,031

DIRECT CURRENT-TO-DIRECT CURRENT (DC-DC) CONVERTER WITH PROGRAMMABLE COMPENSATION

Non-Final OA §102§103
Filed
Mar 14, 2024
Examiner
JACKSON, LAKAISHA
Art Unit
2838
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Qorvo Us, INC.
OA Round
1 (Non-Final)
85%
Grant Probability
Favorable
1-2
OA Rounds
2y 4m
To Grant
96%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allow Rate
411 granted / 484 resolved
+16.9% vs TC avg
Moderate +11% lift
Without
With
+11.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
23 currently pending
Career history
507
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
46.7%
+6.7% vs TC avg
§102
34.4%
-5.6% vs TC avg
§112
12.5%
-27.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 484 resolved cases

Office Action

§102 §103
DETAILED ACTION The present application, filed 03/14/2024, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Drawings Figure 1 should be designated by a legend such as --Prior Art-- because only that which is old is illustrated. See MPEP § 608.02(g). Corrected drawings in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. The replacement sheet(s) should be labeled “Replacement Sheet” in the page header (as per 37 CFR 1.84(c)) so as not to obstruct any portion of the drawing figures. If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1, 2, 4, 13, and 18 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Sung (US 2020/0152121). Re claim 1, Sung teaches a power management circuit [100a, Fig 3] comprising: a direct current-to-direct current (DC-DC) converter [150] configured to be coupled to at least one external component [110]; a sensor [170] configured to measure a parameter associated with the DC-DC converter; an adjust circuit [144] coupled to the DC-DC converter and configured to provide an adjustment to the DC-DC converter that affects the parameter measured [generating B1-B3, ICS to control SW affecting the resistance of the amplifier]; and a control circuit [142] coupled to the sensor and the adjust circuit and configured to provide a signal to the adjust circuit that indicates how the adjust circuit should adjust the parameter measured [since signals ICS are generated based on signal SPL, it is considered that signal SPL indicates how the parameter should be adjusted]. Re claim 2, Sung teaches wherein the parameter measured is a process variation of the external component [paragraph 23]. Re claim 4, Sung teaches wherein the parameter measured is a voltage at an output of the DC-DC converter [ELVD, Fig 3]. Re claim 13, Sung teaches wherein the sensor is configured to measure a voltage [ELVDD]. Re claim 18, Sung teaches a mobile terminal [as applied to a mobile phone, paragraph 63] comprising: a power management circuit [100a, Fig 3] comprising: a direct current-to-direct current (DC-DC) converter [150] configured to be coupled to at least one external component [110]; a sensor [170] configured to measure a parameter associated with the DC-DC converter; an adjust circuit [144] coupled to the DC-DC converter and configured to provide an adjustment to the DC-DC converter that affects the parameter measured [generating B1-B3, ICS to control SW affecting the resistance of the amplifier]; and a control circuit [142] coupled to the sensor and the adjust circuit and configured to provide a signal to the adjust circuit that indicates how the adjust circuit should adjust the parameter measured [since signals ICS are generated based on signal SPL, it is considered that signal SPL indicates how the parameter should be adjusted]. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sung in view of Nedic et al. (“Nedic”, US 2022/0344963). Re claim 3, Sung teaches the limitations as applied to the claim above but does not teach wherein the parameter measured is a temperature. Nedic teaches a device [Fig 1] wherein the parameter measured is a temperature [paragraph 81]. It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to have modified the device of Sung to include the features of Nedic because it is used as a desired form of power regulation to protect systems from overheating, thus improving the utility of the device, which increases efficiency. Claims 5 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sung in view of Kumar et al. (“Kumar”, US 2021/0313876). Re claim 5, Sung teaches the limitations as applied to the claim above but does not teach wherein the adjust circuit comprises one or more digital to analog converters (DACs). Kumar teaches a device [Fig 3B] having an adjust circuit comprising one or more digital to analog converters (DACs) [358, paragraph 49]. It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to have modified the device of Sung to include the features of Kumar because it is known for its efficient bandwidth use and power efficiency, thus improving the speed of the device, which increases efficiency. Re claim 20, Sung teaches the limitations as applied to the claim above but does not teach wherein the adjust circuit comprises one or more digital to analog converters (DACs). Kumar teaches a device [Fig 3B] having an adjust circuit comprising one or more digital to analog converters (DACs) [358, paragraph 49]. It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to have modified the device of Sung to include the features of Kumar because it is known for its efficient bandwidth use and power efficiency, thus improving the speed of the device, which increases efficiency. Claim 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sung in view of Kumar and Daley et al. (“Daley”, US 2010/0237468). Re claim 6, Sung teaches the limitations as applied to the claim above but does not teach wherein the adjust circuit is configured to adjust an on-chip capacitance associated with the DC-DC converter to adjust the parameter measured. Daley teaches a device [Fig 1] wherein the adjust circuit is configured to adjust an on-chip capacitance associated with the DC-DC converter to adjust the parameter measured [paragraph 51]. It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to have modified the device of Sung to include the features of Daley because it is used as a desired form of power control to prevent circuit malfunction, thus improving the utility of the device, which increases efficiency. Claim 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sung in view of Kumar and Menkus et al. (“Menkus”, US 7,332,904). Re claim 7, Sung teaches the limitations as applied to the claim above but does not teach wherein the adjust circuit is configured to adjust an on-chip resistance associated with the DC-DC converter to adjust the parameter measured. Menkus teaches a device [Fig 1] wherein the adjust circuit is configured to adjust an on-chip resistance associated with the DC-DC converter to adjust the parameter measured [Col, 2, ln 50-55]. It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to have modified the device of Sung to include the features of Menkus because it is used as a desired form of power control to prevent circuit malfunction, thus improving the utility of the device, which increases efficiency. Claim 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sung in view of Kumar and Shimazaki et al. (“Shimazaki”, US 2005/0149894). Re claim 8, Sung teaches the limitations as applied to the claim above but does not teach wherein the adjust circuit is configured to adjust an on-chip inductance associated with the DC-DC converter to adjust the parameter measured. Shimazaki teaches a device [Fig 4] wherein the adjust circuit is configured to adjust an on-chip inductance associated with the DC-DC converter to adjust the parameter measured [paragraph 61]. It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to have modified the device of Sung to include the features of Shimazaki because it is used as a desired form of power control to prevent circuit malfunction, thus improving the utility of the device, which increases efficiency. Claim 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sung in view of Kobayashi (US 7,638,991). Re claim 9, Sung teaches the limitations as applied to the claim above but does not teach wherein the control circuit is configured to receive a target voltage from a baseband processor. Kobayashi teaches a device [Fig 5] wherein the control circuit is configured to receive a target voltage from a baseband processor [Col 4, ln 10-12]. It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to have modified the device of Sung to include the features of Kobayashi because it is used known for its efficient bandwidth use and power efficiency, thus improving the speed of the device, which increases efficiency. Claim 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sung in view of Hu et al. (“Hu”, WO 2019/137602). Re claim 10, Sung teaches the limitations as applied to the claim above but does not teach wherein the control circuit is configured to receive a frequency range from a baseband processor. Hu teaches a device [Fig 5] wherein the control circuit is configured to receive a frequency range from a baseband processor [page 14, lines 23-26]. It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to have modified the device of Sung to include the features of Hu because it is known for its efficient bandwidth use and power efficiency, thus improving the speed of the device, which increases efficiency. Claim 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sung in view of Liang (US 2022/0037997). Re claim 11, Sung teaches the limitations as applied to the claim above but does not teach a memory with a look-up table (LUT) coupled to the control circuit. Liang teaches a device [Fig 3] having a memory [203] with a look-up table (LUT) [201] coupled to the control circuit. It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to have modified the device of Sung to include the features of Liang because it is known for its efficient bandwidth use and power efficiency, thus improving the speed of the device, which increases efficiency. Claims 12 and 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sung in view of Duncan et al. (“Duncan”, US 2023/0089910). Re claim 12, Sung teaches the limitations as applied to the claim above but does not teach wherein the sensor is configured to measure a current. Duncan teaches a device [Fig 3] wherein the sensor is configured to measure a current [paragraph 99]. It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to have modified the device of Sung to include the features of Duncan because it is used as a desired form of power control to optimize regulation, thus improving the utility of the device, which increases efficiency. Re claim 19, Sung teaches the limitations as applied to the claim above but does not teach a power amplifier coupled to an output of the power management circuit. Duncan teaches a power amplifier [128] coupled to an output of the power management circuit [paragraph 30]. It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to have modified the device of Sung to include the features of Duncan because it is used to promote system flexibility, thus improving the utility of the device, which increases efficiency. Claims 14-16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sung in view of Liu et al. (“Liu”, US 6,984,969). Re claim 14, Sung teaches the limitations as applied to the claim above but does not teach a stabilizer filter coupled to the DC-DC converter and the adjust circuit. Liu teaches a device [Fig 2] having a stabilizer filter [L1] coupled to the DC-DC converter and the adjust circuit [Col 4, ln 54-58]. It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to have modified the device of Sung to include the features of Liu because it is used prevent unwanted frequencies within the circuit, thus improving the utility of the device, which increases efficiency. Re claim 15, Sung teaches the limitations as applied to the claim above but does not teach a voltage feedback loop coupling an output of the DC-DC converter to the stabilizer filter. Liu teaches a voltage feedback loop coupling an output of the DC-DC converter to the stabilizer filter [Fig 2, Vout is regulated via 10, 12]. It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to have modified the device of Sung to include the features of Liu because it is used as a desired form of power control for effective regulation, thus improving the utility of the device, which increases efficiency. Re claim 16, Sung teaches the limitations as applied to the claim above but does not teach a current feedback loop coupling an output of the DC-DC converter to the stabilizer filter. Liu teaches a current feedback loop coupling an output of the DC-DC converter to the stabilizer filter [Fig 2, Iot and Iosw is regulated via 14, 18]. It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to have modified the device of Sung to include the features of Liu because it is used as a desired form of power control for effective regulation, thus improving the utility of the device, which increases efficiency. Claim 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sung in view of Liang and Liu. Re claim 17, Sung teaches a method [100a, Fig 3] of controlling a direct current to direct current (DC-DC) converter [150], comprising: measuring an operating parameter [using 170] associated with the DC-DC converter; but does not teach comparing the measured operating parameter to an adjustment in a look-up table; and causing an adjust circuit to modify an on-chip element of a stabilizer filter associated with the DC-DC converter to compensate for instabilities in the DC-DC converter. Liang teaches a device [Fig 3] having a memory [203] with a look-up table (LUT) [201] coupled to the control circuit. It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to have modified the device of Sung to include the features of Liang because it is known for its efficient bandwidth use and power efficiency, thus improving the speed of the device, which increases efficiency. Liu teaches a device [Fig 2] having a stabilizer filter [L1] coupled to the DC-DC converter and the adjust circuit [Col 4, ln 54-58]. It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to have modified the device of Sung to include the features of Liu because it is used prevent unwanted frequencies within the circuit, thus improving the utility of the device, which increases efficiency. Conclusion Examiner's Note: Examiner has cited particular columns and line numbers in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner. In the case of amending the claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention. Any inquiry concerning this communication or earlier communications from the examiner should be directed to LAKAISHA JACKSON whose telephone number is (571)270-3111. The examiner can normally be reached on M-F 8:00-5:00. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, MONICA LEWIS can be reached on 571-272-1838. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /LaKaisha Jackson/ Examiner, Art Unit 2838
Read full office action

Prosecution Timeline

Mar 14, 2024
Application Filed
Dec 27, 2025
Non-Final Rejection — §102, §103
Apr 01, 2026
Response Filed

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
85%
Grant Probability
96%
With Interview (+11.3%)
2y 4m
Median Time to Grant
Low
PTA Risk
Based on 484 resolved cases by this examiner. Grant probability derived from career allow rate.

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