Prosecution Insights
Last updated: July 17, 2026
Application No. 18/605,138

COMBINATION OPTIMIZATION CALCULATION METHOD AND COMBINATION OPTIMIZATION CALCULATION SYSTEM

Non-Final OA §101§112
Filed
Mar 14, 2024
Priority
Sep 15, 2021 — JP 2021-150621 +1 more
Examiner
LEE, MICHAEL CHRISTOPHER
Art Unit
Tech Center
Assignee
Panasonic Holdings Corporation
OA Round
1 (Non-Final)
62%
Grant Probability
Moderate
1-2
OA Rounds
11m
Est. Remaining
88%
With Interview

Examiner Intelligence

Grants 62% of resolved cases
62%
Career Allowance Rate
93 granted / 149 resolved
+2.4% vs TC avg
Strong +26% interview lift
Without
With
+25.8%
Interview Lift
resolved cases with interview
Typical timeline
3y 3m
Avg Prosecution
47 currently pending
Career history
197
Total Applications
across all art units

Statute-Specific Performance

§101
18.5%
-21.5% vs TC avg
§103
76.3%
+36.3% vs TC avg
§102
0.7%
-39.3% vs TC avg
§112
4.2%
-35.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 149 resolved cases

Office Action

§101 §112
DETAILED ACTION Notice of AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Regarding Japanese Patent App. No. JP2021-150621 (filed 9/15/2021), receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Regarding PCT Application No. PCT/JP2022/028543 (filed 7/22/2022), Applicant’s claim for the benefit of a prior-filed application under 35 U.S.C. 120, 121, 365(c), or 386(c) is acknowledged. Information Disclosure Statement The information disclosure statement submitted on 6/14/2024 has been considered. Drawings Figure 1 should be designated by a legend such as --Prior Art-- because only that which is old is illustrated. See MPEP § 608.02(g). Paras. 0003-0004 explain that NPL2 (see para. 0005) describes the FALQON algorithm, and paras. 0011 and 0023 explain that Fig. 1 shows a circuit block diagram for the prior-art FALQON algorithm. Corrected drawings in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. The replacement sheet(s) should be labeled “Replacement Sheet” in the page header (as per 37 CFR 1.84(c)) so as not to obstruct any portion of the drawing figures. If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Objections Claim 4 is objected to because of the following informalities: In claim 4, line 2, “Formular 1” should read “Formula[[r]] 1” In claim 4, line 4, “N is the number of quantum bits” should read “N is a number of quantum bits” Appropriate correction is required. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. Claims 1-5 are rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor regards as the invention. Claim 1 recites “the classical computer that calculates a feedback amount based on an output of the quantum computer and newly adds, to the quantum computer, the quantum circuit having the calculated feedback amount as the parameter.” This limitation is indefinite because it is unclear how the classical computer can “newly adds, to the quantum computer, the quantum circuit.” How does a classical computer provide a quantum circuit to a quantum computer when a classical computer lacks the quantum circuitry (e.g., quantum gates, qubit structures) to perform quantum calculations? MPEP 2173.01 I explains that “after applying the broadest reasonable interpretation consistent with the specification to the claim, if the metes and bounds of the claimed invention are not clear, the claim is indefinite and should be rejected. MPEP 2173.01 I further explains that “if the language of a claim, given its broadest reasonable interpretation, is such that a person of ordinary skill in the relevant art would read it with more than one reasonable interpretation, then a rejection under 35 U.S.C. 112(b) ... is appropriate.” Here, paras. 0034 and 0042 of the instant specification state that the “feedback amount calculation processor 31 adds” the quantum circuit to the “quantum circuit device.” However, the specification lacks any explanation about how the quantum circuit is added by a classical computer to a quantum computer, and one of ordinary skill would not understand how to do so when a classical computer lacks the components to create a quantum circuit. At best, one of ordinary skill would interpret this limitation to mean either: (1) adding a simulated representation of a quantum circuit to the quantum computer (although there is no disclosure of a simulated quantum circuit”, (2) having the classical computer configure the “quantum circuit” of the quantum computer based on the calculated “feedback amount”, or (3) providing the calculated “feedback amount” to the quantum computer. Therefore, because the metes and bounds of the claim are unclear, and because one of ordinary skill in the art could read the claim language with more than one interpretation, this limitation is indefinite under 35 U.S.C. 112(b). Claim 1 also recites “multiplying, in the classical computer, the feedback amount by a gain having a positive value such that a magnitude of the gain approaches zero as the quantum circuit is added.” This limitation is indefinite because it is unclear how the classical computer can perform such multiplication of a “feedback amount by a gain” “as the quantum circuit is added.” As explained above, it is unclear how the classical computer can add a “quantum circuit” to a “quantum computer.” Moreover, it is unclear if this limitation should be interpreted to mean (1) simultaneously the classical computer performs the multiplication step and adds the “quantum circuit” to the “quantum computer”, or (2) in view of para. 0058, if this should be interpreted as multiplying, in the classical computer, the feedback amount by a gain function, wherein the gain function is configured such that a magnitude of the gain approaches zero as the number of layers (or the number of quantum bits) in the quantum circuit increases”. Therefore, because the metes and bounds of the claim are unclear, and because one of ordinary skill in the art could read the claim language with more than one interpretation, this limitation is indefinite under 35 U.S.C. 112(b). Claims 2-4 depend from claim 1, do not remedy the deficiencies of claim 1, and are therefore rejected for the same reasons explained above with respect to claim 1. Claim 5 claims a system that corresponds to the method of claim 1, and is therefore rejected under 35 U.S.C. 112(b) for the same reasons explained with respect to claim 1. Claim Rejections - 35 USC § 101 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claims 1-5 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. Regarding Step 1 of the Alice/Mayo framework, Claims 1-4 are directed to a method (a process), and Claim 5 is directed to a system (a machine), which each fall within one of the four statutory categories of inventions. Regarding Claim 1 Step 2A, prong 1 (Is the claim directed to a law of nature, a natural phenomenon or an abstract idea). Claim 1 recites the following mental processes, that in each case under the broadest reasonable interpretation, covers performance of the limitation in the mind (including an observation, evaluation, judgment, opinion) or with the aid of pencil and paper but for the recitation of generic computer components (e.g., “classical computer”, “quantum computer”). A combination optimization calculation method for calculating combination optimization (under the broadest reasonable interpretation, a human such as a mathematician can mentally, or using pencil and paper, perform calculations for optimizing combinations) calculates a feedback amount based on an output of the quantum computer (under the broadest reasonable interpretation, a human such as a mathematician can mentally (or using pencil and paper) calculate a feedback amount using a feedback function, where an input to the feedback function is an output from the quantum computer that the human reads off a screen to utilize when performing the calculation) multiplying, ..., the feedback amount by a gain having a positive value such that a magnitude of the gain approaches zero... (under the broadest reasonable interpretation, a human such as a mathematician can mentally (or using pencil and paper) multiply a feedback amount by a gain function, where the gain function is configured so that the magnitude of the gain approaches zero in certain situations; the examiner notes that multiplication is also a mathematical concept) Step 2A, prong 2 (Does the claim recite additional elements that integrate the judicial exception into a practical application?). The judicial exception is not integrated into a practical application. In particular, the claim recites the additional elements (e.g., “classical computer”, “quantum computer”) which are recited at a high-level of generality such that they amount to no more than mere instructions to apply the exception using a generic computer component (See MPEP 2106.05(f)). Regarding the “using a quantum computer and a classical computer” limitation, such limitations are recited at a high-level of generality and amount to no more than adding the words “apply it” (or an equivalent) with the judicial exception. In particular, the claim only recites the additional elements of classical and quantum computers. These additional elements are recited at a high-level of generality and amount to no more than mere instructions to apply the exception using generic computer components (classical and quantum computers). Accordingly, these additional elements do not integrate the abstract idea into a practical application because they do not impose any meaningful limits on practicing the abstract idea (See MPEP 2106.05(f)). Regarding the “the quantum computer that executes quantum calculation by a quantum circuit having a parameter representing a phase rotation amount” limitation, such limitation is recited at a high-level of generality and amounts to no more than adding the words “apply it” (or an equivalent) with the judicial exception. In particular, the claim only recites the additional element of a quantum computer having a quantum circuit. This additional element is recited at a high-level of generality and amounts to no more than mere instructions to apply the exception using a generic computer component (a quantum computer having a quantum circuit). Accordingly, this additional element does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea (See MPEP 2106.05(f)). Regarding the “the classical computer that” limitation, such limitation is recited at a high-level of generality and amounts to no more than adding the words “apply it” (or an equivalent) with the judicial exception. In particular, the claim only recites the additional element of a classical computer. This additional element is recited at a high-level of generality and amounts to no more than mere instructions to apply the exception using a generic computer component (a classical computer). Accordingly, this additional element does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea (See MPEP 2106.05(f)). Regarding the “newly adds, to the quantum computer, the quantum circuit having the calculated feedback amount as the parameter” limitation, such additional element of a data transmitting step is recited at a high level of generality and amounts to extra-solution activity of transmitting data, i.e. post-solution activity of transmitting data from the claimed process (see MPEP 2106.05(g)). Regarding the “in the classical computer ... as the quantum circuit is added” limitation, such limitations are recited at a high-level of generality and amount to no more than adding the words “apply it” (or an equivalent) with the judicial exception. In particular, the claim only recites the additional elements of classical and quantum circuits. These additional elements are recited at a high-level of generality and amount to no more than mere instructions to apply the exception using generic computer components (classical and quantum circuits). Accordingly, these additional elements do not integrate the abstract idea into a practical application because they do not impose any meaningful limits on practicing the abstract idea (See MPEP 2106.05(f)). Accordingly, at Step 2A, prong two, after considering all claim elements individually and as an ordered combination, it is determined that the claims do not integrate the judicial exception into a practical application. Step 2B (Does the claim recite additional elements that amount to significantly more than the judicial exception?) In accordance with Step 2B, the claim does not include additional elements that are sufficient to amount to significantly more that the judicial exception. As discussed above, the additional elements (e.g., “classical computer”, “quantum computer”) are recited at a high-level of generality such that they amount to no more than mere instructions to apply the exception using a generic computer component (See MPEP 2106.05(f)). Regarding the “using a quantum computer and a classical computer” limitation, such limitation is recited at a high-level of generality and amounts to no more than adding the words “apply it” (or an equivalent) with the judicial exception, because the limitation merely provides instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea. Accordingly, this additional element does not add significantly more than the judicial exception. (See MPEP 2106.05(f)). Regarding the “the quantum computer that executes quantum calculation by a quantum circuit having a parameter representing a phase rotation amount” limitation, such limitation is recited at a high-level of generality and amounts to no more than adding the words “apply it” (or an equivalent) with the judicial exception, because the limitation merely provides instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea. Accordingly, this additional element does not add significantly more than the judicial exception. (See MPEP 2106.05(f)). Regarding the “the classical computer that” limitation, such limitation is recited at a high-level of generality and amounts to no more than adding the words “apply it” (or an equivalent) with the judicial exception, because the limitation merely provides instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea. Accordingly, this additional element does not add significantly more than the judicial exception. (See MPEP 2106.05(f)). Regarding the “newly adds, to the quantum computer, the quantum circuit having the calculated feedback amount as the parameter” limitation, as discussed above, the additional element of a data transmitting step is recited at a high level of generality and amounts to extra-solution activity of receiving data, i.e. post-solution activity of transmitting data from the claimed process. The courts have found limitations directed to transmitting information electronically, recited at a high level of generality, to be well-understood, routine, and conventional (see MPEP 2106.05(d)(II), “receiving or transmitting data over a network”, "electronic record keeping," and "storing and retrieving information in memory"). Regarding the “in the classical computer ... as the quantum circuit is added” limitation, such limitation is recited at a high-level of generality and amounts to no more than adding the words “apply it” (or an equivalent) with the judicial exception, because the limitation merely provides instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea. Accordingly, this additional element does not add significantly more than the judicial exception. (See MPEP 2106.05(f)). Accordingly, at Step 2B after considering all claim elements individually and as an ordered combination, it is determined that the claims do not integrate the judicial exception into a practical application. Regarding Claim 2 Step 2A, Prong 1 wherein the feedback amount is a feedback amount in feedback-based algorithm for quantum optimization (FALQON) algorithm. (under the broadest reasonable interpretation, a human can mentally (or using pencil and paper) calculate a feedback amount based on the recited FALQON algorithm using the mathematical equations explained in paras. 0014-0027 of the instant specification) Regarding Step 2A, Prong 2, the claim does not include any additional elements that integrate the judicial exception into a practical application and regarding Step 2B, there are no additional elements recited that amount to significantly more than the judicial exception. Regarding Claim 3 Step 2A, Prong 1 wherein a convergence condition for a weight of a quantum fluctuation term in a quantum annealing is used as a gain function for calculating the gain. (under the broadest reasonable interpretation, a human can mentally (or using pencil and paper) utilize a convergence condition, such as requiring a function that converges to zero over time, when utilizing a gain function for quantum annealing) Regarding Step 2A, Prong 2, the claim does not include any additional elements that integrate the judicial exception into a practical application and regarding Step 2B, there are no additional elements recited that amount to significantly more than the judicial exception. Regarding Claim 4 Step 2A, Prong 1 wherein the gain function is the following Formular 1, and PNG media_image1.png 131 558 media_image1.png Greyscale where t is a time variable, N is the number of quantum bits, a and c are constants, and δ is a fairly small amount satisfying δ << 1. (under the broadest reasonable interpretation, a human can mentally (or using pencil and paper) calculate gain using the equation set forth herein; this is also a mathematical equation, which is another type of abstract idea) Regarding Step 2A, Prong 2, the claim does not include any additional elements that integrate the judicial exception into a practical application and regarding Step 2B, there are no additional elements recited that amount to significantly more than the judicial exception. Claim 5 claims a system that corresponds to the method of claim 1, and is therefore rejected under 35 U.S.C. 112(b) for the same reasons explained with respect to claim 1. Allowable Subject Matter Claims 1-5 would be allowed over the prior art, provided that the rejections under 35 U.S.C. 101 and 112(b) are overcome. The following is a statement of reasons for the indication of allowable subject matter: Independent claims 1 and 5 would be considered allowable, provided that the rejections under 35 U.S.C. 101 and 112(b) are overcome, because none of the references of record either alone or in combination fairly disclose or suggest the combination of limitations specified in the independent claims, including at least: multiplying, in the classical computer, the feedback amount by a gain having a positive value such that a magnitude of the gain approaches zero as the quantum circuit is added. The closest prior art of record discloses: US 20200394550 A1, hereinafter referenced as FUJII. Fig. 1 shows a combination of a classical computer unit 10 and a quantum computer unit 20. Para. 0030 explains that the learning unit 15 of the classical computer unit 10 determines “circuit parameter θ” which is fed to the quantum circuit 22 through the control unit 11. Para. 0034 explains that the “circuit parameter θ” “defines the circuit configuration of the quantum circuit 22”, and therefore FUJII describes a classical computer that can be used to define a quantum circuit for a quantum computer. US 20220292235 A1, hereinafter referenced as SUSA. Fig. 20 shows a combination of a classical computer with a quantum bit circuit 1003. At para. 0051, SUSA explains: “In sum, quantum annealing is a method of finding a combination of bits (0,1) that minimizes the energy of the Ising model by using the quantum fluctuations. A difference in energy is related to the degree of difficulty of the combinatorial optimization problem. It can be considered that the more difficult the combinatorial optimization problem is, the smaller the energy difference is. Further, in general terms, it is known that the larger the number of (quantum) bits required to solve the problem is, the smaller the energy difference is.” (emphasis added). US 20220374750 A1, hereinafter referenced as SMELYANSKIY. Fig. 1 shows a combination of a classical processor 102 and a quantum computing hardware 104. Para. 0064 explains: “The control model may be a model that relates parameters of the quantum gates (e.g. phases, qubit rotation angles etc.) to physical parameters of the system/systems used to implement/control the quantum gate (e.g. voltages, pulse shapes, frequencies etc.)” (emphasis added). US 12306900 B1, hereinafter referenced as MAGANN. Fig. 1 shows a combination of a classical computing device 102 and a quantum computing device 104. “The classical computing device can be employed in connection with programming the quantum computing device to solve the optimization problem. For example, the classical computing device can be configured to provide control signals to the quantum computing device that cause the quantum computing device to assume various configurations.” (col. 1, lines 52-58). Mani, Ashish, et al. "An adaptive quantum evolutionary algorithm for engineering optimization problems." International Journal of Computer Applications 1.22 (2010): 43-48, hereinafter referenced as MANI. Discloses an adaptive quantum evolutionary algorithm for solving constraint optimization problems. “A single qubit is attached to the solution vector and the solution is obtained by taking measurement or collapsing in binary coded as well as real coded QEA. The qubits associated with the solution vector is also evolved by using quantum gate operators, which are influenced by phase rotation transformation used in Grover’s Algorithm for searching unsorted database.” (p. 44, section 2). However, the examiner has found that the distinct feature of the Applicant's claimed invention over the prior art is the explicit claiming of the aforementioned limitations in combination with all the other limitations as specified in independent claims. Therefore, because the prior art of record does not anticipate nor make obvious the combination of limitations in claims 1 and 5, such claims would be allowed provided that the rejections under 35 U.S.C. 101 and 112(b) are overcome. Dependent claims 2-4 would be allowed for the same reasons explained with respect to claim 1, provided that the rejections under 35 U.S.C. 101 and 112(b) are overcome. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US 20180003184 A1 (Dooley). “The integrators 606 integrates this value over time causing the gain-controllers 514 to adjust the magnitude of that Fourier component in the composite signal from the summing amplifier 516, until the multiplier product approaches zero.” (para. 0076). Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL C LEE whose telephone number is (571)272-4933. The examiner can normally be reached M-F 12:00 pm - 8:00 pm ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Omar Fernandez Rivas can be reached at 571-272-2589. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MICHAEL C. LEE/Examiner, Art Unit 2128
Read full office action

Prosecution Timeline

Mar 14, 2024
Application Filed
Jun 23, 2026
Non-Final Rejection mailed — §101, §112
Jul 15, 2026
Interview Requested

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Prosecution Projections

1-2
Expected OA Rounds
62%
Grant Probability
88%
With Interview (+25.8%)
3y 3m (~11m remaining)
Median Time to Grant
Low
PTA Risk
Based on 149 resolved cases by this examiner. Grant probability derived from career allowance rate.

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