DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This non-final office action is in response to the application filed 14 March 2024.
Claims 1-20 are pending. Claims 1, 8, and 15 are independent claims.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 14 March 2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Drawings
The examiner accepts the drawings filed 14 March 2024.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
With respect to independent claims 1, 8, and 15, the applicant recites the trademark “SmartSSD®” in lines (claim 1: lines 2, 7, and 8; claim 8: lines 5 and 6; claim 15: lines 9 and 10).
In this instance, “the trademark or trade name is used in a claim as a limitation to identify or describe a particular material or product, the claim does not comply with the requirements of the 35 U.S.C. 112(b) or pre-AIA 35 U.S.C. 112, second paragraph. Ex parte Simpson, 218 USPQ 1020 (Bd. App. 1982). See also Eli Lilly & Co. v. Apotex, Inc., 837 Fed. Appx. 780, 784-85, 2020 USPQ2d 11531 (Fed. Cir. 2020) ("Following Patent Office procedure, the Examiner in this case rejected the claims of the '821 application as indefinite because they improperly used the trade name 'ALIMTA.' In response to the rejection, Lilly canceled its claims reciting the trade name and pursued claims using the generic name for the same substance, which mooted the rejection. Additionally, as the district court observed, the Examiner 'explicitly noted that pemetrexed disodium was 'also known by the trade name ALIMTA' ' in the contemporaneous obviousness rejection."). The claim scope is uncertain since the trademark or trade name cannot be used properly to describe any particular material or product. In fact, the value of a trademark would be lost to the extent that it became the generic name of a product, rather than used as an identification of a source or origin of a product. Thus, the use of a trademark or trade name in a claim to describe a material or product would not only render a claim indefinite, but would also constitute an improper use of the trademark or trade name (MPEP 2173.05(u)).”
For the purpose of examination, the examiner will treat the claim as though it recites “solid state drive” or “SSD.” The examiner recommends amending the claim to recite “solid state drive (SSD).”
Claims 2, 3, 6, 7, 9, 10, 13, 14, 16, 17, and 20 also recite the term “SmartSSD.” The term is indefinite for the reasons detailed with respect to claims 1, 8, and 15.
Claims 4-5, 11-12, and 18-19 fail to cure the deficiencies of independent claims 1, 8, and 15. Claims 4-5, 11-12, and 18-19 are rejected under similar rationale.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more.
Step 1:
According to Step 1 of the two Step analysis, claims 1-7 are directed toward a method (process). Claims 8-14 are directed toward a device (machine). Claims 15-20 are directed toward a non-transitory computer readable storage medium (manufacture). Therefore, each of these claims falls within one of the four statutory categories.
Claim 1:
Step 2A, Prong 1:
The claim recites:
performing… a computation for an embedding layer using the embedding vector based on the embedding vector being found in the first embedding table (mental process; As drafted and under its broadest reasonable interpretation, this limitation covers performance of the limitation in the mind (including an observation, evaluation, judgment, opinion) or with the aid of pencil and paper but for the recitation of generic computer components. For example, this limitation encompasses an evaluation by performing a computation for an embedding layer using the embedding vector based on an observation that the embedding vector is found in the first embedding table)
… performing the computation for the embedding layer using the embedding vector found in the second embedding table, based on the embedding vector not being found in the first embedding table (mental process; As drafted and under its broadest reasonable interpretation, this limitation covers performance of the limitation in the mind (including an observation, evaluation, judgment, opinion) or with the aid of pencil and paper but for the recitation of generic computer components. For example, this limitation encompasses an evaluation by performing a computation for an embedding layer using the embedding vector found in the second embedding table based on an observation that the embedding vector is not found in the first embedding table)
Step 2A, Prong 2:
The judicial exception is not integrated into a practical application.
The claim recites the additional elements:
querying, by the host, an embedding vector corresponding to an input sparse feature of the DLRM from a first embedding table stored in CXL memory
querying, by the Smart SSD, the embedding vector from a second embedding table stored in the SmartSSD
obtaining, by the host, a recommendation result based on a computation result of the embedding layer and a compound result of a bottom multiplayer perceptron (MLP) for an input dense feature of the DLRM
The additional elements amount to merely adding insignificant extra-solution activity to a judicial exception do not amount to significantly more than the exception itself, and cannot integrate a judicial exception into a practical application (MPEP 2106.05(g)).
Additionally, the elements are recited at a high level of generality and amounts to extra-solution activity of receiving data i.e. pre-solution activity of gathering data for use in the claimed process. The courts have found limitations directed to obtaining information electronically, recited at a high level of generality, to be well-understood, routine, and conventional (see MPEP 2106.05(d)(II), “receiving or transmitting data over a network”, "electronic record keeping," and "storing and retrieving information in memory").
Accordingly, at Step 2A, prong two, the additional elements individually or in combination do no integrate the judicial exception into a practical application.
Step 2B:
In accordance with Step 2B, the claim does not include additional elements that are sufficient to amount to significantly more that the judicial exception.
The claim recites the additional elements:
querying, by the host, an embedding vector corresponding to an input sparse feature of the DLRM from a first embedding table stored in CXL memory
querying, by the Smart SSD, the embedding vector from a second embedding table stored in the SmartSSD
obtaining, by the host, a recommendation result based on a computation result of the embedding layer and a compound result of a bottom multiplayer perception (MLP) for an input dense feature of the DLRM
The additional elements amount to merely adding insignificant extra-solution activity to a judicial exception do not amount to significantly more than the exception itself, and cannot integrate a judicial exception into a practical application (MPEP 2106.05(g)).
Additionally, the elements are recited at a high level of generality and amounts to extra-solution activity of receiving data i.e. pre-solution activity of gathering data for use in the claimed process. The courts have found limitations directed to obtaining information electronically, recited at a high level of generality, to be well-understood, routine, and conventional (see MPEP 2106.05(d)(II), “receiving or transmitting data over a network”, "electronic record keeping," and "storing and retrieving information in memory").
Accordingly, at Step 2B the additional elements individually or in combination do not amount to significantly more than the judicial exception.
Claim 2:
With respect to claim 2, the claim depends upon claim 1. The analysis of claim 1 is incorporated herein.
Step 2A, Prong 1:
The claim recites:
determining… whether remaining storage space of the CXL memory is sufficient to store content corresponding to the embedding vector in the second embedding table, based on the embedding vector being found in the second embedding table (mental process; As drafted and under its broadest reasonable interpretation, this limitation covers performance of the limitation in the mind (including an observation, evaluation, judgment, opinion) or with the aid of pencil and paper but for the recitation of generic computer components. For example, this limitation encompasses a judgement to determine whether the remaining storage space is sufficient to store the corresponding embedding vector in the second embedding table)
duplicating… the content corresponding to the embedding vector in the second embedding table from the Smart SSD to the CXL memory, based on a determination that the remaining storage space is sufficient to store the content corresponding to the embedding vector in the second embedding table (mental process; As drafted and under its broadest reasonable interpretation, this limitation covers performance of the limitation in the mind (including an observation, evaluation, judgment, opinion) or with the aid of pencil and paper but for the recitation of generic computer components. For example, this limitation encompasses a judgement to determine whether the remaining storage space is sufficient to store the corresponding embedding vector in the second embedding table and based upon this determination duplicating the content. This duplication can be performed with the aid of a pencil and paper)
deleting… partial content in the first embedding table according to a predetermined rule, based on a determination that the remaining storage space is insufficient to store the content corresponding to the embedding vector in the second embedding table (mental process; As drafted and under its broadest reasonable interpretation, this limitation covers performance of the limitation in the mind (including an observation, evaluation, judgment, opinion) or with the aid of pencil and paper but for the recitation of generic computer components. For example, this limitation encompasses a judgement to determine whether the remaining storage space is insufficient to store the corresponding embedding vector in the second embedding table, deleting a portion of the content)
Step 2A, Prong 2:
The judicial exception is not integrated into a practical application.
The claim recites the additional elements:
by the host
The additional element of a host is recited at a high-level of generality such that it amounts to no more than mere instructions to apply the exception using a generic computer component (See MPEP 2106.05(f)).
Accordingly, at Step 2A, prong two, the additional elements individually or in combination do no integrate the judicial exception into a practical application.
Step 2B:
In accordance with Step 2B, the claim does not include additional elements that are sufficient to amount to significantly more that the judicial exception.
The claim recites the additional elements:
by the host
The additional element of a host is recited at a high-level of generality such that it amounts to no more than mere instructions to apply the exception using a generic computer component (See MPEP 2106.05(f)).
Accordingly, at Step 2B the additional elements individually or in combination do not amount to significantly more than the judicial exception.
Claim 3:
With respect to claim 3, the claim depends upon claim 2. The analysis of claim 2 is incorporated herein.
Step 2A, Prong 1:
The claim recites:
duplicating… the content corresponding to the embedding vector in the second embedding table from the Smart SSD to the CXL memory after deleting the partial content in the first table (mental process; As drafted and under its broadest reasonable interpretation, this limitation covers performance of the limitation in the mind (including an observation, evaluation, judgment, opinion) or with the aid of pencil and paper but for the recitation of generic computer components. For example, this limitation encompasses a judgement to determine whether the remaining storage space is insufficient to store the corresponding embedding vector in the second embedding table, deleting a portion of the content, and duplicating content corresponding to the embedding vector in the second embedding table. This duplication can be performed with the aid of a pencil and paper)
Step 2A, Prong 2:
The judicial exception is not integrated into a practical application.
The claim recites the additional elements:
by the host
The additional element of a host is recited at a high-level of generality such that it amounts to no more than mere instructions to apply the exception using a generic computer component (See MPEP 2106.05(f)).
Accordingly, at Step 2A, prong two, the additional elements individually or in combination do no integrate the judicial exception into a practical application.
Step 2B:
In accordance with Step 2B, the claim does not include additional elements that are sufficient to amount to significantly more that the judicial exception.
The claim recites the additional elements:
by the host
The additional element of a host is recited at a high-level of generality such that it amounts to no more than mere instructions to apply the exception using a generic computer component (See MPEP 2106.05(f)).
Accordingly, at Step 2B the additional elements individually or in combination do not amount to significantly more than the judicial exception.
Claim 4:
With respect to claim 3, the claim depends upon claim 3. The analysis of claim 3 is incorporated herein.
Step 2A, Prong 1:
The claim recites:
performing… feature interaction for the computation result of the embedding layer and the computation result of the bottom MLP, and performing computation for a top MLP based on a result of the feature interaction to obtain the recommendation result (mental process; As drafted and under its broadest reasonable interpretation, this limitation covers performance of the limitation in the mind (including an observation, evaluation, judgment, opinion) or with the aid of pencil and paper but for the recitation of generic computer components. For example, this limitation encompasses an observation of feature interaction and an evaluation for a top MLP based on the result of the observed feature interaction to obtain the recommendation result)
Step 2A, Prong 2:
The judicial exception is not integrated into a practical application.
The claim recites the additional elements:
by the host
The additional element of a host is recited at a high-level of generality such that it amounts to no more than mere instructions to apply the exception using a generic computer component (See MPEP 2106.05(f)).
Accordingly, at Step 2A, prong two, the additional elements individually or in combination do no integrate the judicial exception into a practical application.
Step 2B:
In accordance with Step 2B, the claim does not include additional elements that are sufficient to amount to significantly more that the judicial exception.
The claim recites the additional elements:
by the host
The additional element of a host is recited at a high-level of generality such that it amounts to no more than mere instructions to apply the exception using a generic computer component (See MPEP 2106.05(f)).
Accordingly, at Step 2B the additional elements individually or in combination do not amount to significantly more than the judicial exception.
Claim 5:
With respect to claim 5, the claim depends upon claim 4. The analysis of claim 4 is incorporated herein.
Step 2A, Prong 1:
The claim recites the abstract idea identified with respect to claim 4.
Step 2A, Prong 2:
The judicial exception is not integrated into a practical application.
The claim recites the additional elements:
wherein parameters of any one or any combination of the bottom MLP and the top MLP are stored in a dynamic random access memory (DRAM) of the host
The additional element storing parameters in a DRAM is recited at a high-level of generality such that it amounts to no more than mere instructions to apply the exception using a generic computer component (See MPEP 2106.05(f)).
Further, the courts have found limitations directed to storing information electronically, recited at a high level of generality, to be well-understood, routine, and conventional (see MPEP 2106.05(d)(II), “receiving or transmitting data over a network”, "electronic record keeping," and "storing and retrieving information in memory").
Accordingly, at Step 2A, prong two, the additional elements individually or in combination do no integrate the judicial exception into a practical application.
Step 2B:
In accordance with Step 2B, the claim does not include additional elements that are sufficient to amount to significantly more that the judicial exception.
The claim recites the additional elements:
wherein parameters of any one or any combination of the bottom MLP and the top MLP are stored in a dynamic random access memory (DRAM) of the host
The additional element storing parameters in a DRAM is recited at a high-level of generality such that it amounts to no more than mere instructions to apply the exception using a generic computer component (See MPEP 2106.05(f)).
Further, the courts have found limitations directed to storing information electronically, recited at a high level of generality, to be well-understood, routine, and conventional (see MPEP 2106.05(d)(II), “receiving or transmitting data over a network”, "electronic record keeping," and "storing and retrieving information in memory").
The additional element of a host is recited at a high-level of generality such that it amounts to no more than mere instructions to apply the exception using a generic computer component (See MPEP 2106.05(f)).
Accordingly, at Step 2B the additional elements individually or in combination do not amount to significantly more than the judicial exception.
Claim 6:
With respect to claim 6, the claim depends upon claim 1. The analysis of claim 1 is incorporated herein.
Step 2A, Prong 1:
The claim recites the abstract idea identified with respect to claim 1.
Step 2A, Prong 2:
The judicial exception is not integrated into a practical application.
The claim recites the additional elements:
wherein a hot embedding table is stored in the CXL memory and a cold embedding table is stored in the Smart SSD
The additional element storing tables is recited at a high-level of generality such that it amounts to no more than mere instructions to apply the exception using a generic computer component (See MPEP 2106.05(f)).
Further, the courts have found limitations directed to storing information electronically, recited at a high level of generality, to be well-understood, routine, and conventional (see MPEP 2106.05(d)(II), “receiving or transmitting data over a network”, "electronic record keeping," and "storing and retrieving information in memory").
Accordingly, at Step 2A, prong two, the additional elements individually or in combination do no integrate the judicial exception into a practical application.
Step 2B:
In accordance with Step 2B, the claim does not include additional elements that are sufficient to amount to significantly more that the judicial exception.
The claim recites the additional elements:
wherein a hot embedding table is stored in the CXL memory and a cold embedding table is stored in the Smart SSD
The additional element storing tables is recited at a high-level of generality such that it amounts to no more than mere instructions to apply the exception using a generic computer component (See MPEP 2106.05(f)).
Further, the courts have found limitations directed to storing information electronically, recited at a high level of generality, to be well-understood, routine, and conventional (see MPEP 2106.05(d)(II), “receiving or transmitting data over a network”, "electronic record keeping," and "storing and retrieving information in memory").
The additional element of a host is recited at a high-level of generality such that it amounts to no more than mere instructions to apply the exception using a generic computer component (See MPEP 2106.05(f)).
Accordingly, at Step 2B the additional elements individually or in combination do not amount to significantly more than the judicial exception.
Claim 7:
With respect to claim 7, the claim depends upon claim 1. The analysis of claim 1 is incorporated herein.
Step 2A, Prong 1:
The claim recites:
wherein performing the computation for the embedding layer using the embedding vector found in the second embedding table comprises: performing… the computation for the embedding layer based on the embedding vector found in the embedding table of the DRAM or the embedding table of the NAND flash memory (mental process; As drafted and under its broadest reasonable interpretation, this limitation covers performance of the limitation in the mind (including an observation, evaluation, judgment, opinion) or with the aid of pencil and paper but for the recitation of generic computer components. For example, this limitation encompasses an evaluation based on the embedding vector found in the embedding table of the DRAM or the NAND flash memory)
Step 2A, Prong 2:
The judicial exception is not integrated into a practical application.
The claim recites the additional elements:
wherein the SmartSSD comprises a NAND flash memory, a dynamic random access memory (DRAM), and a field programmable gate array (FPGA)
The element is recited at a high-level of generality such that it amounts to no more than mere instructions to apply the exception using a generic computer component (See MPEP 2106.05(f)).
The claim recites the additional elements:
wherein the querying the embedding vector from the second embedding table stored in the Smart SSD comprises:
querying the embedding vector from an embedding table stored in the DRAM by the FPGA
querying the embedding vector from an embedding table stored in the NAND flash memory by the FPGA based on the embedding vector not being hit in the embedding table stored in the DRAM
As discussed above, the additional elements of querying, which is recited at a high level of generality and amounts to extra-solution activity of receiving data i.e. pre-solution activity of gathering data for use in the claimed process. The courts have found limitations directed to obtaining information electronically, recited at a high level of generality, to be well-understood, routine, and conventional (see MPEP 2106.05(d)(II), “receiving or transmitting data over a network”, "electronic record keeping," and "storing and retrieving information in memory").
Accordingly, at Step 2A, prong two, the additional elements individually or in combination do no integrate the judicial exception into a practical application.
Step 2B:
In accordance with Step 2B, the claim does not include additional elements that are sufficient to amount to significantly more that the judicial exception.
The claim recites the additional elements:
wherein the SmartSSD comprises a NAND flash memory, a dynamic random access memory (DRAM), and a field programmable gate array (FPGA)
The element is recited at a high-level of generality such that it amounts to no more than mere instructions to apply the exception using a generic computer component (See MPEP 2106.05(f)).
The claim recites the additional elements:
wherein the querying the embedding vector from the second embedding table stored in the Smart SSD comprises:
querying the embedding vector from an embedding table stored in the DRAM by the FPGA
querying the embedding vector from an embedding table stored in the NAND flash memory by the FPGA based on the embedding vector not being hit in the embedding table stored in the DRAM
As discussed above, the additional elements of querying, which is recited at a high level of generality and amounts to extra-solution activity of receiving data i.e. pre-solution activity of gathering data for use in the claimed process. The courts have found limitations directed to obtaining information electronically, recited at a high level of generality, to be well-understood, routine, and conventional (see MPEP 2106.05(d)(II), “receiving or transmitting data over a network”, "electronic record keeping," and "storing and retrieving information in memory").
Accordingly, at Step 2B the additional elements individually or in combination do not amount to significantly more than the judicial exception.
Claim 8:
With respect to claim 8, the claim recites the limitations substantially similar to those in claim 1. The analysis of claim 1 is incorporated herein by reference.
Step 2A, Prong 1:
The claim recites the abstract idea identified with respect to claim 1.
Step 2A, Prong 2:
The judicial exception is not integrated into a practical application.
The claim recites the additional elements:
a device for implementing a deep learning recommendation model (DLRM)
The element is recited at a high-level of generality such that it amounts to no more than mere instructions to apply the exception using a generic computer component (See MPEP 2106.05(f)).
Accordingly, at Step 2A, prong two, the additional elements individually or in combination do no integrate the judicial exception into a practical application.
Step 2B:
In accordance with Step 2B, the claim does not include additional elements that are sufficient to amount to significantly more that the judicial exception.
The claim recites the additional elements:
a device for implementing a deep learning recommendation model (DLRM)
The element is recited at a high-level of generality such that it amounts to no more than mere instructions to apply the exception using a generic computer component (See MPEP 2106.05(f)).
Accordingly, at Step 2B the additional elements individually or in combination do not amount to significantly more than the judicial exception.
Claims 9-14:
With respect to claims 9-14, the claims recite the limitations substantially similar to those in claims 2-7, respectfully. The analysis of claims 2-7 is incorporated herein by reference.
Claim 15:
With respect to claim 15, the claim recites the limitations substantially similar to those in claim 1. The analysis of claim 1 is incorporated herein by reference.
Step 2A, Prong 1:
The claim recites the abstract idea identified with respect to claim 1.
Step 2A, Prong 2:
The judicial exception is not integrated into a practical application.
The claim recites the additional elements:
a non-transitory computer readable storage medium storing a computer program which, when executed by a processor, is configured to control the processor to perform a method for implementing a deep learning recommendation model (DLRM)
The element is recited at a high-level of generality such that it amounts to no more than mere instructions to apply the exception using a generic computer component (See MPEP 2106.05(f)).
Accordingly, at Step 2A, prong two, the additional elements individually or in combination do no integrate the judicial exception into a practical application.
Step 2B:
In accordance with Step 2B, the claim does not include additional elements that are sufficient to amount to significantly more that the judicial exception.
The claim recites the additional elements:
a non-transitory computer readable storage medium storing a computer program which, when executed by a processor, is configured to control the processor to perform a method for implementing a deep learning recommendation model (DLRM)
The element is recited at a high-level of generality such that it amounts to no more than mere instructions to apply the exception using a generic computer component (See MPEP 2106.05(f)).
Accordingly, at Step 2B the additional elements individually or in combination do not amount to significantly more than the judicial exception.
Claims 16-20:
With respect to claims 16-20, the claims recite the limitations substantially similar to those in claims 2-6, respectfully. The analysis of claims 2-6 is incorporated herein by reference.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1, 8, and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Punniyamurthy et al. (US 2025/0110899, filed 29 September 2023, hereafter Punniyamurthy) and further in view of Iyer et al. (US 11281602, patented 22 March 2022, hereafter Iyer) and further in view of Kao et al. (US 2024/0012872, filed 23 August 2022, hereafter Kao).
As per independent claim 1, Punniyamurthy discloses a method for implementing a deep learning recommendation model (DLRM) (paragraph 0028) using a host and a memory, the method comprising:
querying, by the host, an embedding vector corresponding to an input sparse feature o the DLRM from a first embedding table stored in memory (Figure 5; paragraph 0021: Here, a user query is received by a host device to access the index of indexes. This causes the sparse input feature identifiers to obtain an operand for use in a reduction operation (Figure 5, item 504) from an embedding table (Figure 2; paragraph 0058))
performing, by the host, a computation for an embedding layer using the embedding vector based on the embedding vector being found in the first embedding table (Figure 5; paragraphs 0058-0059: Here, the data is obtained from the embedding table to perform a reduction computation based on the embedding vector)
querying the embedding vector from a second embedding table stored in the memory and performing the computation for the embedding layer using the embedding vector found in the second embedding vector found in the second embedding table, based on the embedding vector not being found in the first embedding table (Figure 3; paragraph 0045: Here, an identifier in the query/request includes header information that identifies one of processors (items 316 and 326) and processing elements (item 310 and 320). This identifier indicates the memory and corresponding embedding table (items 312 and 322) for use in reduction)
obtaining, by the host, a recommendation result based on a computation result of the embedding layer and a computation result for the input dense feature of the DLRM (Figure 5, item 512; paragraph 0059: Here, the switch provides the results of the reduction operation to the processing node to reduce memory bandwidth and power consumption requirements)
Punniyamurthy fails to specifically disclose:
SmartSSD
CXL memory
a bottom multilayer perceptron (MLP)
However, Iyer, which is analogous to the claimed invention because it is directed toward offloading operations, discloses:
SSD (Figure 3; column 4, line 58- column 5, line 3: Here, a solid state memory is disclosed)
CXL memory (column 4, lines 1-57: Here, a compute express link (CXL) memory architecture are implemented in a device)
It would have been obvious to one of ordinary skill in the art at the time of the applicant’s effective filing date to have combined Iyer with Punniyamurthy, with a reasonable expectation of success, as it would have allowed for subdividing and assigning processing to different processors to improve performance (Iyer: Abstract).
Additionally, Kao, which is analogous to the claimed invention because it is directed toward interaction modeling, discloses a bottom multilayer perceptron (Figure 1; paragraph 0020: Here, the DLRM includes a bottom multilayer perceptron for processing continuous features or numerical features and providing a processing result). It would have been obvious to one of ordinary skill in the art at the time of the applicant’s effective filing date to have combined Kao with Punniyamurthy-Iyer, with a reasonable expectation of success, as it would have allowed for continuous features or numerical features and providing a processing result (Kao: paragraph 0020).
With respect to independent claim 8, the claim recites the limitations substantially similar to those in claim 1. The rejection of claim 1 is incorporated herein by reference.
Additionally, Punniyamurthy discloses a device including hardware memory (Figure 1, item 100).
With respect to independent claim 15, the claim recites the limitations substantially similar to those in claim 1. The rejection of claim 1 is incorporated herein by reference.
Additionally, Punniyamurthy discloses a non-transitory computer readable storage medium storing a computer program which, when executed by a processor is configured to control the processor to perform a method for implementing a deep learning recommendation model (paragraph 0062).
Claims 2-5, 9-12, and 16-19 are rejected under 35 U.S.C. 103 as being unpatentable over Punniyamurthy, Iyer, and Kao and further in view of Nagayanallur Subramanian et al. (US 2022/0019565, published 20 January 2022, hereafter Nagayanallur Subramanian) and further in view of Wang et al. (US 2023/0124389, published 20 April 2023, hereafter Wang).
As per dependent claim 2, Punniyamurthy, Iyer, and Kao disclose the limitations similar to those in claim 1, and the same rejection is incorporated herein. Punniyamurthy discloses:
content corresponding to the embedding vector in the second embedding table, based on the embedding vector being found in the second embedding table (Figure 3; paragraph 0045: Here, an identifier in the query/request includes header information that identifies one of processors (items 316 and 326) and processing elements (item 310 and 320). This identifier indicates the memory and corresponding embedding table (items 312 and 322) containing content corresponding to the vector)
content corresponding to the embedding vector in the second embedding table from the SSD to the memory (Figure 3; paragraph 0045: Here, an identifier in the query/request includes header information that identifies one of processors (items 316 and 326) and processing elements (item 310 and 320). This identifier indicates the memory and corresponding embedding table (items 312 and 322) containing content corresponding to the vector)
Punniyamurthy fails to specifically disclose:
determining, by the host, whether the remaining storage space of the CXL memory is sufficient to store
duplicating, by the host, the based on the determination that the remaining storage space is sufficient to store the content
deleting, by the host, partial content according to a predetermined rule, based on a determination that the remaining storage space is insufficient to store the content in the second embedding table
However, Nagayanallur Subramanian, which is analogous to the claimed invention because it is directed toward shared memory, discloses:
determining, by the host, whether the remaining storage space of the memory is sufficient to store (paragraph 0084: Here, a determination is performed to identify whether sufficient storage space is available for automatic storage management)
duplicating, by the host, the based on the determination that the remaining storage space is sufficient to store the content (paragraph 0152: Here, content is copied from a first table to an interim data table)
It would have been obvious to one of ordinary skill in the art at the time of the applicant’s effective filing date to have combined Nagayanallur Subramanian with Punniyamurthy-Iyer-Kao, with a reasonable expectation of success, as it would have allowed for determining that sufficient storage space is available prior to copying data (Nagayanallur Subramanian: paragraph 0084).
Additionally, Wang, which is analogous to the claimed invention because it is directed toward managing data storage, discloses deleting, by the host, partial content according to a predetermined rule, based on a determination that the remaining storage space is insufficient to store the content in the second embedding table (paragraph 0035: Here, based upon a determination that the insufficient space exists for storing the data, the earliest stored item is deleted). It would have been obvious to one of ordinary skill in the art at the time of the applicant’s effective filing date to have combined Wang with Punniyamurthy-Iyer-Kao-Nagayanallur Subramanian, with a reasonable expectation of success, as it would have allowed for defining a deletion policy if insufficient storage space exists (Wang: paragraph 0035).
As per dependent claim 3, Punniyamurthy, Iyer, Kao, Nagayanallur Subramanian, and Wang disclose the limitations similar to those in claim 2, and the same rejection is incorporated herein. Punniyamurthy discloses the content corresponding to the embedding vector in a table from SSD (Figure 3; paragraph 0045: Here, an identifier in the query/request includes header information that identifies one of processors (items 316 and 326) and processing elements (item 310 and 320). This identifier indicates the memory and corresponding embedding table (items 312 and 322) containing content corresponding to the vector).
Additionally, Wang discloses deleting the partial contents (paragraph 0035) and Nagayanallur Subramanian discloses duplicating, by the host, the content (paragraph 0152: Here, content is copied from a first table to an interim data table). It would have been obvious to one of ordinary skill in the art at the time of the applicant’s effective filing date to have combined Wang with Nagayanallur Subramanian, with a reasonable expectation of success, as it would have allowed for deleting content, based upon a policy (Wang: paragraph 0035), until the sufficient space to copy the contents exists (Nagayanallur Subramanian: paragraph 0152).
Further, it would have been obvious to one of ordinary skill in the art at the time of the applicant’s effective filing date to have combined the combination of Nagayanallur Subramanian-Wang with Punniyamurthy-Iyer-Kao-Nagayanallur Subramanian-Wang, with a reasonable expectation of success, as it would have allowed for copying contents (Nagayanallur Subramanian: paragraph 0152) from a second embedding record table to a first embedding record table (Punniyamurthy: paragraph 0045).
As per dependent claim 4, Punniyamurthy, Iyer, Kao, Nagayanallur Subramanian, and Wang disclose the limitations similar to those in claim 3, and the same rejection is incorporated herein. Kao discloses performing, by the host, feature interaction for the computation result of the embedding layer and the computation result of the bottom MLP, and performing computation for a top MLP based on a result of the feature interaction to obtain the recommendation result (paragraph 0021: Here, the top MLP processes fused feature vectors to generate a processing result). It would have been obvious to one of ordinary skill in the art at the time of the applicant’s effective filing date to have combined Kao with Punniyamurthy-Iyer, with a reasonable expectation of success, as it would have allowed for continuous features or numerical features and providing a processing result (Kao: paragraph 0020).
As per dependent claim 5, Punniyamurthy, Iyer, Kao, Nagayanallur Subramanian, and Wang disclose the limitations similar to those in claim 4, and the same rejection is incorporated herein. Punniyamurthy discloses wherein the memory is dynamic random-access memory (DRAM) (paragraph 0042). Additionally, Kao discloses wherein parameters of any one or any combination of the bottom MLP and top MLP are stored in memory of the host (Figures 3-4; paragraph 0031: Here, feature vectors are stored in a memory). It would have been obvious to one of ordinary skill in the art at the time of the applicant’s effective filing date to have combined Kao with Punniyamurthy-Iyer, with a reasonable expectation of success, as it would have allowed for continuous features or numerical features and providing a processing result (Kao: paragraph 0020) in DRAM (Punniyamurthy: paragraph 0042).
With respect to claims 9-12, the claims recite the limitations substantially similar to those in claims 2-5, respectively. Claims 9-12 are rejected under similar rationale.
With respect to claims 16-19, the claims recite the limitations substantially similar to those in claims 2-5, respectively. Claims 16-19 are rejected under similar rationale.
Claims 6, 13, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Punniyamurthy, Iyer, and Kao and further in view of Rhee et al. (US 11755898, patented 12 September 2023, hereafter Rhee).
As per dependent claim 6, Punniyamurthy, Iyer, and Kao disclose the limitations similar to those in claim 1, and the same rejection is incorporated herein. Iyer discloses CXL memory (column 4, lines 1-57: Here, a compute express link (CXL) memory architecture are implemented in a device) and SSD (Figure 3; column 4, line 58- column 5, line 3: Here, a solid state memory is disclosed). It would have been obvious to one of ordinary skill in the art at the time of the applicant’s effective filing date to have combined Iyer with Punniyamurthy, with a reasonable expectation of success, as it would have allowed for subdividing and assigning processing to different processors to improve performance (Iyer: Abstract).
Punniyamurthy fails to specifically disclose wherein a hot embedding table is stored in memory and a cold embedding table is stored in memory.
However, Rhee, which is analogous to the claimed invention because it is directed toward near-memory processing of embedding based on deep learning based recommendations, discloses wherein a hot embedding table is stored in memory and a cold embedding table is stored in memory (column 6, lines 58-63: Here, a hot embedding vector is stored in high bandwidth memory (HBM) and a cold embedding vector is stored in main memory). It would have been obvious to one of ordinary skill in the art at the time of the applicant’s effective filing date to have combined Rhee with Punniyamurthy-Iyer-Kao, with a reasonable expectation of success, as it would have allowed of offloading storage of cold embeddings while storing hot embeddings in high bandwidth memory to alleviate memory bandwidth required to access embeddings tables (Rhee: column 6, lines 58-63).
With respect to claims 13 and 20, the claims recite the limitations substantially similar to those in claim 6. Claims 13 and 20 are rejected under similar rationale.
Claims 7 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Punniyamurthy, Iyer, and Kao and further in view of Kumar (US 2018/0260421, published 13 September 2018).
As per dependent claim 7, Punniyamurthy, Iyer, and Kao disclose the limitations similar to those in claim 1, and the same rejection is incorporated herein. Punniyamurthy discloses NAND flash memory (paragraph 0062) and dynamic random access memory (paragraph 0062). Additionally, Punniyamurthy discloses:
wherein the querying the embedding vector from the second embedding table stored in the memory comprises:
querying the embedding vector from an embedding table stored in the first memory by the system (Figure 3; paragraph 0045: Here, an identifier in the query/request includes header information that identifies one of processors (items 316 and 326) and processing elements (item 310 and 320). This identifier indicates the memory and corresponding embedding table (items 312 and 322) for use in reduction)
querying the embedding vector from an embedding table stored in the second memory by the system based on the embedding vector not being hit in the embedding table stored in the first memory (Figure 3; paragraph 0045: Here, an identifier in the query/request includes header information that identifies one of processors (items 316 and 326) and processing elements (item 310 and 320). This identifier indicates the memory and corresponding embedding table (items 312 and 322) for use in reduction. This insures that the correct embedding table is searched to identify the embedding vector)
wherein the performing the computation for the embedding layer using the embedding vector found in the second embedding table comprises: performing, by the system, the computation for the embedding layer based on the embedding vector found in the embedding table of the first memory or the embedding table of the second memory (Figure 5, item 512; paragraph 0059: Here, the switch provides the results of the reduction operation to the processing node to reduce memory bandwidth and power consumption requirements)
However, Punniyamurthy fails to specifically disclose
wherein the SSD comprises a NAND flash memory, a dynamic random access memory (DRAM), and a field programmable gate array (FPGA)
However, Kumar, which is analogous to the claimed invention because it is directed toward storing and accessing data, discloses wherein the SSD comprises a NAND flash memory, a dynamic random access memory (DRAM), and a field programmable gate array (FPGA (paragraph 0062: Here, a field programmable gate array is a processing circuitry including memory circuitry. This memory circuitry may include SSD media including DRAM and flash memory). It would have been obvious to one of ordinary skill in the art at the time of the applicant’s effective filing date to have combined Kumar with Punniyamurthy, Iyer, and Kao, with a reasonable expectation of success, as it would have allowed for implementing the DRAM in a FPGA (Kumar: paragraph 0062).
With respect to claim 13, the claim recite the limitations substantially similar to those in claim 7. Claim 14 is rejected under similar rationale.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Kotary et al. (US 2024/0403157): Discloses copying contents from memory responsive to a request from CXL and using memory mirroring by the CXL memory (paragraph 0029)
Murphy (US 2024/0118830): Discloses copying or moving data objects from main memory to a memory subsystem while maintaining CXL memory coherency (paragraph 0045)
Price et al. (US 2024/0037026): Discloses memory pooling, provisioning, and sharing including using a CXL device for storing copies of data (Abstract; paragraph 0028)
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/KYLE R STORK/Primary Examiner, Art Unit 2128
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