DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicants’ remarks filed on 01/12/2026 about election species of figure 1 would including species of figures 3-4 since figures 3-4 are parts of the species of figure 1. Applicants’ remark is persuasive , therefore, these claims 1-6 drawn to species of figures 1 and 3-4 are examined.
Applicant’s election without traverse of species 1 and 3-4 including claims 1-6 in the reply filed on 01/12/2026 is acknowledged.
Claims 7-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 01/12/2026.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1,3 and 6 are rejected under 35 U.S.C. 102(a)(1)as being anticipated by Isamu (JP2009115647 (A)).
As to claim 1, Isamu discloses a circuit as shown in figure comprising: a force amplifier (14) having an output; a resistor (31a-31c) having first terminal (C1) coupled to the output of the force amplifier (14), and having a second terminal (C2) ; and a diode clamp (35) including: a first diode (35a) having a first terminal (left terminal) coupled to the first terminal (C1) of the resistor (31a-31c) and having a second terminal (right terminal) coupled to the second terminal (C2) of the resistor (31a-31c), the first diode (35a,35b) having a first orientation; and a second diode (35c,35d) coupled in parallel with the first diode (35a,35b) between the first and second terminals of the resistor, the second diode having a second orientation opposite than the first diode.
As to claim 3, Isamu discloses a circuit as mentioned in claim 1, the resistor (31a-31c) includes a set of resistors (31a-31c) in parallel between the first terminal (C1) and the second terminal (C2), respective ones of the set of resistors coupled to respective switches (32a-32c).
As to claim 6, Isamu discloses a circuit as mentioned in claim 1 having a first load terminal (an input terminal of a DUT) coupled to the second terminal of the diode clamp (35) .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Isamu (JP2009115647 (A)) in view of . Yoshida (Pat# 7,616,417).
As to claim 2, Isamu discloses a circuit as mentioned in claim 1 but do not show diode clamp includes: a first set of additional diodes coupled in series with the first diode; and a second set of additional diodes coupled in series with the second diode.
Yoshida teaches that it would have been well-known in the art to have diode clamp (12) includes: a first set of additional diodes coupled in series with the first diode; and a second set of additional diodes coupled in series with the second diode .
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to have the diode clamp in the device of Isamu with a first set of additional diodes coupled in series with the first diode; and a second set of additional diodes coupled in series with the second diode as taught by Yoshida for the purpose of obtaining accurate detected signals before feeding these signals to the device under test.
Allowable Subject Matter
Claims 4-5 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The prior art does not disclose a slew detection circuit including an output coupled to one or more of the respective switches as recited in claim 4 and in combined with other claimed elements as recited in claims 1 and 3.
The prior art does not disclose a slew detection circuit including an output; and a diode quantity selection switch controllably coupled to the slew detection circuit, the diode quantity selection switch including: a first terminal coupled to the first terminal of the first diode; and a second terminal coupled to an output node of a first set of additional diodes in series with the first diode and a second set of additional diodes in series with the second diode.as recited in claim 5 and in combined with other claimed elements as recited in claim 1.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Neema et al (Pat# 12.422,474) disclose Force/measure Current Gain Trimming
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/VINH P NGUYEN/Primary Examiner, Art Unit 2858