DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on July 25, 2025 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Election/Restrictions
Claims 19 and 20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected method claims, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on February 2, 2026.
Specification
Applicant is reminded of the proper content of an abstract of the disclosure.
A patent abstract is a concise statement of the technical disclosure of the patent and should include that which is new in the art to which the invention pertains. The abstract should not refer to purported merits or speculative applications of the invention and should not compare the invention with the prior art.
If the patent is of a basic nature, the entire technical disclosure may be new in the art, and the abstract should be directed to the entire disclosure. If the patent is in the nature of an improvement in an old apparatus, process, product, or composition, the abstract should include the technical disclosure of the improvement. The abstract should also mention by way of example any preferred modifications or alternatives.
Where applicable, the abstract should include the following: (1) if a machine or apparatus, its organization and operation; (2) if an article, its method of making; (3) if a chemical compound, its identity and use; (4) if a mixture, its ingredients; (5) if a process, the steps.
Extensive mechanical and design details of an apparatus should not be included in the abstract. The abstract should be in narrative form and generally limited to a single paragraph within the range of 50 to 150 words in length.
See MPEP § 608.01(b) for guidelines for the preparation of patent abstracts.
The abstract of the disclosure is objected to because it includes purported merits. The terms “to reduce warpage of the substrate” is result-focused” without enough structural explanation. A corrected abstract of the disclosure is required and must be presented on a separate sheet, apart from any other text. See MPEP § 608.01(b).
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-18 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
In regards to claim 1:
- the term “size” is indefinite the phrase “a size of the surface” is vague. It is not clear whether “size” means area, diameter, width, longest dimension, perimeter, or something else.
-The phrase ‘first/second conductive vias has a surface exposed on the first surface and a surface exposed on the second surface’ is unclear because a via itself is not typically described as being ‘exposed on’ a surface. Rather, only an end, opening, or terminal portion of the via may be exposed at a surface. Accordingly, the claim language renders the scope of the limitation unclear.”
In regards to claim 1, the examiner will interpret claim 1 to be:
A substrate, comprising: a first dielectric layer having a first surface and a second surface; a plurality of first conductive vias penetrating the first dielectric layer, wherein each one of the plurality of first conductive vias has a surface exposed at the first surface and a surface exposed at the second surface, and wherein a cross-sectional profile of the first dielectric layer a width of the surface exposed at the first surface is larger than a width of the surface exposed at the second surface; and a plurality of second conductive vias penetrating the first dielectric layer, wherein each one of the plurality of second conductive vias has a surface exposed at the first surface and a surface exposed at the second surface, and wherein a cross-sectional profile of the first dielectric layer a width of the surface exposed at the first surface is smaller than a width of the surface exposed at the second surface.
In regards to claim 2 (including dependent claims 3 and 4):
-recites the limitation “rows X” and “rows Y”. There is insufficient antecedent basis for this limitation in the claim.
- “rows X” and “rows Y” is unclear. It is unclear whether:
- “rows X” means rows of first conductive vias and “rows Y” means rows of second conductive vias or if X and Y refer to directions or axes.
- “rows X and the rows Y are arranged in parallel” is unclear.
In regards to claim 5:
-recites “The semiconductor substrate”. Claim 1 recites “A substrate,” not “A semiconductor substrate.” There is insufficient antecedent basis for this limitation in the claim. The claim should read “the substrate”.
-“ the plurality of first conductive vias and the plurality of second conductive vias are arranged in a matrix” is unclear. The examiner is unclear if the matrix is considered to be the “first dielectric layer” as recited in claim in, in which the first and second conductive vias are claimed to penetrate or if the matrix is separate from the first dielectric layer.
In regards to claim 6:
-recites “The semiconductor substrate”. Claim 1 recites “A substrate,” not “A semiconductor substrate.” There is insufficient antecedent basis for this limitation in the claim. The claim should read “the substrate”.
-recites “gradually increasing width in a direction away from the second surface, and a cross section of each one of the plurality of second conductive vias has a gradually increasing width in a direction away from the first surface.” “in a direction away” is vague. It is unclear of the exact direction and how far away, the via is increasing and decreasing. The applicant should clearly define the exact width and what distance is increased and the exactly direction the via is increasing or decreasing in relation to a specific plane.
In regards to claims 7, 9 , 13 and 16:
The terms “the (x) conductive vias or the …(y) conductive vias” creates ambiguity as to which limitations are being claimed. The application should rewrite the claim to include either “the first conductive vias” or “the second conductive vias” as the claimed limitation.
The terms “a surface close to” or “far away” is vague. The examiner suggest replacing the terms with “nearest to” or “closest to” (the surface) and “farthest from”.
“arranged correspondingly with” is vague. It is not clear whether this means aligned vertically, overlapping in plain view, electrically connected one-to-one, one-to-many, or merely positioned in relation to.
“to provide an electrical path, and wherein each one of the plurality of …conductive vias has a surface close to the first surface and a surface away from the first surface” is unclear. For example, If the second dielectric layer is disposed on the first surface of the first dielectric layer, then the third vias likely have one end exposed at an upper surface of the second dielectric layer and another end exposed at the interface or lower surface to make to provide an electrical path. The claim does not define the structural relationship clearly.
In regards to claim 8:
Same as in claim 1, the word “size” should be defined in area, width, diameter, etc.
The terms “a surface close to” or “far away” is vague. The examiner suggest replacing the terms with “nearest to” or “closest to” (the surface) and “farthest from”.
In regards to claim 10:
Same as in claim 1, the word “size” should be defined in area, width, diameter, etc.
The terms “a surface close to” or “far away” is vague. The examiner suggest replacing the terms with “nearest to” or “closest to” (the surface) and “farthest from”.
In regards to claims 11, 14, 15 and 17:
Same as in claim 1, the word “size” should be defined in area, width, diameter, etc.
In regards to claim 12:
-recites “The semiconductor substrate”. Claim 1 recites “A substrate,” not “A semiconductor substrate.” There is insufficient antecedent basis for this limitation in the claim. The claim should read “the substrate”.
Same as in claim 1, the word “size” should be defined in area, width, diameter, etc.
In regards to claim 18:
- Same as in claim 1, the word “size” should be defined in area, width, diameter, etc.
- The terms “a surface close to” or “far away” is vague. The examiner suggest replacing the terms with “nearest to” or “closest to” (the surface) and “farthest from”.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Huang et al. (US 2015/0114698.
In regards to claim 1, Huang et al. teaches a substrate (see figure 1A), comprising: a first dielectric layer (112) having a first surface and a second surface (top and bottom surface); a plurality of first conductive vias (B1’) penetrating the first dielectric layer (112), wherein each one of the plurality of first conductive vias (B1’) has a surface exposed at the first surface and a surface exposed at the second surface (see the figure below)(a plurality of first blind vias B1' and a plurality of second blind vias B2' are arranged alternatively, and the opening shapes of the first blind vias B1' and the second blind vias B2' are specified as circular shape, paragraph [0027]), and wherein a cross-sectional profile of the first dielectric layer (112) width of the surface exposed at the first surface (top exposed surface of the first dielectric layer) is larger than a width of the surface exposed at the second surface (bottom exposed surface of the first dielectric layer); and a plurality of second conductive vias (B2’) penetrating the first dielectric layer (112), wherein each one of the plurality of second conductive vias (B2’) has a surface exposed on the first surface (top surface of (112)) and a surface exposed on the second surface (bottom surface of (112)), and wherein a cross-sectional profile of the first dielectric layer (112) a width of the surface exposed at the first surface (top surface of (112)) is smaller than a width of the surface exposed on the second surface (bottom surface of (112)).
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Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Kawashita et al. (US 11,197,379) teaches vias exposed on the top and bottom surface of a dielectric layer and the different sized vias having a staggered position. IFIS et al. (US 2023/0085035) teaches tapered via holes.
Communication
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KRYSTAL ROBINSON whose telephone number is (571)272-9258. The examiner can normally be reached on 9-5 M-F.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Dole can be reached on (571)-272-2229. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/KRYSTAL ROBINSON/Examiner, Art Unit 2848
Prosecution Insights